Add support for DISP/VIDEO/GPU CCs for SC7280
v2 cover Add support for DISP/VIDEO/GPU CCs for SC7280
Add support for display, video & graphics clock controllers on SC7280 along with the bindings for each of the clock controllers.
[v2]
* Use the .hws instead of clk_parent_data when the whole array is clk_hw pointers for all the clock drivers.
[v1]
* Documentation binding for DISP, GPU, VIDEO clock controller for SC7280.
* Add the DISP, GPU, VIDEO clock drivers for SC7280.
Taniya Das (6):
dt-bindings: clock: Add SC7280 DISPCC clock binding
clk: qcom: Add display clock controller driver for SC7280
dt-bindings: clock: Add SC7280 GPUCC clock binding
clk: qcom: Add graphics clock controller driver for SC7280
dt-bindings: clock: Add SC7280 VideoCC clock binding
clk: qcom: Add video clock controller driver for SC7280
.../devicetree/bindings/clock/qcom,gpucc.yaml | 4 +- .../bindings/clock/qcom,sc7280-dispcc.yaml | 94 +++ .../devicetree/bindings/clock/qcom,videocc.yaml | 4 +- drivers/clk/qcom/Kconfig | 25 + drivers/clk/qcom/Makefile | 3 + drivers/clk/qcom/dispcc-sc7280.c | 908 +++++++++++++++++++++ drivers/clk/qcom/gpucc-sc7280.c | 491 +++++++++++ drivers/clk/qcom/videocc-sc7280.c | 372 +++++++++ include/dt-bindings/clock/qcom,dispcc-sc7280.h | 55 ++ include/dt-bindings/clock/qcom,gpucc-sc7280.h | 35 + include/dt-bindings/clock/qcom,videocc-sc7280.h | 27 + 11 files changed, 2016 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml create mode 100644 drivers/clk/qcom/dispcc-sc7280.c create mode 100644 drivers/clk/qcom/gpucc-sc7280.c create mode 100644 drivers/clk/qcom/videocc-sc7280.c create mode 100644 include/dt-bindings/clock/qcom,dispcc-sc7280.h create mode 100644 include/dt-bindings/clock/qcom,gpucc-sc7280.h create mode 100644 include/dt-bindings/clock/qcom,videocc-sc7280.h
--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v2 1/6 dt-bindings: clock: Add SC7280 DISPCC clock binding
Add device tree bindings for display clock controller subsystem for Qualcomm Technology Inc's SC7280 SoCs.
--- .../bindings/clock/qcom,sc7280-dispcc.yaml | 94 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,dispcc-sc7280.h | 55 +++++++++++++ 2 files changed, 149 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml create mode 100644 include/dt-bindings/clock/qcom,dispcc-sc7280.h
Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml new file +94 -0
@@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller Binding for SC7280 + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm display clock control module which supports the clocks, resets and + power domains on SC7280. + + See also dt-bindings/clock/qcom,dispcc-sc7280.h. + +properties: + compatible: + const: qcom,sc7280-dispcc + + clocks: + items: + - description: Board XO source + - description: GPLL0 source from GCC + - description: Byte clock from DSI PHY + - description: Pixel clock from DSI PHY + - description: Link clock from DP PHY + - description: VCO DIV clock from DP PHY + - description: Link clock from EDP PHY + - description: VCO DIV clock from EDP PHY + + clock-names: + items: + - const: bi_tcxo + - const: gcc_disp_gpll0_clk + - const: dsi0_phy_pll_out_byteclk + - const: dsi0_phy_pll_out_dsiclk + - const: dp_phy_pll_link_clk + - const: dp_phy_pll_vco_div_clk + - const: edp_phy_pll_link_clk + - const: edp_phy_pll_vco_div_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@af00000 { + compatible = "qcom,sc7280-dispcc"; + reg = <0x0af00000 0x200000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_DISP_GPLL0_CLK_SRC>, + <&dsi_phy 0>, + <&dsi_phy 1>, + <&dp_phy 0>, + <&dp_phy 1>, + <&edp_phy 0>, + <&edp_phy 1>; + clock-names = "bi_tcxo", + "gcc_disp_gpll0_clk", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk", + "dp_phy_pll_link_clk", + "dp_phy_pll_vco_div_clk", + "edp_phy_pll_link_clk", + "edp_phy_pll_vco_div_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +...
include/dt-bindings/clock/qcom,dispcc-sc7280.h new file +55 -0
55 lines not on this page · raw message
Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Rob Herring
maintainerRe: [PATCH v2 1/6] dt-bindings: clock: Add SC7280 DISPCC clock binding
Quoted 117 lines · Taniya Das
Add device tree bindings for display clock controller subsystem for Qualcomm Technology Inc's SC7280 SoCs.
Signed-off-by Taniya Das <[email protected]>--- .../bindings/clock/qcom,sc7280-dispcc.yaml | 94 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,dispcc-sc7280.h | 55 +++++++++++++ 2 files changed, 149 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml create mode 100644 include/dt-bindings/clock/qcom,dispcc-sc7280.hDocumentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml new file +94
-0@@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller Binding for SC7280 + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm display clock control module which supports the clocks, resets and + power domains on SC7280. + + See also dt-bindings/clock/qcom,dispcc-sc7280.h. + +properties: + compatible: + const: qcom,sc7280-dispcc + + clocks: + items: + - description: Board XO source + - description: GPLL0 source from GCC + - description: Byte clock from DSI PHY + - description: Pixel clock from DSI PHY + - description: Link clock from DP PHY + - description: VCO DIV clock from DP PHY + - description: Link clock from EDP PHY + - description: VCO DIV clock from EDP PHY + + clock-names: + items: + - const: bi_tcxo + - const: gcc_disp_gpll0_clk + - const: dsi0_phy_pll_out_byteclk + - const: dsi0_phy_pll_out_dsiclk + - const: dp_phy_pll_link_clk + - const: dp_phy_pll_vco_div_clk + - const: edp_phy_pll_link_clk + - const: edp_phy_pll_vco_div_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@af00000 { + compatible = "qcom,sc7280-dispcc"; + reg = <0x0af00000 0x200000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_DISP_GPLL0_CLK_SRC>, + <&dsi_phy 0>, + <&dsi_phy 1>, + <&dp_phy 0>, + <&dp_phy 1>, + <&edp_phy 0>, + <&edp_phy 1>; + clock-names = "bi_tcxo", + "gcc_disp_gpll0_clk", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk", + "dp_phy_pll_link_clk", + "dp_phy_pll_vco_div_clk", + "edp_phy_pll_link_clk", + "edp_phy_pll_vco_div_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +...include/dt-bindings/clock/qcom,dispcc-sc7280.h new file +0
-0
include/dt-bindings/clock/qcom,dispcc-sc7280.h line 1
Quoted 1 line
include/dt-bindings/clock/qcom,dispcc-sc7280.h new file +1
-0@@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */
Dual license please. I'm tired of telling the company that complained to me about having dual licensing for DT stuff not dual license their stuff. Please pass that on to your coworkers.
Rob
Stephen Boyd
maintainerRe: [PATCH v2 1/6] dt-bindings: clock: Add SC7280 DISPCC clock binding
Quoting Rob Herring (2021-05-03 12:18:37)
Quoted 13 lines · Taniya Das
include/dt-bindings/clock/qcom,dispcc-sc7280.h line 1
Quoted 7 lines
include/dt-bindings/clock/qcom,dispcc-sc7280.h new file +1
-0@@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ Dual license please. I'm tired of telling the company that complained to me about having dual licensing for DT stuff not dual license their stuff. Please pass that on to your coworkers.
Taniya, is this going to be resent?
Stephen Boyd
maintainerRe: [PATCH v2 1/6] dt-bindings: clock: Add SC7280 DISPCC clock binding
Quoting Stephen Boyd (2021-06-01 23:55:04)
Quoted 15 lines
Quoting Rob Herring (2021-05-03 12:18:37)
Quoted 13 lines · Taniya Das
include/dt-bindings/clock/qcom,dispcc-sc7280.h line 1
Quoted 7 lines
include/dt-bindings/clock/qcom,dispcc-sc7280.h new file +1
-0@@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ Dual license please. I'm tired of telling the company that complained to me about having dual licensing for DT stuff not dual license their stuff. Please pass that on to your coworkers.
Quoted 1 line
Taniya, is this going to be resent?
Also, can you update the gcc binding that was already merged?
Re: [PATCH v2 1/6] dt-bindings: clock: Add SC7280 DISPCC clock binding
Hello Stephen,
Thanks for your review.
Quoted 16 lines · Stephen Boyd
Quoting Stephen Boyd (2021-06-01 23:55:04)
Quoted 15 lines
Quoting Rob Herring (2021-05-03 12:18:37)
Quoted 13 lines · Taniya Das
include/dt-bindings/clock/qcom,dispcc-sc7280.h line 1
Quoted 7 lines
include/dt-bindings/clock/qcom,dispcc-sc7280.h new file +1
-0@@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ Dual license please. I'm tired of telling the company that complained to me about having dual licensing for DT stuff not dual license their stuff. Please pass that on to your coworkers.
Quoted 4 lines
Quoted 1 line
Taniya, is this going to be resent?
Also, can you update the gcc binding that was already merged?
Yes, it will be taken care in the next patch series.
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Re: [PATCH v2 1/6] dt-bindings: clock: Add SC7280 DISPCC clock binding
In reply to Rob HerringHello Rob,
Thanks for the review.
Quoted 33 lines · Rob Herring
Quoted 26 lines · Taniya Das
Add device tree bindings for display clock controller subsystem for Qualcomm Technology Inc's SC7280 SoCs.
Signed-off-by Taniya Das <[email protected]>--- .../bindings/clock/qcom,sc7280-dispcc.yaml | 94 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,dispcc-sc7280.h | 55 +++++++++++++ 2 files changed, 149 insertions(+)create mode 100644
Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yamlcreate mode 100644include/dt-bindings/clock/qcom,dispcc-sc7280.hDocumentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml new file +2
-0@@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +...include/dt-bindings/clock/qcom,dispcc-sc7280.h new file +0
-0include/dt-bindings/clock/qcom,dispcc-sc7280.h line 1
Quoted 1 line
include/dt-bindings/clock/qcom,dispcc-sc7280.h new file +1
-0@@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ Dual license please. I'm tired of telling the company that complained to me about having dual licensing for DT stuff not dual license their stuff. Please pass that on to your coworkers.
Quoted 2 lines
Rob
Rob, I have taken a note on this and will be taken care from the next time.
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
PATCH v2 2/6 clk: qcom: Add display clock controller driver for SC7280
In reply to Taniya DasAdd support for the display clock controller found on SC7280 based devices. This would allow display drivers to probe and control their clocks.
--- drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/dispcc-sc7280.c | 908 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 918 insertions(+) create mode 100644 drivers/clk/qcom/dispcc-sc7280.c
drivers/clk/qcom/Kconfig +9 -0
@@ -325,6 +325,15 @@ config SC_DISPCC_7180 Say Y if you want to support display devices and functionality such as splash screen. +config SC_DISPCC_7280 + tristate "SC7280 Display Clock Controller" + select SC_GCC_7280 + help + Support for the display clock controller on Qualcomm Technologies, Inc. + SC7280 devices. + Say Y if you want to support display devices and functionality such as + splash screen. + config SC_GCC_7180 tristate "SC7180 Global Clock Controller" select QCOM_GDSC
drivers/clk/qcom/Makefile +1 -0
@@ -56,6 +56,7 @@ obj-$(CONFIG_QCS_Q6SSTOP_404) += q6sstop-qcs404.o obj-$(CONFIG_QCS_TURING_404) += turingcc-qcs404.o obj-$(CONFIG_SC_CAMCC_7180) += camcc-sc7180.o obj-$(CONFIG_SC_DISPCC_7180) += dispcc-sc7180.o +obj-$(CONFIG_SC_DISPCC_7280) += dispcc-sc7280.o obj-$(CONFIG_SC_GCC_7180) += gcc-sc7180.o obj-$(CONFIG_SC_GCC_7280) += gcc-sc7280.o obj-$(CONFIG_SC_GCC_8180X) += gcc-sc8180x.o
drivers/clk/qcom/dispcc-sc7280.c new file +908 -0
908 lines not on this page · raw message
Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v2 3/6 dt-bindings: clock: Add SC7280 GPUCC clock binding
In reply to Taniya DasAdd device tree bindings for graphics clock subsystem clock controller for Qualcomm Technology Inc's SC7280 SoCs.
--- .../devicetree/bindings/clock/qcom,gpucc.yaml | 4 ++- include/dt-bindings/clock/qcom,gpucc-sc7280.h | 35 ++++++++++++++++++++++ 2 files changed, 38 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/clock/qcom,gpucc-sc7280.h
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +3 -1
@@ -11,11 +11,12 @@ maintainers: description: | Qualcomm graphics clock control module which supports the clocks, resets and - power domains on SDM845/SC7180/SM8150/SM8250. + power domains on SDM845/SC7180/SC7280/SM8150/SM8250. See also: dt-bindings/clock/qcom,gpucc-sdm845.h dt-bindings/clock/qcom,gpucc-sc7180.h + dt-bindings/clock/qcom,gpucc-sc7280.h dt-bindings/clock/qcom,gpucc-sm8150.h dt-bindings/clock/qcom,gpucc-sm8250.h
@@ -24,6 +25,7 @@ properties: enum: - qcom,sdm845-gpucc - qcom,sc7180-gpucc + - qcom,sc7280-gpucc - qcom,sm8150-gpucc - qcom,sm8250-gpucc
include/dt-bindings/clock/qcom,gpucc-sc7280.h new file +35 -0
@@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H + +/* GPU_CC clocks */ +#define GPU_CC_PLL0 0 +#define GPU_CC_PLL1 1 +#define GPU_CC_AHB_CLK 2 +#define GPU_CC_CB_CLK 3 +#define GPU_CC_CRC_AHB_CLK 4 +#define GPU_CC_CX_GMU_CLK 5 +#define GPU_CC_CX_SNOC_DVM_CLK 6 +#define GPU_CC_CXO_AON_CLK 7 +#define GPU_CC_CXO_CLK 8 +#define GPU_CC_GMU_CLK_SRC 9 +#define GPU_CC_GX_GMU_CLK 10 +#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 11 +#define GPU_CC_HUB_AHB_DIV_CLK_SRC 12 +#define GPU_CC_HUB_AON_CLK 13 +#define GPU_CC_HUB_CLK_SRC 14 +#define GPU_CC_HUB_CX_INT_CLK 15 +#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 16 +#define GPU_CC_MND1X_0_GFX3D_CLK 17 +#define GPU_CC_MND1X_1_GFX3D_CLK 18 +#define GPU_CC_SLEEP_CLK 19 + +/* GPU_CC power domains */ +#define GPU_CC_CX_GDSC 0 +#define GPU_CC_GX_GDSC 1 + +#endif
Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Stephen Boyd
maintainerRe: [PATCH v2 3/6] dt-bindings: clock: Add SC7280 GPUCC clock binding
Quoting Taniya Das (2021-04-27 03:33:07)
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml maintainers: · line 14
Quoted 10 lines
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +1
-1@@ -11,11 +11,12 @@ maintainers: description: | Qualcomm graphics clock control module which supports the clocks, resets and - power domains on SDM845/SC7180/SM8150/SM8250. + power domains on SDM845/SC7180/SC7280/SM8150/SM8250.
Can we stop updating this line? Just say "power domains on Qualcomm SoCs"?
Quoted 16 lines
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +2
-0See also: dt-bindings/clock/qcom,gpucc-sdm845.h dt-bindings/clock/qcom,gpucc-sc7180.h + dt-bindings/clock/qcom,gpucc-sc7280.h dt-bindings/clock/qcom,gpucc-sm8150.h dt-bindings/clock/qcom,gpucc-sm8250.h@@ -24,6 +25,7 @@ properties: enum: - qcom,sdm845-gpucc - qcom,sc7180-gpucc + - qcom,sc7280-gpucc - qcom,sm8150-gpucc - qcom,sm8250-gpucc
Re: [PATCH v2 3/6] dt-bindings: clock: Add SC7280 GPUCC clock binding
Hello Stephen,
Thanks for your review.
Quoted 7 lines · Stephen Boyd
Quoting Taniya Das (2021-04-27 03:33:07)
Quoted 6 lines
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +0
-0@@ -11,11 +11,12 @@ maintainers:
Quoted 8 lines
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml maintainers: · line 14
Quoted 4 lines
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +1
-1description: | Qualcomm graphics clock control module which supports the clocks, resets and - power domains on SDM845/SC7180/SM8150/SM8250. + power domains on SDM845/SC7180/SC7280/SM8150/SM8250.Can we stop updating this line? Just say "power domains on Qualcomm SoCs"?
This will be updated in the next series.
Quoted 16 lines
Quoted 16 lines
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +2
-0See also: dt-bindings/clock/qcom,gpucc-sdm845.h dt-bindings/clock/qcom,gpucc-sc7180.h + dt-bindings/clock/qcom,gpucc-sc7280.h dt-bindings/clock/qcom,gpucc-sm8150.h dt-bindings/clock/qcom,gpucc-sm8250.h@@ -24,6 +25,7 @@ properties: enum: - qcom,sdm845-gpucc - qcom,sc7180-gpucc + - qcom,sc7280-gpucc - qcom,sm8150-gpucc - qcom,sm8250-gpucc
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
PATCH v2 4/6 clk: qcom: Add graphics clock controller driver for SC7280
In reply to Taniya DasAdd support for the graphics clock controller found on SC7280 based devices. This would allow graphics drivers to probe and control their clocks.
--- drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gpucc-sc7280.c | 491 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 500 insertions(+) create mode 100644 drivers/clk/qcom/gpucc-sc7280.c
drivers/clk/qcom/Kconfig +8 -0
@@ -378,6 +378,14 @@ config SC_GPUCC_7180 Say Y if you want to support graphics controller devices and functionality such as 3D graphics. +config SC_GPUCC_7280 + tristate "SC7280 Graphics Clock Controller" + select SC_GCC_7280 + help + Support for the graphics clock controller on SC7280 devices. + Say Y if you want to support graphics controller devices and + functionality such as 3D graphics. + config SC_MSS_7180 tristate "SC7180 Modem Clock Controller" select SC_GCC_7180
drivers/clk/qcom/Makefile +1 -0
@@ -61,6 +61,7 @@ obj-$(CONFIG_SC_GCC_7180) += gcc-sc7180.o obj-$(CONFIG_SC_GCC_7280) += gcc-sc7280.o obj-$(CONFIG_SC_GCC_8180X) += gcc-sc8180x.o obj-$(CONFIG_SC_GPUCC_7180) += gpucc-sc7180.o +obj-$(CONFIG_SC_GPUCC_7280) += gpucc-sc7280.o obj-$(CONFIG_SC_LPASS_CORECC_7180) += lpasscorecc-sc7180.o obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o
drivers/clk/qcom/gpucc-sc7280.c new file +491 -0
491 lines not on this page · raw message
Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v2 5/6 dt-bindings: clock: Add SC7280 VideoCC clock binding
In reply to Taniya DasAdd device tree bindings for video clock subsystem clock controller for Qualcomm Technology Inc's SC7280 SoCs.
--- .../devicetree/bindings/clock/qcom,videocc.yaml | 4 +++- include/dt-bindings/clock/qcom,videocc-sc7280.h | 27 ++++++++++++++++++++++ 2 files changed, 30 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/clock/qcom,videocc-sc7280.h
Documentation/devicetree/bindings/clock/qcom,videocc.yaml +3 -1
@@ -11,10 +11,11 @@ maintainers: description: | Qualcomm video clock control module which supports the clocks, resets and - power domains on SDM845/SC7180/SM8150/SM8250. + power domains on SDM845/SC7180/SC7280/SM8150/SM8250. See also: dt-bindings/clock/qcom,videocc-sc7180.h + dt-bindings/clock/qcom,videocc-sc7280.h dt-bindings/clock/qcom,videocc-sdm845.h dt-bindings/clock/qcom,videocc-sm8150.h dt-bindings/clock/qcom,videocc-sm8250.h
@@ -23,6 +24,7 @@ properties: compatible: enum: - qcom,sc7180-videocc + - qcom,sc7280-videocc - qcom,sdm845-videocc - qcom,sm8150-videocc - qcom,sm8250-videocc
include/dt-bindings/clock/qcom,videocc-sc7280.h new file +27 -0
@@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SC7280_H + +/* VIDEO_CC clocks */ +#define VIDEO_PLL0 0 +#define VIDEO_CC_IRIS_AHB_CLK 1 +#define VIDEO_CC_IRIS_CLK_SRC 2 +#define VIDEO_CC_MVS0_AXI_CLK 3 +#define VIDEO_CC_MVS0_CORE_CLK 4 +#define VIDEO_CC_MVSC_CORE_CLK 5 +#define VIDEO_CC_MVSC_CTL_AXI_CLK 6 +#define VIDEO_CC_SLEEP_CLK 7 +#define VIDEO_CC_SLEEP_CLK_SRC 8 +#define VIDEO_CC_VENUS_AHB_CLK 9 +#define VIDEO_CC_XO_CLK 10 +#define VIDEO_CC_XO_CLK_SRC 11 + +/* VIDEO_CC power domains */ +#define MVS0_GDSC 0 +#define MVSC_GDSC 1 + +#endif
Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Stephen Boyd
maintainerRe: [PATCH v2 5/6] dt-bindings: clock: Add SC7280 VideoCC clock binding
Quoting Taniya Das (2021-04-27 03:33:09)
Documentation/devicetree/bindings/clock/qcom,videocc.yaml maintainers: · line 14
Quoted 10 lines
Documentation/devicetree/bindings/clock/qcom,videocc.yaml +1
-1@@ -11,10 +11,11 @@ maintainers: description: | Qualcomm video clock control module which supports the clocks, resets and - power domains on SDM845/SC7180/SM8150/SM8250. + power domains on SDM845/SC7180/SC7280/SM8150/SM8250.
Same noise comment.
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Documentation/devicetree/bindings/clock/qcom,videocc.yaml +2
-0See also: dt-bindings/clock/qcom,videocc-sc7180.h + dt-bindings/clock/qcom,videocc-sc7280.h dt-bindings/clock/qcom,videocc-sdm845.h dt-bindings/clock/qcom,videocc-sm8150.h dt-bindings/clock/qcom,videocc-sm8250.h@@ -23,6 +24,7 @@ properties: compatible: enum: - qcom,sc7180-videocc + - qcom,sc7280-videocc - qcom,sdm845-videocc - qcom,sm8150-videocc - qcom,sm8250-videocc
PATCH v2 6/6 clk: qcom: Add video clock controller driver for SC7280
In reply to Taniya DasAdd support for the video clock controller found on SC7280 based devices. This would allow video drivers to probe and control their clocks.
--- drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/videocc-sc7280.c | 372 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 381 insertions(+) create mode 100644 drivers/clk/qcom/videocc-sc7280.c
drivers/clk/qcom/Kconfig +8 -0
@@ -403,6 +403,14 @@ config SC_VIDEOCC_7180 Say Y if you want to support video devices and functionality such as video encode and decode. +config SC_VIDEOCC_7280 + tristate "SC7280 Video Clock Controller" + select SC_GCC_7280 + help + Support for the video clock controller on SC7280 devices. + Say Y if you want to support video devices and functionality such as + video encode and decode. + config SDM_CAMCC_845 tristate "SDM845 Camera Clock Controller" select SDM_GCC_845
drivers/clk/qcom/Makefile +1 -0
@@ -65,6 +65,7 @@ obj-$(CONFIG_SC_GPUCC_7280) += gpucc-sc7280.o obj-$(CONFIG_SC_LPASS_CORECC_7180) += lpasscorecc-sc7180.o obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o +obj-$(CONFIG_SC_VIDEOCC_7280) += videocc-sc7280.o obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o obj-$(CONFIG_SDM_GCC_660) += gcc-sdm660.o
drivers/clk/qcom/videocc-sc7280.c new file +372 -0
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Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Stephen Boyd
maintainerRe: [PATCH v2 6/6] clk: qcom: Add video clock controller driver for SC7280
Quoting Taniya Das (2021-04-27 03:33:10)
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drivers/clk/qcom/videocc-sc7280.c new file +16
-0@@ -0,0 +1,372 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#include <linux/clk-provider.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include <dt-bindings/clock/qcom,videocc-sc7280.h> + +#include "clk-alpha-pll.h" +#include "clk-branch.h" +#include "clk-rcg.h" +#include "common.h"
drivers/clk/qcom/videocc-sc7280.c line 26
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drivers/clk/qcom/videocc-sc7280.c new file +10
-0+#include "reset.h" +#include "gdsc.h" + +enum { +P_BI_TCXO , +P_SLEEP_CLK , +P_VIDEO_PLL0_OUT_EVEN , +}; + +static struct pll_vco lucid_vco[] = {
const?
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drivers/clk/qcom/videocc-sc7280.c new file +3
-0+ { 249600000, 2000000000, 0 }, +}; +
[...]
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drivers/clk/qcom/videocc-sc7280.c new file +15
-0+ +static const struct parent_map video_cc_parent_map_0[] = { + {P_BI_TCXO ,0 }, + {P_VIDEO_PLL0_OUT_EVEN ,3 }, +}; + +static const struct clk_parent_data video_cc_parent_data_0[] = { + { .fw_name ="bi_tcxo" }, + { .hw = &video_pll0.clkr.hw }, +}; + +static const struct parent_map video_cc_parent_map_1[] = { + {P_SLEEP_CLK ,0 }, +}; +
drivers/clk/qcom/videocc-sc7280.c line 82
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drivers/clk/qcom/videocc-sc7280.c new file +10
-0+static const struct clk_parent_data video_cc_parent_data_1[] = { + { .fw_name ="sleep_clk" }, +}; + +static const struct parent_map video_cc_parent_map_2[] = { + {P_BI_TCXO ,0 }, +}; + +static const struct clk_parent_data video_cc_parent_data_2_ao[] = { + { .fw_name ="bi_tcxo_ao" },
This is new. Why would we want the video clk parent state to turn off when the CPU is off? Does the video engine keep XO enabled for itself? Can you please add some comment into the code explaining why it's ok to use the ao clk here?
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drivers/clk/qcom/videocc-sc7280.c new file +10
-0+}; + +static const struct freq_tbl ftbl_video_cc_iris_clk_src[] = { +F (133333333 ,P_VIDEO_PLL0_OUT_EVEN ,3 ,0 ,0 ), +F (240000000 ,P_VIDEO_PLL0_OUT_EVEN ,2 ,0 ,0 ), +F (335000000 ,P_VIDEO_PLL0_OUT_EVEN ,2 ,0 ,0 ), +F (424000000 ,P_VIDEO_PLL0_OUT_EVEN ,2 ,0 ,0 ), +F (460000000 ,P_VIDEO_PLL0_OUT_EVEN ,2 ,0 ,0 ), + { } +};
[...]
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drivers/clk/qcom/videocc-sc7280.c new file +4
-0+ +static struct clk_branch video_cc_xo_clk = { + .halt_reg =0x7018 , + .halt_check =BRANCH_HALT ,
drivers/clk/qcom/videocc-sc7280.c line 272
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drivers/clk/qcom/videocc-sc7280.c new file +10
-0+ .clkr = { + .enable_reg = 0x7018, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "video_cc_xo_clk", + .parent_hws = (const struct clk_hw*[]){ + &video_cc_xo_clk_src.clkr.hw, + }, + .num_parents = 1, + .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,
Please add a comment why it is critical.
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drivers/clk/qcom/videocc-sc7280.c new file +5
-0+ .ops = &clk_branch2_ops, + }, + }, +}; +
Re: [PATCH v2 6/6] clk: qcom: Add video clock controller driver for SC7280
Hello Stephen,
Thanks for your review.
Quoted 27 lines · Stephen Boyd
Quoting Taniya Das (2021-04-27 03:33:10)
Quoted 26 lines
drivers/clk/qcom/videocc-sc7280.c new file +20
-0@@ -0,0 +1,372 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#include <linux/clk-provider.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include <dt-bindings/clock/qcom,videocc-sc7280.h> + +#include "clk-alpha-pll.h" +#include "clk-branch.h" +#include "clk-rcg.h" +#include "common.h" +#include "reset.h" +#include "gdsc.h" + +enum {
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drivers/clk/qcom/videocc-sc7280.c line 26
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drivers/clk/qcom/videocc-sc7280.c new file +6
-0+P_BI_TCXO , +P_SLEEP_CLK , + P_VIDEO_PLL0_OUT_EVEN, +}; + +static struct pll_vco lucid_vco[] = {const?
Yes, next patch will have this updated.
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drivers/clk/qcom/videocc-sc7280.c new file +3
-0+ { 249600000, 2000000000, 0 }, +}; +[...]
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drivers/clk/qcom/videocc-sc7280.c new file +22
-0+ +static const struct parent_map video_cc_parent_map_0[] = { + {P_BI_TCXO ,0 }, + {P_VIDEO_PLL0_OUT_EVEN ,3 }, +}; + +static const struct clk_parent_data video_cc_parent_data_0[] = { + { .fw_name ="bi_tcxo" }, + { .hw = &video_pll0.clkr.hw }, +}; + +static const struct parent_map video_cc_parent_map_1[] = { + {P_SLEEP_CLK ,0 }, +}; + +static const struct clk_parent_data video_cc_parent_data_1[] = { + { .fw_name ="sleep_clk" }, +}; + +static const struct parent_map video_cc_parent_map_2[] = { + {P_BI_TCXO ,0 }, +};
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drivers/clk/qcom/videocc-sc7280.c line 82
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drivers/clk/qcom/videocc-sc7280.c new file +3
-0+ +static const struct clk_parent_data video_cc_parent_data_2_ao[] = { + { .fw_name ="bi_tcxo_ao" },This is new. Why would we want the video clk parent state to turn off when the CPU is off? Does the video engine keep XO enabled for itself? Can you please add some comment into the code explaining why it's ok to use the ao clk here?
This clock is from HW design is enabled, thus our generation scripts have marked it to _ao. But I will be removing this in the next patch as it is not required to be modelled.
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drivers/clk/qcom/videocc-sc7280.c new file +10
-0+}; + +static const struct freq_tbl ftbl_video_cc_iris_clk_src[] = { +F (133333333 ,P_VIDEO_PLL0_OUT_EVEN ,3 ,0 ,0 ), +F (240000000 ,P_VIDEO_PLL0_OUT_EVEN ,2 ,0 ,0 ), +F (335000000 ,P_VIDEO_PLL0_OUT_EVEN ,2 ,0 ,0 ), +F (424000000 ,P_VIDEO_PLL0_OUT_EVEN ,2 ,0 ,0 ), +F (460000000 ,P_VIDEO_PLL0_OUT_EVEN ,2 ,0 ,0 ), + { } +};[...]
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drivers/clk/qcom/videocc-sc7280.c new file +4
-0+ +static struct clk_branch video_cc_xo_clk = { + .halt_reg =0x7018 , + .halt_check =BRANCH_HALT ,drivers/clk/qcom/videocc-sc7280.c line 272
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drivers/clk/qcom/videocc-sc7280.c new file +10
-0+ .clkr = { + .enable_reg = 0x7018, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "video_cc_xo_clk", + .parent_hws = (const struct clk_hw*[]){ + &video_cc_xo_clk_src.clkr.hw, + }, + .num_parents = 1, + .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,Please add a comment why it is critical.
Next patch will remove this clock. As it is already enabled from HW, will not model the clock to not disable it from SW.
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drivers/clk/qcom/videocc-sc7280.c new file +5
-0+ .ops = &clk_branch2_ops, + }, + }, +}; +
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --