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drm/msm/dsi: Add display DSI support for SC7280 target

PATCH In review Rajeev Nandan 3 participants 8 messages Jun 22, 2021 – Jul 21, 2021

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Device tree bindings DRM drivers DRM misc Arm Qualcomm mailing list +1 more subsystems
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Rajeev Nandan

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#0 lore raw

v2 cover drm/msm/dsi: Add display DSI support for SC7280 target

Changes in this series add support for MSM display DSI CTRL & PHY drivers for the SC7280 SoC, which has DSI controller v2.5.0 and DSI PHY v4.1.

Changes in v2:
- Dropped patch #1 (dt-bindings: msm/dsi: Add yaml schema for 7nm DSI PHY) and reused Jonathan's patch [1] (dt-bindings: msm: dsi: add missing 7nm bindings)
- Added new patch (dt-bindings: msm/dsi: Add sc7280 7nm dsi phy) Now using <vendor>,<soc>-<block> format for "compatible" property (Rob)
- Fixed clang warning for max_pll_rate as per [2] (Dmitry Baryshkov)
- Fixed num_dsi_phy and io_start (Dmitry Baryshkov)

[1] https://lore.kernel.org/linux-arm-msm/[email protected]/
[2] https://lore.kernel.org/linux-arm-msm/[email protected]/

Rajeev Nandan (3):
dt-bindings: msm/dsi: Add sc7280 7nm dsi phy
drm/msm/dsi: Add PHY configuration for SC7280
drm/msm/dsi: Add DSI support for SC7280

 .../bindings/display/msm/dsi-phy-7nm.yaml          |  1 +
 drivers/gpu/drm/msm/Kconfig                        |  6 ++---
 drivers/gpu/drm/msm/dsi/dsi_cfg.c                  | 20 +++++++++++++++++
 drivers/gpu/drm/msm/dsi/dsi_cfg.h                  |  1 +
 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c              |  2 ++
 drivers/gpu/drm/msm/dsi/phy/dsi_phy.h              |  1 +
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c          | 26 ++++++++++++++++++++++
 7 files changed, 54 insertions(+), 3 deletions(-)
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH v2 1/3 dt-bindings: msm/dsi: Add sc7280 7nm dsi phy

The SC7280 SoC uses the 7nm (V4.1) DSI PHY driver.

Signed-off-by Rajeev Nandan <[email protected]>

---

Changes in v2:
- New
This patch depends on [1] (dt-bindings: msm: dsi: add missing 7nm bindings)

[1] https://lore.kernel.org/linux-arm-msm/[email protected]/

 Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml +1 -0
index c0077ca..d282b00 100644
@@ -17,6 +17,7 @@ properties:
     oneOf:
       - const: qcom,dsi-phy-7nm
       - const: qcom,dsi-phy-7nm-8150
+      - const: qcom,sc7280-dsi-phy-7nm
 
   reg:
     items:
Signature · 1 line
2.7.4
maintainer Acked-by on v2 1/3
#2 lore raw

Re: [v2 1/3] dt-bindings: msm/dsi: Add sc7280 7nm dsi phy

Quoted 5 lines · Rajeev Nandan

The SC7280 SoC uses the 7nm (V4.1) DSI PHY driver.

Signed-off-by Rajeev Nandan <[email protected]>

---

Quoted 9 lines

Changes in v2:
- New
This patch depends on [1] (dt-bindings: msm: dsi: add missing 7nm bindings)

[1] https://lore.kernel.org/linux-arm-msm/[email protected]/

 Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
 1 file changed, 1 insertion(+)
Acked-by Rob Herring <[email protected]>
author
#4 lore raw

PATCH v2 2/3 drm/msm/dsi: Add PHY configuration for SC7280

In reply to Rajeev Nandan

The SC7280 SoC uses the 7nm (V4.1) DSI PHY driver with different enable|disable regulator loads.

Signed-off-by Rajeev Nandan <[email protected]>
Reviewed-by Dmitry Baryshkov <[email protected]>

---

Changes in v2:
- Fixed clang warning for max_pll_rate as per [1] (Dmitry Baryshkov)
- Fixed num_dsi_phy and io_start (Dmitry Baryshkov)

[1] https://lore.kernel.org/linux-arm-msm/[email protected]/

 drivers/gpu/drm/msm/Kconfig               |  6 +++---
 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c     |  2 ++
 drivers/gpu/drm/msm/dsi/phy/dsi_phy.h     |  1 +
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 26 ++++++++++++++++++++++++++
 4 files changed, 32 insertions(+), 3 deletions(-)
drivers/gpu/drm/msm/Kconfig +3 -3
index 10f693e..7c9d9f1 100644
@@ -114,9 +114,9 @@ config DRM_MSM_DSI_10NM_PHY
 	  Choose this option if DSI PHY on SDM845 is used on the platform.
 
 config DRM_MSM_DSI_7NM_PHY
-	bool "Enable DSI 7nm PHY driver in MSM DRM (used by SM8150/SM8250)"
+	bool "Enable DSI 7nm PHY driver in MSM DRM"
 	depends on DRM_MSM_DSI
 	default y
 	help
-	  Choose this option if DSI PHY on SM8150/SM8250 is used on the
-	  platform.
+	  Choose this option if DSI PHY on SM8150/SM8250/SC7280 is used on
+	  the platform.
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +2 -0
index ff7f2ec..ea023d4 100644
@@ -593,6 +593,8 @@ static const struct of_device_id dsi_phy_dt_match[] = {
 	  .data = &dsi_phy_7nm_cfgs },
 	{ .compatible = "qcom,dsi-phy-7nm-8150",
 	  .data = &dsi_phy_7nm_8150_cfgs },
+	{ .compatible = "qcom,sc7280-dsi-phy-7nm",
+	  .data = &dsi_phy_7nm_7280_cfgs },
 #endif
 	{}
 };
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h +1 -0
index 94a77ac..bc91dc8 100644
@@ -51,6 +51,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs;
+extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs;
 
 struct msm_dsi_dphy_timing {
 	u32 clk_zero;
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +26 -0
index e76ce40..144c7c0 100644
@@ -998,3 +998,29 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs = {
 	.io_start = { 0xae94400, 0xae96400 },
 	.num_dsi_phy = 2,
 };
+
+const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs = {
+	.has_phy_lane = true,
+	.reg_cfg = {
+		.num = 1,
+		.regs = {
+			{"vdds", 37550, 0},
+		},
+	},
+	.ops = {
+		.enable = dsi_7nm_phy_enable,
+		.disable = dsi_7nm_phy_disable,
+		.pll_init = dsi_pll_7nm_init,
+		.save_pll_state = dsi_7nm_pll_save_state,
+		.restore_pll_state = dsi_7nm_pll_restore_state,
+	},
+	.min_pll_rate = 600000000UL,
+#ifdef CONFIG_64BIT
+	.max_pll_rate = 5000000000ULL,
+#else
+	.max_pll_rate = ULONG_MAX,
+#endif
+	.io_start = { 0xae94400 },
+	.num_dsi_phy = 1,
+	.quirks = DSI_PHY_7NM_QUIRK_V4_1,
+};
Signature · 1 line
2.7.4
author
#6 lore raw

PATCH v2 3/3 drm/msm/dsi: Add DSI support for SC7280

In reply to Rajeev Nandan

Add support for v2.5.0 DSI block in the SC7280 SoC.

Signed-off-by Rajeev Nandan <[email protected]>
Reviewed-by Dmitry Baryshkov <[email protected]>

---

(no changes since v1)

 drivers/gpu/drm/msm/dsi/dsi_cfg.c | 20 ++++++++++++++++++++
 drivers/gpu/drm/msm/dsi/dsi_cfg.h |  1 +
 2 files changed, 21 insertions(+)
drivers/gpu/drm/msm/dsi/dsi_cfg.c +20 -0
index f3f1c03..d76a680 100644
@@ -200,6 +200,24 @@ static const struct msm_dsi_config sc7180_dsi_cfg = {
 	.num_dsi = 1,
 };
 
+static const char * const dsi_sc7280_bus_clk_names[] = {
+	"iface", "bus",
+};
+
+static const struct msm_dsi_config sc7280_dsi_cfg = {
+	.io_offset = DSI_6G_REG_SHIFT,
+	.reg_cfg = {
+		.num = 1,
+		.regs = {
+			{"vdda", 8350, 0 },	/* 1.2 V */
+		},
+	},
+	.bus_clk_names = dsi_sc7280_bus_clk_names,
+	.num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names),
+	.io_start = { 0xae94000 },
+	.num_dsi = 1,
+};
+
 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
 	.link_clk_set_rate = dsi_link_clk_set_rate_v2,
 	.link_clk_enable = dsi_link_clk_enable_v2,

@@ -267,6 +285,8 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
 		&sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1,
 		&sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops},
+	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0,
+		&sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 };
 
 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
drivers/gpu/drm/msm/dsi/dsi_cfg.h +1 -0
index ade9b60..b2c4d5e 100644
@@ -24,6 +24,7 @@
 #define MSM_DSI_6G_VER_MINOR_V2_3_0	0x20030000
 #define MSM_DSI_6G_VER_MINOR_V2_4_0	0x20040000
 #define MSM_DSI_6G_VER_MINOR_V2_4_1	0x20040001
+#define MSM_DSI_6G_VER_MINOR_V2_5_0	0x20050000
 
 #define MSM_DSI_V2_VER_MINOR_8064	0x0
Signature · 1 line
2.7.4