sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support
Subsystems (2)
PATCH 4/13 sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support
From: Magnus Damm <[email protected]>
Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0.
Signed-off-by Magnus Damm <[email protected]>
---
drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 197 +++++++++++++++++++++++++++++++++- 1 file changed, 196 insertions(+), 1 deletion(-)
drivers/pinctrl/sh-pfc/pfc-r8a73a4.c +196 -1
@@ -17,10 +17,13 @@* along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <linux/io.h> #include <linux/kernel.h> +#include <linux/pinctrl/pinconf-generic.h> #include <mach/irqs.h> #include <mach/r8a73a4.h> +#include "core.h" #include "sh_pfc.h" #define CPU_ALL_PORT (fn, pfx, sfx) \
@@ -1420,8 +1423,143 @@ static const pinmux_enum_t pinmux_data[] PINMUX_DATA(IRQ57_MARK, PORT329_FN0), }; +#define R8A73A4_PIN (pin, cfgs) \ + { \ + .name = __stringify(PORT##pin), \ + .enum_id = PORT##pin##_DATA, \ + .configs = cfgs, \ + } + +#define __O (SH_PFC_PIN_CFG_OUTPUT) +#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT) +#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP) + +#define R8A73A4_PIN_IO_PU_PD (pin) R8A73A4_PIN(pin, __IO | __PUD) +#define R8A73A4_PIN_O (pin) R8A73A4_PIN(pin, __O) +static struct sh_pfc_pin pinmux_pins[] = { -GPIO_PORT_ALL (), +R8A73A4_PIN_IO_PU_PD (0 ),R8A73A4_PIN_IO_PU_PD (1 ), +R8A73A4_PIN_IO_PU_PD (2 ),R8A73A4_PIN_IO_PU_PD (3 ), +R8A73A4_PIN_IO_PU_PD (4 ),R8A73A4_PIN_IO_PU_PD (5 ), +R8A73A4_PIN_IO_PU_PD (6 ),R8A73A4_PIN_IO_PU_PD (7 ), +R8A73A4_PIN_IO_PU_PD (8 ),R8A73A4_PIN_IO_PU_PD (9 ), +R8A73A4_PIN_IO_PU_PD (10 ),R8A73A4_PIN_IO_PU_PD (11 ), +R8A73A4_PIN_IO_PU_PD (12 ),R8A73A4_PIN_IO_PU_PD (13 ), +R8A73A4_PIN_IO_PU_PD (14 ),R8A73A4_PIN_IO_PU_PD (15 ), +R8A73A4_PIN_IO_PU_PD (16 ),R8A73A4_PIN_IO_PU_PD (17 ), +R8A73A4_PIN_IO_PU_PD (18 ),R8A73A4_PIN_IO_PU_PD (19 ), +R8A73A4_PIN_IO_PU_PD (20 ),R8A73A4_PIN_IO_PU_PD (21 ), +R8A73A4_PIN_IO_PU_PD (22 ),R8A73A4_PIN_IO_PU_PD (23 ), +R8A73A4_PIN_IO_PU_PD (24 ),R8A73A4_PIN_IO_PU_PD (25 ), +R8A73A4_PIN_IO_PU_PD (26 ),R8A73A4_PIN_IO_PU_PD (27 ), +R8A73A4_PIN_IO_PU_PD (28 ),R8A73A4_PIN_IO_PU_PD (29 ), +R8A73A4_PIN_IO_PU_PD (30 ), +R8A73A4_PIN_IO_PU_PD (32 ),R8A73A4_PIN_IO_PU_PD (33 ), +R8A73A4_PIN_IO_PU_PD (34 ),R8A73A4_PIN_IO_PU_PD (35 ), +R8A73A4_PIN_IO_PU_PD (36 ),R8A73A4_PIN_IO_PU_PD (37 ), +R8A73A4_PIN_IO_PU_PD (38 ),R8A73A4_PIN_IO_PU_PD (39 ), +R8A73A4_PIN_IO_PU_PD (40 ), +R8A73A4_PIN_IO_PU_PD (64 ),R8A73A4_PIN_IO_PU_PD (65 ), +R8A73A4_PIN_IO_PU_PD (66 ),R8A73A4_PIN_IO_PU_PD (67 ), +R8A73A4_PIN_IO_PU_PD (68 ),R8A73A4_PIN_IO_PU_PD (69 ), +R8A73A4_PIN_IO_PU_PD (70 ),R8A73A4_PIN_IO_PU_PD (71 ), +R8A73A4_PIN_IO_PU_PD (72 ),R8A73A4_PIN_IO_PU_PD (73 ), +R8A73A4_PIN_O (74 ),R8A73A4_PIN_IO_PU_PD (75 ), +R8A73A4_PIN_IO_PU_PD (76 ),R8A73A4_PIN_IO_PU_PD (77 ), +R8A73A4_PIN_IO_PU_PD (78 ),R8A73A4_PIN_IO_PU_PD (79 ), +R8A73A4_PIN_IO_PU_PD (80 ),R8A73A4_PIN_IO_PU_PD (81 ), +R8A73A4_PIN_IO_PU_PD (82 ),R8A73A4_PIN_IO_PU_PD (83 ), +R8A73A4_PIN_IO_PU_PD (84 ),R8A73A4_PIN_IO_PU_PD (85 ), +R8A73A4_PIN_IO_PU_PD (96 ),R8A73A4_PIN_IO_PU_PD (97 ), +R8A73A4_PIN_IO_PU_PD (98 ),R8A73A4_PIN_IO_PU_PD (99 ), +R8A73A4_PIN_IO_PU_PD (100 ),R8A73A4_PIN_IO_PU_PD (101 ), +R8A73A4_PIN_IO_PU_PD (102 ),R8A73A4_PIN_IO_PU_PD (103 ), +R8A73A4_PIN_IO_PU_PD (104 ),R8A73A4_PIN_IO_PU_PD (105 ), +R8A73A4_PIN_IO_PU_PD (106 ),R8A73A4_PIN_IO_PU_PD (107 ), +R8A73A4_PIN_IO_PU_PD (108 ),R8A73A4_PIN_IO_PU_PD (109 ), +R8A73A4_PIN_IO_PU_PD (110 ),R8A73A4_PIN_IO_PU_PD (111 ), +R8A73A4_PIN_IO_PU_PD (112 ),R8A73A4_PIN_IO_PU_PD (113 ), +R8A73A4_PIN_IO_PU_PD (114 ),R8A73A4_PIN_IO_PU_PD (115 ), +R8A73A4_PIN_IO_PU_PD (116 ),R8A73A4_PIN_IO_PU_PD (117 ), +R8A73A4_PIN_IO_PU_PD (118 ),R8A73A4_PIN_IO_PU_PD (119 ), +R8A73A4_PIN_IO_PU_PD (120 ),R8A73A4_PIN_IO_PU_PD (121 ), +R8A73A4_PIN_IO_PU_PD (122 ),R8A73A4_PIN_IO_PU_PD (123 ), +R8A73A4_PIN_IO_PU_PD (124 ),R8A73A4_PIN_IO_PU_PD (125 ), +R8A73A4_PIN_IO_PU_PD (126 ), +R8A73A4_PIN_IO_PU_PD (128 ),R8A73A4_PIN_IO_PU_PD (129 ), +R8A73A4_PIN_IO_PU_PD (130 ),R8A73A4_PIN_IO_PU_PD (131 ), +R8A73A4_PIN_IO_PU_PD (132 ),R8A73A4_PIN_IO_PU_PD (133 ), +R8A73A4_PIN_IO_PU_PD (134 ), +R8A73A4_PIN_IO_PU_PD (160 ),R8A73A4_PIN_IO_PU_PD (161 ), +R8A73A4_PIN_IO_PU_PD (162 ),R8A73A4_PIN_IO_PU_PD (163 ), +R8A73A4_PIN_IO_PU_PD (164 ),R8A73A4_PIN_IO_PU_PD (165 ), +R8A73A4_PIN_IO_PU_PD (166 ),R8A73A4_PIN_IO_PU_PD (167 ), +R8A73A4_PIN_IO_PU_PD (168 ),R8A73A4_PIN_IO_PU_PD (169 ), +R8A73A4_PIN_IO_PU_PD (170 ),R8A73A4_PIN_IO_PU_PD (171 ), +R8A73A4_PIN_IO_PU_PD (172 ),R8A73A4_PIN_IO_PU_PD (173 ), +R8A73A4_PIN_IO_PU_PD (174 ),R8A73A4_PIN_IO_PU_PD (175 ), +R8A73A4_PIN_IO_PU_PD (176 ),R8A73A4_PIN_IO_PU_PD (177 ), +R8A73A4_PIN_IO_PU_PD (178 ), +R8A73A4_PIN_IO_PU_PD (192 ),R8A73A4_PIN_IO_PU_PD (193 ), +R8A73A4_PIN_IO_PU_PD (194 ),R8A73A4_PIN_IO_PU_PD (195 ), +R8A73A4_PIN_IO_PU_PD (196 ),R8A73A4_PIN_IO_PU_PD (197 ), +R8A73A4_PIN_IO_PU_PD (198 ),R8A73A4_PIN_IO_PU_PD (199 ), +R8A73A4_PIN_IO_PU_PD (200 ),R8A73A4_PIN_IO_PU_PD (201 ), +R8A73A4_PIN_IO_PU_PD (202 ),R8A73A4_PIN_IO_PU_PD (203 ), +R8A73A4_PIN_IO_PU_PD (204 ),R8A73A4_PIN_IO_PU_PD (205 ), +R8A73A4_PIN_IO_PU_PD (206 ),R8A73A4_PIN_IO_PU_PD (207 ), +R8A73A4_PIN_IO_PU_PD (208 ),R8A73A4_PIN_IO_PU_PD (209 ), +R8A73A4_PIN_IO_PU_PD (210 ),R8A73A4_PIN_IO_PU_PD (211 ), +R8A73A4_PIN_IO_PU_PD (212 ),R8A73A4_PIN_IO_PU_PD (213 ), +R8A73A4_PIN_IO_PU_PD (214 ),R8A73A4_PIN_IO_PU_PD (215 ), +R8A73A4_PIN_IO_PU_PD (216 ),R8A73A4_PIN_IO_PU_PD (217 ), +R8A73A4_PIN_IO_PU_PD (218 ),R8A73A4_PIN_IO_PU_PD (219 ), +R8A73A4_PIN_IO_PU_PD (220 ),R8A73A4_PIN_IO_PU_PD (221 ), +R8A73A4_PIN_IO_PU_PD (222 ), +R8A73A4_PIN_IO_PU_PD (224 ),R8A73A4_PIN_IO_PU_PD (225 ), +R8A73A4_PIN_IO_PU_PD (226 ),R8A73A4_PIN_IO_PU_PD (227 ), +R8A73A4_PIN_IO_PU_PD (228 ),R8A73A4_PIN_IO_PU_PD (229 ), +R8A73A4_PIN_IO_PU_PD (230 ),R8A73A4_PIN_IO_PU_PD (231 ), +R8A73A4_PIN_IO_PU_PD (232 ),R8A73A4_PIN_IO_PU_PD (233 ), +R8A73A4_PIN_IO_PU_PD (234 ),R8A73A4_PIN_IO_PU_PD (235 ), +R8A73A4_PIN_IO_PU_PD (236 ),R8A73A4_PIN_IO_PU_PD (237 ), +R8A73A4_PIN_IO_PU_PD (238 ),R8A73A4_PIN_IO_PU_PD (239 ), +R8A73A4_PIN_IO_PU_PD (240 ),R8A73A4_PIN_IO_PU_PD (241 ), +R8A73A4_PIN_IO_PU_PD (242 ),R8A73A4_PIN_IO_PU_PD (243 ), +R8A73A4_PIN_IO_PU_PD (244 ),R8A73A4_PIN_IO_PU_PD (245 ), +R8A73A4_PIN_IO_PU_PD (246 ),R8A73A4_PIN_IO_PU_PD (247 ), +R8A73A4_PIN_IO_PU_PD (248 ),R8A73A4_PIN_IO_PU_PD (249 ), +R8A73A4_PIN_IO_PU_PD (250 ), +R8A73A4_PIN_IO_PU_PD (256 ),R8A73A4_PIN_IO_PU_PD (257 ), +R8A73A4_PIN_IO_PU_PD (258 ),R8A73A4_PIN_IO_PU_PD (259 ), +R8A73A4_PIN_IO_PU_PD (260 ),R8A73A4_PIN_IO_PU_PD (261 ), +R8A73A4_PIN_IO_PU_PD (262 ),R8A73A4_PIN_IO_PU_PD (263 ), +R8A73A4_PIN_IO_PU_PD (264 ),R8A73A4_PIN_IO_PU_PD (265 ), +R8A73A4_PIN_IO_PU_PD (266 ),R8A73A4_PIN_IO_PU_PD (267 ), +R8A73A4_PIN_IO_PU_PD (268 ),R8A73A4_PIN_IO_PU_PD (269 ), +R8A73A4_PIN_IO_PU_PD (270 ),R8A73A4_PIN_IO_PU_PD (271 ), +R8A73A4_PIN_IO_PU_PD (272 ),R8A73A4_PIN_IO_PU_PD (273 ), +R8A73A4_PIN_IO_PU_PD (274 ),R8A73A4_PIN_IO_PU_PD (275 ), +R8A73A4_PIN_IO_PU_PD (276 ),R8A73A4_PIN_IO_PU_PD (277 ), +R8A73A4_PIN_IO_PU_PD (278 ),R8A73A4_PIN_IO_PU_PD (279 ), +R8A73A4_PIN_IO_PU_PD (280 ),R8A73A4_PIN_IO_PU_PD (281 ), +R8A73A4_PIN_IO_PU_PD (282 ),R8A73A4_PIN_IO_PU_PD (283 ), +R8A73A4_PIN_O (288 ),R8A73A4_PIN_IO_PU_PD (289 ), +R8A73A4_PIN_IO_PU_PD (290 ),R8A73A4_PIN_IO_PU_PD (291 ), +R8A73A4_PIN_IO_PU_PD (292 ),R8A73A4_PIN_IO_PU_PD (293 ), +R8A73A4_PIN_IO_PU_PD (294 ),R8A73A4_PIN_IO_PU_PD (295 ), +R8A73A4_PIN_IO_PU_PD (296 ),R8A73A4_PIN_IO_PU_PD (297 ), +R8A73A4_PIN_IO_PU_PD (298 ),R8A73A4_PIN_IO_PU_PD (299 ), +R8A73A4_PIN_IO_PU_PD (300 ),R8A73A4_PIN_IO_PU_PD (301 ), +R8A73A4_PIN_IO_PU_PD (302 ),R8A73A4_PIN_IO_PU_PD (303 ), +R8A73A4_PIN_IO_PU_PD (304 ),R8A73A4_PIN_IO_PU_PD (305 ), +R8A73A4_PIN_IO_PU_PD (306 ),R8A73A4_PIN_IO_PU_PD (307 ), +R8A73A4_PIN_IO_PU_PD (308 ), +R8A73A4_PIN_IO_PU_PD (320 ),R8A73A4_PIN_IO_PU_PD (321 ), +R8A73A4_PIN_IO_PU_PD (322 ),R8A73A4_PIN_IO_PU_PD (323 ), +R8A73A4_PIN_IO_PU_PD (324 ),R8A73A4_PIN_IO_PU_PD (325 ), +R8A73A4_PIN_IO_PU_PD (326 ),R8A73A4_PIN_IO_PU_PD (327 ), +R8A73A4_PIN_IO_PU_PD (328 ),R8A73A4_PIN_IO_PU_PD (329 ), };static const struct pinmux_range pinmux_ranges[] = {
@@ -2878,8 +3016,65 @@ static const struct pinmux_irq pinmux_irPINMUX_IRQ (irq_pin (56 ),328 ), PINMUX_IRQ(irq_pin(57), 329), }; + +#define PORTCR_PULMD_OFF (0 << 6) +#define PORTCR_PULMD_DOWN (2 << 6) +#define PORTCR_PULMD_UP (3 << 6) +#define PORTCR_PULMD_MASK (3 << 6) + +static const unsigned int r8a73a4_portcr_offsets[] = { +0x00000000 ,0x00001000 ,0x00000000 ,0x00001000 , +0x00001000 ,0x00002000 ,0x00002000 ,0x00002000 , +0x00002000 ,0x00003000 ,0x00003000 , +}; + +static unsigned int r8a73a4_pinmux_get_bias (struct sh_pfc *pfc, +unsigned int pin) +{ +void __iomem *addr; + + addr = pfc->window->virt + r8a73a4_portcr_offsets[pin >>5 ] + pin; + +switch (ioread8 (addr) &PORTCR_PULMD_MASK ) { +case PORTCR_PULMD_UP : +return PIN_CONFIG_BIAS_PULL_UP ; +case PORTCR_PULMD_DOWN : +return PIN_CONFIG_BIAS_PULL_DOWN ; +case PORTCR_PULMD_OFF : +default : +return PIN_CONFIG_BIAS_DISABLE ; + } +} + +static void r8a73a4_pinmux_set_bias (struct sh_pfc *pfc,unsigned int pin, +unsigned int bias) +{ +void __iomem *addr; +u32 value; + + addr = pfc->window->virt + r8a73a4_portcr_offsets[pin >>5 ] + pin; + value =ioread8 (addr) & ~PORTCR_PULMD_MASK ; + +switch (bias) { +case PIN_CONFIG_BIAS_PULL_UP : + value |=PORTCR_PULMD_UP ; +break ; +case PIN_CONFIG_BIAS_PULL_DOWN : + value |=PORTCR_PULMD_DOWN ; +break ; + } + +iowrite8 (value, addr); +} + +static const struct sh_pfc_soc_operations r8a73a4_pinmux_ops = { + .get_bias = r8a73a4_pinmux_get_bias, + .set_bias = r8a73a4_pinmux_set_bias, +}; +const struct sh_pfc_soc_info r8a73a4_pinmux_info = { .name ="r8a73a4_pfc" , + .ops = &r8a73a4_pinmux_ops, .input = {PINMUX_INPUT_BEGIN ,PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
Hi Magnus,
Thanks for the patch.
Quoted 6 lines · On Tuesday 26 March 2013 22:50:27 Magnus Damm wrote:
From: Magnus Damm <[email protected]>
Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0.
Signed-off-by Magnus Damm <[email protected]>
Once again, as I don't have access to the r8a73a4 documentation, I haven't been able to review all details, but the patch looks very good.
Acked-by Laurent Pinchart <[email protected]>
Signature · 3 lines
Regards, Laurent Pinchart
Quoted 6 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0.
Signed-off-by Magnus Damm <[email protected]>
Acked-by Linus Walleij <[email protected]>
I'm uncertain which patches are the latest in this series and might be missing some when reviewing. Then poke me explicitly please.
Yours,
Linus Walleij