dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
PATCH 1/2 dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic properties that are needed in a device tree. Add the LPASS clock IDs for LPASS PIL client to request for the clocks.
Signed-off-by Taniya Das <[email protected]>
--- .../bindings/clock/qcom,sc7280-lpasscc.yaml | 69 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,lpass-sc7280.h | 16 +++++ 2 files changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml create mode 100644 include/dt-bindings/clock/qcom,lpass-sc7280.h
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml new file +69 -0
@@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm LPASS Core Clock Controller Binding for SC7280 + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm LPASS core clock control module which supports the clocks and + power domains on SC7280. + + See also: + - dt-bindings/clock/qcom,lpass-sc7280.h + +properties: + compatible: + enum: + - qcom,sc7280-lpasscc + + clocks: + items: + - description: gcc_cfg_noc_lpass_clk from GCC + + clock-names: + items: + - const: iface + + '#clock-cells': + const: 1 + + reg: + minItems: 3 + items: + - description: LPASS qdsp6ss register + - description: LPASS top-cc register + - description: LPASS cc register + + reg-names: + items: + - const: qdsp6ss + - const: top_cc + - const: cc + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,lpass-sc7280.h> + clock-controller@3000000 { + compatible = "qcom,sc7280-lpasscc"; + reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>; + reg-names = "qdsp6ss", "top_cc", "cc"; + clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; + clock-names = "iface"; + #clock-cells = <1>; + }; +...
include/dt-bindings/clock/qcom,lpass-sc7280.h new file +16 -0
@@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H + +#define LPASS_Q6SS_AHBM_CLK 0 +#define LPASS_Q6SS_AHBS_CLK 1 +#define LPASS_TOP_CC_LPI_Q6_AXIM_HS_CLK 2 +#define LPASS_QDSP6SS_XO_CLK 3 +#define LPASS_QDSP6SS_SLEEP_CLK 4 +#define LPASS_QDSP6SS_CORE_CLK 5 + +#endif
Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH 2/2 clk: qcom: Add lpass clock controller driver for SC7280
Add support for the lpass clock controller found on SC7280 based devices. This would allow lpass peripheral loader drivers to control the clocks to bring the subsystem out of reset.
Signed-off-by Taniya Das <[email protected]>
--- drivers/clk/qcom/Kconfig | 8 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/lpasscc-sc7280.c | 216 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 225 insertions(+) create mode 100644 drivers/clk/qcom/lpasscc-sc7280.c
drivers/clk/qcom/Kconfig +8 -0
@@ -394,6 +394,14 @@ config SC_LPASS_CORECC_7180 Say Y if you want to use LPASS clocks and power domains of the LPASS core clock controller. +config SC_LPASSCC_7280 + tristate "SC7280 Low Power Audio Subsystem (LPAAS) Clock Controller" + select SC_GCC_7280 + help + Support for the LPASS clock controller on SC7280 devices. + Say Y if you want to use the LPASS branch clocks of the LPASS clock + controller to reset the LPASS subsystem. + config SC_GPUCC_7180 tristate "SC7180 Graphics Clock Controller" select SC_GCC_7180
drivers/clk/qcom/Makefile +1 -0
@@ -66,6 +66,7 @@ obj-$(CONFIG_SC_GCC_8180X) += gcc-sc8180x.o obj-$(CONFIG_SC_GPUCC_7180) += gpucc-sc7180.o obj-$(CONFIG_SC_GPUCC_7280) += gpucc-sc7280.o obj-$(CONFIG_SC_LPASS_CORECC_7180) += lpasscorecc-sc7180.o +obj-$(CONFIG_SC_LPASSCC_7280) += lpasscc-sc7280.o obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7280) += videocc-sc7280.o
drivers/clk/qcom/lpasscc-sc7280.c new file +216 -0
216 lines not on this page · raw message
Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Stephen Boyd
maintainerRe: [PATCH v1 2/2] clk: qcom: Add lpass clock controller driver for SC7280
Quoting Taniya Das (2021-08-31 03:36:42)
Quoted 6 lines
drivers/clk/qcom/Kconfig +0
-0@@ -394,6 +394,14 @@ config SC_LPASS_CORECC_7180 Say Y if you want to use LPASS clocks and power domains of the LPASS
drivers/clk/qcom/Kconfig config SC_LPASS_CORECC_7180 · line 404
Quoted 10 lines
drivers/clk/qcom/Kconfig +8
-0core clock controller. +config SC_LPASSCC_7280 + tristate "SC7280 Low Power Audio Subsystem (LPAAS) Clock Controller" + select SC_GCC_7280 + help + Support for the LPASS clock controller on SC7280 devices. + Say Y if you want to use the LPASS branch clocks of the LPASS clock + controller to reset the LPASS subsystem. +
Can you send another patch to move SC_LPASS_CORECC_7180 under SC_GPUCC_7180? This file should be sorted on Kconfig symbol alphabetically.
drivers/clk/qcom/Makefile obj-$(CONFIG_SC_GCC_8180X) += gcc-sc8180x.o · line 69
Quoted 12 lines
drivers/clk/qcom/Kconfig +0
-0config SC_GPUCC_7180 tristate "SC7180 Graphics Clock Controller" select SC_GCC_7180drivers/clk/qcom/Makefile +1
-0@@ -66,6 +66,7 @@ obj-$(CONFIG_SC_GCC_8180X) += gcc-sc8180x.o obj-$(CONFIG_SC_GPUCC_7180) += gpucc-sc7180.o obj-$(CONFIG_SC_GPUCC_7280) += gpucc-sc7280.o obj-$(CONFIG_SC_LPASS_CORECC_7180) += lpasscorecc-sc7180.o +obj-$(CONFIG_SC_LPASSCC_7280) += lpasscc-sc7280.o
This one got it right, almost. LPASSCC comes before LPASS_CORECC though.
Quoted 3 lines
drivers/clk/qcom/Makefile +0
-0obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7280) += videocc-sc7280.o
Re: [PATCH v1 2/2] clk: qcom: Add lpass clock controller driver for SC7280
Hello Stephen,
Thanks for your review.
Quoted 9 lines · Stephen Boyd
Quoting Taniya Das (2021-08-31 03:36:42)
Quoted 8 lines
drivers/clk/qcom/Kconfig +0
-0@@ -394,6 +394,14 @@ config SC_LPASS_CORECC_7180 Say Y if you want to use LPASS clocks and power domains of the LPASS core clock controller.
Quoted 13 lines
drivers/clk/qcom/Kconfig config SC_LPASS_CORECC_7180 · line 404
Quoted 8 lines
drivers/clk/qcom/Kconfig +8
-0+config SC_LPASSCC_7280 + tristate "SC7280 Low Power Audio Subsystem (LPAAS) Clock Controller" + select SC_GCC_7280 + help + Support for the LPASS clock controller on SC7280 devices. + Say Y if you want to use the LPASS branch clocks of the LPASS clock + controller to reset the LPASS subsystem. +Can you send another patch to move
SC_LPASS_CORECC_7180underSC_GPUCC_7180? This file should be sorted onKconfigsymbol alphabetically.
Yes, will send a patch to fix.
Quoted 6 lines
Quoted 6 lines
drivers/clk/qcom/Kconfig +0
-0config SC_GPUCC_7180 tristate "SC7180 Graphics Clock Controller" select SC_GCC_7180drivers/clk/qcom/Makefile +0
-1--- a/drivers/clk/qcom/Makefile
Quoted 9 lines
drivers/clk/qcom/Makefile obj-$(CONFIG_SC_GCC_8180X) += gcc-sc8180x.o · line 69
Quoted 6 lines
+++ b/drivers/clk/qcom/Makefile
drivers/clk/qcom/Makefile +1
-0@@ -66,6 +66,7 @@ obj-$(CONFIG_SC_GCC_8180X) += gcc-sc8180x.o obj-$(CONFIG_SC_GPUCC_7180) += gpucc-sc7180.o obj-$(CONFIG_SC_GPUCC_7280) += gpucc-sc7280.o obj-$(CONFIG_SC_LPASS_CORECC_7180) += lpasscorecc-sc7180.o +obj-$(CONFIG_SC_LPASSCC_7280) += lpasscc-sc7280.oThis one got it right, almost. LPASSCC comes before
LPASS_CORECCthough.
Next patch will fix.
Quoted 3 lines
Quoted 3 lines
drivers/clk/qcom/Makefile +0
-0obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7280) += videocc-sc7280.o
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Rob Herring
maintainerQuoted 44 lines · Taniya Das
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic properties that are needed in a device tree. Add the LPASS clock IDs for LPASS PIL client to request for the clocks.
Signed-off-by Taniya Das <[email protected]>--- .../bindings/clock/qcom,sc7280-lpasscc.yaml | 69 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,lpass-sc7280.h | 16 +++++ 2 files changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml create mode 100644 include/dt-bindings/clock/qcom,lpass-sc7280.hDocumentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml new file +26
-0@@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm LPASS Core Clock Controller Binding for SC7280 + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm LPASS core clock control module which supports the clocks and + power domains on SC7280. + + See also: + - dt-bindings/clock/qcom,lpass-sc7280.h + +properties: + compatible: + enum: + - qcom,sc7280-lpasscc + + clocks: + items: + - description: gcc_cfg_noc_lpass_clk from GCC
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml line 36
Quoted 10 lines
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml new file +10
-0+ + clock-names: + items: + - const: iface + + '#clock-cells': + const: 1 + + reg: + minItems: 3
Don't need minItems equal to 'items' length.
Quoted 39 lines
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml new file +33
-0+ items: + - description: LPASS qdsp6ss register + - description: LPASS top-cc register + - description: LPASS cc register + + reg-names: + items: + - const: qdsp6ss + - const: top_cc + - const: cc + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,lpass-sc7280.h> + clock-controller@3000000 { + compatible = "qcom,sc7280-lpasscc"; + reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>; + reg-names = "qdsp6ss", "top_cc", "cc"; + clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; + clock-names = "iface"; + #clock-cells = <1>; + }; +...include/dt-bindings/clock/qcom,lpass-sc7280.h new file +0
-0
include/dt-bindings/clock/qcom,lpass-sc7280.h line 1
Quoted 1 line
include/dt-bindings/clock/qcom,lpass-sc7280.h new file +1
-0@@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */
Dual license.
Quoted 20 lines
include/dt-bindings/clock/qcom,lpass-sc7280.h new file +15
-0+/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H + +#define LPASS_Q6SS_AHBM_CLK 0 +#define LPASS_Q6SS_AHBS_CLK 1 +#define LPASS_TOP_CC_LPI_Q6_AXIM_HS_CLK 2 +#define LPASS_QDSP6SS_XO_CLK 3 +#define LPASS_QDSP6SS_SLEEP_CLK 4 +#define LPASS_QDSP6SS_CORE_CLK 5 + +#endif Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Hello Rob,
Thanks for your review.
Quoted 49 lines · Rob Herring
Quoted 48 lines · Taniya Das
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic properties that are needed in a device tree. Add the LPASS clock IDs for LPASS PIL client to request for the clocks.
Signed-off-by Taniya Das <[email protected]>--- .../bindings/clock/qcom,sc7280-lpasscc.yaml | 69 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,lpass-sc7280.h | 16 +++++ 2 files changed, 85 insertions(+)create mode 100644
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yamlcreate mode 100644include/dt-bindings/clock/qcom,lpass-sc7280.hDocumentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml new file +30
-0@@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm LPASS Core Clock Controller Binding for SC7280 + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm LPASS core clock control module which supports the clocks and + power domains on SC7280. + + See also: + - dt-bindings/clock/qcom,lpass-sc7280.h + +properties: + compatible: + enum: + - qcom,sc7280-lpasscc + + clocks: + items: + - description: gcc_cfg_noc_lpass_clk from GCC + + clock-names: + items: + - const: iface
Quoted 9 lines
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml line 36
Quoted 6 lines
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml new file +6
-0+ + '#clock-cells': + const: 1 + + reg: + minItems: 3Don't need minItems equal to 'items' length.
Next patch will fix this.
Quoted 34 lines
Quoted 34 lines
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml new file +33
-0+ items: + - description: LPASS qdsp6ss register + - description: LPASS top-cc register + - description: LPASS cc register + + reg-names: + items: + - const: qdsp6ss + - const: top_cc + - const: cc + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,lpass-sc7280.h> + clock-controller@3000000 { + compatible = "qcom,sc7280-lpasscc"; + reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>; + reg-names = "qdsp6ss", "top_cc", "cc"; + clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; + clock-names = "iface"; + #clock-cells = <1>; + }; +...include/dt-bindings/clock/qcom,lpass-sc7280.h +0
-0
Quoted 9 lines
include/dt-bindings/clock/qcom,lpass-sc7280.h line 1
Quoted 6 lines
new file mode 100644
index 0000000..a259463include/dt-bindings/clock/qcom,lpass-sc7280.h new file +1
-0@@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ Dual license.
Yes, my bad, will fix it in the next patch.
Quoted 20 lines
Quoted 20 lines
include/dt-bindings/clock/qcom,lpass-sc7280.h new file +15
-0+/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H + +#define LPASS_Q6SS_AHBM_CLK 0 +#define LPASS_Q6SS_AHBS_CLK 1 +#define LPASS_TOP_CC_LPI_Q6_AXIM_HS_CLK 2 +#define LPASS_QDSP6SS_XO_CLK 3 +#define LPASS_QDSP6SS_SLEEP_CLK 4 +#define LPASS_QDSP6SS_CORE_CLK 5 + +#endif Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --