clk: exynos: Some fixes and cleanup
Subsystems (3)
v2 cover clk: exynos: Some fixes and cleanup
Resending some of patches (1, 3 and 5) as per discussion in thread [1]. Other patches in the series are new.
[1] http://comments.gmane.org/gmane.linux.kernel.samsung-soc/19933
Changes since v1:
* Removed an unnecessary change in Patch 1 as pointed out by Kukjin Kim.
* Added Kukjin's ack to patches 3~6.
Sachin Kamat (6):
clk: exynos4: Staticize local symbols
clk: exynos4: Remove unused function
clk: exynos5250: Staticize local symbols
clk: exynos5420: Staticize local symbols
clk: exynos5440: Staticize local symbols
clk: exynos-audss: Staticize exynos_audss_clk_init
drivers/clk/samsung/clk-exynos-audss.c | 2 +- drivers/clk/samsung/clk-exynos4.c | 42 ++++++++++++-------------------- drivers/clk/samsung/clk-exynos5250.c | 14 +++++------ drivers/clk/samsung/clk-exynos5420.c | 14 +++++------ drivers/clk/samsung/clk-exynos5440.c | 14 +++++------ 5 files changed, 37 insertions(+), 49 deletions(-)
Signature · 1 line
1.7.9.5
PATCH v2 1/6 clk: exynos4: Staticize local symbols
Symbols referenced only in this file are made static.
Signed-off-by Sachin Kamat <[email protected]>
--- drivers/clk/samsung/clk-exynos4.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-)
drivers/clk/samsung/clk-exynos4.c +15 -13
@@ -338,24 +338,24 @@ PNAME(mout_user_aclk200_p4x12) = {"fin_pll", "div_aclk200", };PNAME (mout_user_aclk266_gps_p4x12) = {"fin_pll" ,"div_aclk266_gps" , };/* fixed rate clocks generated outside the soc */ -struct samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[]__initdata = {FRATE (xxti,"xxti" ,NULL ,CLK_IS_ROOT ,0 ),FRATE (xusbxti,"xusbxti" ,NULL ,CLK_IS_ROOT ,0 ), };/* fixed rate clocks generated inside the soc */ -struct samsung_fixed_rate_clock exynos4_fixed_rate_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos4_fixed_rate_clks[]__initdata = {FRATE (none,"sclk_hdmi24m" ,NULL ,CLK_IS_ROOT ,24000000 ),FRATE (none,"sclk_hdmiphy" ,NULL ,CLK_IS_ROOT ,27000000 ),FRATE (none,"sclk_usbphy0" ,NULL ,CLK_IS_ROOT ,48000000 ), }; -struct samsung_fixed_rate_clock exynos4210_fixed_rate_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos4210_fixed_rate_clks[]__initdata = {FRATE (none,"sclk_usbphy1" ,NULL ,CLK_IS_ROOT ,48000000 ), };/* list of mux clocks supported in all exynos4 soc's */ -struct samsung_mux_clock exynos4_mux_clks[]__initdata = { +static struct samsung_mux_clock exynos4_mux_clks[]__initdata = {MUX_FA (mout_apll,"mout_apll" , mout_apll_p,SRC_CPU ,0 ,1 ,CLK_SET_RATE_PARENT ,0 ,"mout_apll" ),MUX (none,"mout_hdmi" , mout_hdmi_p,SRC_TV ,0 ,1 ),
@@ -372,7 +372,7 @@ struct samsung_mux_clock exynos4_mux_clks[] __initdata = { };/* list of mux clocks supported in exynos4210 soc */ -struct samsung_mux_clock exynos4210_mux_clks[]__initdata = { +static struct samsung_mux_clock exynos4210_mux_clks[]__initdata = {MUX (none,"mout_aclk200" , sclk_ampll_p4210,SRC_TOP0 ,12 ,1 ),MUX (none,"mout_aclk100" , sclk_ampll_p4210,SRC_TOP0 ,16 ,1 ),MUX (none,"mout_aclk160" , sclk_ampll_p4210,SRC_TOP0 ,20 ,1 ),
@@ -423,7 +423,7 @@ struct samsung_mux_clock exynos4210_mux_clks[] __initdata = { };/* list of mux clocks supported in exynos4x12 soc */ -struct samsung_mux_clock exynos4x12_mux_clks[]__initdata = { +static struct samsung_mux_clock exynos4x12_mux_clks[]__initdata = {MUX_A (mout_mpll_user_c,"mout_mpll_user_c" , mout_mpll_user_p4x12,SRC_CPU ,24 ,1 ,"mout_mpll" ),MUX (none,"mout_aclk266_gps" , aclk_p4412,SRC_TOP1 ,4 ,1 ),
@@ -491,7 +491,7 @@ struct samsung_mux_clock exynos4x12_mux_clks[] __initdata = { };/* list of divider clocks supported in all exynos4 soc's */ -struct samsung_div_clock exynos4_div_clks[]__initdata = { +static struct samsung_div_clock exynos4_div_clks[]__initdata = {DIV (none,"div_core" ,"mout_core" ,DIV_CPU0 ,0 ,3 ),DIV (none,"div_core2" ,"div_core" ,DIV_CPU0 ,28 ,3 ),DIV (none,"div_fimc0" ,"mout_fimc0" ,DIV_CAM ,0 ,4 ),
@@ -554,7 +554,7 @@ struct samsung_div_clock exynos4_div_clks[] __initdata = { };/* list of divider clocks supported in exynos4210 soc */ -struct samsung_div_clock exynos4210_div_clks[]__initdata = { +static struct samsung_div_clock exynos4210_div_clks[]__initdata = {DIV (aclk200,"aclk200" ,"mout_aclk200" ,DIV_TOP ,0 ,3 ),DIV (sclk_fimg2d,"sclk_fimg2d" ,"mout_g2d" ,DIV_IMAGE ,0 ,4 ),DIV (none,"div_fimd1" ,"mout_fimd1" ,E4210_DIV_LCD1 ,0 ,4 ),
@@ -565,7 +565,7 @@ struct samsung_div_clock exynos4210_div_clks[] __initdata = { };/* list of divider clocks supported in exynos4x12 soc */ -struct samsung_div_clock exynos4x12_div_clks[]__initdata = { +static struct samsung_div_clock exynos4x12_div_clks[]__initdata = {DIV (none,"div_mdnie0" ,"mout_mdnie0" ,DIV_LCD0 ,4 ,4 ),DIV (none,"div_mdnie_pwm0" ,"mout_mdnie_pwm0" ,DIV_LCD0 ,8 ,4 ),DIV (none,"div_mdnie_pwm_pre0" ,"div_mdnie_pwm0" ,DIV_LCD0 ,12 ,4 ),
@@ -590,7 +590,7 @@ struct samsung_div_clock exynos4x12_div_clks[] __initdata = { };/* list of gate clocks supported in all exynos4 soc's */ -struct samsung_gate_clock exynos4_gate_clks[]__initdata = { +static struct samsung_gate_clock exynos4_gate_clks[]__initdata = {/* * After all Exynos4 based platforms are migrated to use device tree, * the device name and clock alias names specified below for some
@@ -782,7 +782,7 @@ struct samsung_gate_clock exynos4_gate_clks[] __initdata = { };/* list of gate clocks supported in exynos4210 soc */ -struct samsung_gate_clock exynos4210_gate_clks[]__initdata = { +static struct samsung_gate_clock exynos4210_gate_clks[]__initdata = {GATE (tvenc,"tvenc" ,"aclk160" ,GATE_IP_TV ,2 ,0 ,0 ),GATE (g2d,"g2d" ,"aclk200" ,E4210_GATE_IP_IMAGE ,0 ,0 ,0 ),GATE (rotator,"rotator" ,"aclk200" ,E4210_GATE_IP_IMAGE ,1 ,0 ,0 ),
@@ -817,7 +817,7 @@ struct samsung_gate_clock exynos4210_gate_clks[] __initdata = { };/* list of gate clocks supported in exynos4x12 soc */ -struct samsung_gate_clock exynos4x12_gate_clks[]__initdata = { +static struct samsung_gate_clock exynos4x12_gate_clks[]__initdata = {GATE (audss,"audss" ,"sclk_epll" ,E4X12_GATE_IP_MAUDIO ,0 ,0 ,0 ),GATE (mdnie0,"mdnie0" ,"aclk160" ,GATE_IP_LCD0 ,2 ,0 ,0 ),GATE (rotator,"rotator" ,"aclk200" ,E4X12_GATE_IP_IMAGE ,1 ,0 ,0 ),
@@ -990,7 +990,9 @@ static __initdata struct of_device_id ext_clk_match[] = { };/* register exynos4 clocks */ -void __init exynos4_clk_init (struct device_node *np,enum exynos4_soc exynos4_soc,void __iomem *reg_base,unsigned long xom) +static void __init exynos4_clk_init (struct device_node *np, +enum exynos4_soc exynos4_soc, +void __iomem *reg_base,unsigned long xom) {struct clk *apll, *mpll, *epll, *vpll;
Signature · 1 line
1.7.9.5
PATCH v2 2/6 clk: exynos4: Remove unused function
In reply to Sachin KamatSubsequent to the cleanup in commit 3c70348c7c ("ARM: EXYNOS:
Remove legacy timer initialization code"), this function has no more users. Hence remove it.
Signed-off-by Sachin Kamat <[email protected]>
--- drivers/clk/samsung/clk-exynos4.c | 14 -------------- 1 file changed, 14 deletions(-)
drivers/clk/samsung/clk-exynos4.c +0 -14
@@ -969,20 +969,6 @@ static void __init exynos4_clk_register_finpll(unsigned long xom) } -/* -* This function allows non-dt platforms to specify the clock speed of the -* xxti and xusbxti clocks. These clocks are then registered with the specified -* clock speed. -*/ -void __init exynos4_clk_register_fixed_ext (unsigned long xxti_f, -unsigned long xusbxti_f) -{ - exynos4_fixed_rate_ext_clks[0 ].fixed_rate = xxti_f; - exynos4_fixed_rate_ext_clks[1 ].fixed_rate = xusbxti_f; -samsung_clk_register_fixed_rate (exynos4_fixed_rate_ext_clks, -ARRAY_SIZE (exynos4_fixed_rate_ext_clks)); -} -static __initdata struct of_device_id ext_clk_match[] = { { .compatible ="samsung,clock-xxti" , .data = (void *)0 , }, { .compatible ="samsung,clock-xusbxti" , .data = (void *)1 , },
Signature · 1 line
1.7.9.5
PATCH v2 3/6 clk: exynos5250: Staticize local symbols
In reply to Sachin KamatSymbols referenced only in this file are made static.
Signed-off-by Sachin Kamat <[email protected]>
Acked-by Kukjin Kim <[email protected]>
--- drivers/clk/samsung/clk-exynos5250.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
drivers/clk/samsung/clk-exynos5250.c +7 -7
@@ -193,24 +193,24 @@ PNAME(mout_spdif_p) = { "sclk_audio0", "sclk_audio1", "sclk_audio2", "spdif_extclk" };/* fixed rate clocks generated outside the soc */ -struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[]__initdata = {FRATE (fin_pll,"fin_pll" ,NULL ,CLK_IS_ROOT ,0 ), };/* fixed rate clocks generated inside the soc */ -struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[]__initdata = {FRATE (none,"sclk_hdmiphy" ,NULL ,CLK_IS_ROOT ,24000000 ),FRATE (none,"sclk_hdmi27m" ,NULL ,CLK_IS_ROOT ,27000000 ),FRATE (none,"sclk_dptxphy" ,NULL ,CLK_IS_ROOT ,24000000 ),FRATE (none,"sclk_uhostphy" ,NULL ,CLK_IS_ROOT ,48000000 ), }; -struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[]__initdata = { +static struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[]__initdata = {FFACTOR (none,"fout_mplldiv2" ,"fout_mpll" ,1 ,2 ,0 ),FFACTOR (none,"fout_bplldiv2" ,"fout_bpll" ,1 ,2 ,0 ), }; -struct samsung_mux_clock exynos5250_mux_clks[]__initdata = { +static struct samsung_mux_clock exynos5250_mux_clks[]__initdata = {MUX_A (none,"mout_apll" , mout_apll_p,SRC_CPU ,0 ,1 ,"mout_apll" ),MUX_A (none,"mout_cpu" , mout_cpu_p,SRC_CPU ,16 ,1 ,"mout_cpu" ),MUX (none,"mout_mpll_fout" , mout_mpll_fout_p,PLL_DIV2_SEL ,4 ,1 ),
@@ -256,7 +256,7 @@ struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "mout_spi2", mout_group1_p, SRC_PERIC1, 24, 4), }; -struct samsung_div_clock exynos5250_div_clks[]__initdata = { +static struct samsung_div_clock exynos5250_div_clks[]__initdata = {DIV (none,"div_arm" ,"mout_cpu" ,DIV_CPU0 ,0 ,3 ),DIV (none,"sclk_apll" ,"mout_apll" ,DIV_CPU0 ,24 ,3 ),DIV (none,"aclk66_pre" ,"sclk_mpll_user" ,DIV_TOP1 ,24 ,3 ),
@@ -316,7 +316,7 @@ struct samsung_div_clock exynos5250_div_clks[] __initdata = { DIV_PERIC2, 8, 8, CLK_SET_RATE_PARENT, 0), }; -struct samsung_gate_clock exynos5250_gate_clks[]__initdata = { +static struct samsung_gate_clock exynos5250_gate_clks[]__initdata = {GATE (gscl0,"gscl0" ,"none" ,GATE_IP_GSCL ,0 ,0 ,0 ),GATE (gscl1,"gscl1" ,"none" ,GATE_IP_GSCL ,1 ,0 ,0 ),GATE (gscl2,"gscl2" ,"aclk266" ,GATE_IP_GSCL ,2 ,0 ,0 ),
@@ -474,7 +474,7 @@ static __initdata struct of_device_id ext_clk_match[] = { };/* register exynox5250 clocks */ -void __init exynos5250_clk_init (struct device_node *np) +static void __init exynos5250_clk_init (struct device_node *np) {void __iomem *reg_base;struct clk *apll, *mpll, *epll, *vpll, *bpll, *gpll, *cpll;
Signature · 1 line
1.7.9.5
PATCH v2 4/6 clk: exynos5420: Staticize local symbols
In reply to Sachin KamatSymbols referenced only in this file are made static.
Signed-off-by Sachin Kamat <[email protected]>
Acked-by Kukjin Kim <[email protected]>
--- drivers/clk/samsung/clk-exynos5420.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
drivers/clk/samsung/clk-exynos5420.c +7 -7
@@ -262,12 +262,12 @@ PNAME(maudio0_p) = { "fin_pll", "maudio_clk", "sclk_dpll", "sclk_mpll", "sclk_spll", "sclk_ipll", "sclk_epll", "sclk_rpll" };/* fixed rate clocks generated outside the soc */ -struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[]__initdata = {FRATE (fin_pll,"fin_pll" ,NULL ,CLK_IS_ROOT ,0 ), };/* fixed rate clocks generated inside the soc */ -struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[]__initdata = {FRATE (none,"sclk_hdmiphy" ,NULL ,CLK_IS_ROOT ,24000000 ),FRATE (none,"sclk_pwi" ,NULL ,CLK_IS_ROOT ,24000000 ), FRATE(none, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000),
@@ -275,11 +275,11 @@ struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { FRATE(none, "sclk_usbh20_scan_clk", NULL, CLK_IS_ROOT, 480000000), }; -struct samsung_fixed_factor_clock exynos5420_fixed_factor_clks[]__initdata = { +static struct samsung_fixed_factor_clock exynos5420_fixed_factor_clks[]__initdata = {FFACTOR (none,"sclk_hsic_12m" ,"fin_pll" ,1 ,2 ,0 ), }; -struct samsung_mux_clock exynos5420_mux_clks[]__initdata = { +static struct samsung_mux_clock exynos5420_mux_clks[]__initdata = {MUX (none,"mout_mspll_kfc" , mspll_cpu_p,SRC_TOP7 ,8 ,2 ),MUX (none,"mout_mspll_cpu" , mspll_cpu_p,SRC_TOP7 ,12 ,2 ),MUX (none,"mout_apll" , apll_p,SRC_CPU ,0 ,1 ),
@@ -399,7 +399,7 @@ struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { MUX(none, "mout_spi2", group2_p, SRC_PERIC1, 28, 3), }; -struct samsung_div_clock exynos5420_div_clks[]__initdata = { +static struct samsung_div_clock exynos5420_div_clks[]__initdata = {DIV (none,"div_arm" ,"mout_cpu" ,DIV_CPU0 ,0 ,3 ),DIV (none,"sclk_apll" ,"mout_apll" ,DIV_CPU0 ,24 ,3 ),DIV (none,"armclk2" ,"div_arm" ,DIV_CPU0 ,28 ,3 ),
@@ -479,7 +479,7 @@ struct samsung_div_clock exynos5420_div_clks[] __initdata = { DIV(none, "dout_pre_spi2", "dout_spi2", DIV_PERIC4, 24, 8), }; -struct samsung_gate_clock exynos5420_gate_clks[]__initdata = { +static struct samsung_gate_clock exynos5420_gate_clks[]__initdata = {/* TODO: Re-verify the CG bits for all the gate clocks */ GATE_A (mct,"pclk_st" ,"aclk66_psgen" ,GATE_BUS_PERIS1 ,2 ,0 ,0 ,"mct" ),
@@ -704,7 +704,7 @@ static __initdata struct of_device_id ext_clk_match[] = { };/* register exynos5420 clocks */ -void __init exynos5420_clk_init (struct device_node *np) +static void __init exynos5420_clk_init (struct device_node *np) {void __iomem *reg_base;struct clk *apll, *bpll, *cpll, *dpll, *epll, *ipll, *kpll, *mpll;
Signature · 1 line
1.7.9.5
PATCH v2 5/6 clk: exynos5440: Staticize local symbols
In reply to Sachin KamatSymbols referenced only in this file are made static.
Signed-off-by Sachin Kamat <[email protected]>
Acked-by Kukjin Kim <[email protected]>
--- drivers/clk/samsung/clk-exynos5440.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
drivers/clk/samsung/clk-exynos5440.c +7 -7
@@ -41,12 +41,12 @@ PNAME(mout_armclk_p) = { "cplla", "cpllb" };PNAME (mout_spi_p) = {"div125" ,"div200" };/* fixed rate clocks generated outside the soc */ -struct samsung_fixed_rate_clock exynos5440_fixed_rate_ext_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos5440_fixed_rate_ext_clks[]__initdata = {FRATE (none,"xtal" ,NULL ,CLK_IS_ROOT ,0 ), };/* fixed rate clocks */ -struct samsung_fixed_rate_clock exynos5440_fixed_rate_clks[]__initdata = { +static struct samsung_fixed_rate_clock exynos5440_fixed_rate_clks[]__initdata = {FRATE (none,"ppll" ,NULL ,CLK_IS_ROOT ,1000000000 ),FRATE (none,"usb_phy0" ,NULL ,CLK_IS_ROOT ,60000000 ),FRATE (none,"usb_phy1" ,NULL ,CLK_IS_ROOT ,60000000 ),
@@ -55,26 +55,26 @@ struct samsung_fixed_rate_clock exynos5440_fixed_rate_clks[] __initdata = { };/* fixed factor clocks */ -struct samsung_fixed_factor_clock exynos5440_fixed_factor_clks[]__initdata = { +static struct samsung_fixed_factor_clock exynos5440_fixed_factor_clks[]__initdata = {FFACTOR (none,"div250" ,"ppll" ,1 ,4 ,0 ),FFACTOR (none,"div200" ,"ppll" ,1 ,5 ,0 ),FFACTOR (none,"div125" ,"div250" ,1 ,2 ,0 ), };/* mux clocks */ -struct samsung_mux_clock exynos5440_mux_clks[]__initdata = { +static struct samsung_mux_clock exynos5440_mux_clks[]__initdata = {MUX (none,"mout_spi" , mout_spi_p,MISC_DOUT1 ,5 ,1 ),MUX_A (arm_clk,"arm_clk" , mout_armclk_p,CPU_CLK_STATUS ,0 ,1 ,"armclk" ), };/* divider clocks */ -struct samsung_div_clock exynos5440_div_clks[]__initdata = { +static struct samsung_div_clock exynos5440_div_clks[]__initdata = {DIV (spi_baud,"div_spi" ,"mout_spi" ,MISC_DOUT1 ,3 ,2 ), };/* gate clocks */ -struct samsung_gate_clock exynos5440_gate_clks[]__initdata = { +static struct samsung_gate_clock exynos5440_gate_clks[]__initdata = {GATE (pb0_250,"pb0_250" ,"div250" ,CLKEN_OV_VAL ,3 ,0 ,0 ),GATE (pr0_250,"pr0_250" ,"div250" ,CLKEN_OV_VAL ,4 ,0 ,0 ),GATE (pr1_250,"pr1_250" ,"div250" ,CLKEN_OV_VAL ,5 ,0 ,0 ),
@@ -103,7 +103,7 @@ static __initdata struct of_device_id ext_clk_match[] = { };/* register exynos5440 clocks */ -void __init exynos5440_clk_init (struct device_node *np) +static void __init exynos5440_clk_init (struct device_node *np) {void __iomem *reg_base;
Signature · 1 line
1.7.9.5
PATCH v2 6/6 clk: exynos-audss: Staticize exynos_audss_clk_init
In reply to Sachin Kamatexynos_audss_clk_init() is used only in this file. Make it static.
Signed-off-by Sachin Kamat <[email protected]>
Acked-by Kukjin Kim <[email protected]>
--- drivers/clk/samsung/clk-exynos-audss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clk/samsung/clk-exynos-audss.c +1 -1
@@ -62,7 +62,7 @@ static struct syscore_ops exynos_audss_clk_syscore_ops = {#endif /* CONFIG_PM_SLEEP */ /* register exynos_audss clocks */ -void __init exynos_audss_clk_init (struct device_node *np) +static void __init exynos_audss_clk_init (struct device_node *np) { reg_base =of_iomap (np,0 );if (!reg_base) {
Signature · 1 line
1.7.9.5
v2 cover clk: exynos: Some fixes and cleanup
In reply to Sachin KamatQuoted 17 lines · On Thursday 18 of July 2013 15:31:16 Sachin Kamat wrote:
Resending some of patches (1, 3 and 5) as per discussion in thread [1]. Other patches in the series are new.
[1] http://comments.gmane.org/gmane.linux.kernel.samsung-soc/19933
Changes since v1:
* Removed an unnecessary change in Patch 1 as pointed out by Kukjin Kim.
* Added Kukjin's ack to patches 3~6.Sachin Kamat (6):
clk: exynos4: Staticize local symbols
clk: exynos4: Remove unused function
clk: exynos5250: Staticize local symbols
clk: exynos5420: Staticize local symbols
clk: exynos5440: Staticize local symbols
clk: exynos-audss: Staticizeexynos_audss_clk_init
Quoted 7 lines
drivers/clk/samsung/clk-exynos-audss.c | 2 +- drivers/clk/samsung/clk-exynos4.c | 42 ++++++++++++-------------------- drivers/clk/samsung/clk-exynos5250.c | 14 +++++------ drivers/clk/samsung/clk-exynos5420.c | 14 +++++------ drivers/clk/samsung/clk-exynos5440.c | 14 +++++------ 5 files changed, 37 insertions(+), 49 deletions(-)
Reviewed-by Tomasz Figa <[email protected]>
Best regards,
Tomasz
v2 cover clk: exynos: Some fixes and cleanup
In reply to Sachin KamatQuoting Sachin Kamat (2013-07-18 03:01:16)
Quoted 8 lines
Resending some of patches (1, 3 and 5) as per discussion in thread [1]. Other patches in the series are new.
[1] http://comments.gmane.org/gmane.linux.kernel.samsung-soc/19933
Changes since v1:
* Removed an unnecessary change in Patch 1 as pointed out by Kukjin Kim.
* Added Kukjin's ack to patches 3~6.
Thanks for the fixes! Will take into clk-next unless you need them to go into -rc3, but I don't think there are any regression fixes here.
Regards,
Mike
Quoted 18 lines
Sachin Kamat (6):
clk: exynos4: Staticize local symbols
clk: exynos4: Remove unused function
clk: exynos5250: Staticize local symbols
clk: exynos5420: Staticize local symbols
clk: exynos5440: Staticize local symbols
clk: exynos-audss: Staticizeexynos_audss_clk_initdrivers/clk/samsung/clk-exynos-audss.c | 2 +- drivers/clk/samsung/clk-exynos4.c | 42 ++++++++++++-------------------- drivers/clk/samsung/clk-exynos5250.c | 14 +++++------ drivers/clk/samsung/clk-exynos5420.c | 14 +++++------ drivers/clk/samsung/clk-exynos5440.c | 14 +++++------ 5 files changed, 37 insertions(+), 49 deletions(-)Signature · 1 line
1.7.9.5
v2 cover clk: exynos: Some fixes and cleanup
Quoted 4 lines · Mike Turquette
Quoting Sachin Kamat (2013-07-18 03:01:16)
Quoted 3 lines
Resending some of patches (1, 3 and 5) as per discussion in thread [1]. Other patches in the series are new.
Quoted 8 lines
Quoted 5 lines
[1] http://comments.gmane.org/gmane.linux.kernel.samsung-soc/19933
Changes since v1:
* Removed an unnecessary change in Patch 1 as pointed out by Kukjin Kim.
* Added Kukjin's ack to patches 3~6.Thanks for the fixes! Will take into clk-next unless you need them to go into -rc3, but I don't think there are any regression fixes here.
Not at all. They can all go in for 3.12.
Thanks.
Signature · 2 lines
With warm regards, Sachin