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FAILED: patch "[PATCH] pinctrl: stm32: fix optional IRQ support to gpios" failed to apply to 5.18-stable tree

PATCH [email protected] 2 participants 3 messages Jul 11, 2022 – Jul 23, 2022

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#0 lore raw

The patch below does not apply to the 5.18-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From a1d4ef1adf8bbd302067534ead671a94759687ed Mon Sep 17 00:00:00 2001
From: Fabien Dessenne <[email protected]>
Date: Mon, 27 Jun 2022 16:23:50 +0200
Subject: [PATCH] pinctrl: stm32: fix optional IRQ support to gpios

To act as an interrupt controller, a gpio bank relies on the "interrupt-parent" of the pin controller.
When this optional "interrupt-parent" misses, do not create any IRQ domain.

This fixes a "NULL pointer in stm32_gpio_domain_alloc()" kernel crash when the interrupt-parent = <exti> property is not declared in the Device Tree.

Fixes 0eb9f683336d ("pinctrl: Add IRQ support to STM32 gpios")
drivers/pinctrl/stm32/pinctrl-stm32.c +12 -8
index 57a33fb0f2d7..14bcca73238a 100644
@@ -1338,16 +1338,18 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
 	bank->secure_control = pctl->match_data->secure_control;
 	spin_lock_init(&bank->lock);
 
-	/* create irq hierarchical domain */
-	bank->fwnode = fwnode;
+	if (pctl->domain) {
+		/* create irq hierarchical domain */
+		bank->fwnode = fwnode;
 
-	bank->domain = irq_domain_create_hierarchy(pctl->domain, 0,
-					STM32_GPIO_IRQ_LINE, bank->fwnode,
-					&stm32_gpio_domain_ops, bank);
+		bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE,
+							   bank->fwnode, &stm32_gpio_domain_ops,
+							   bank);
 
-	if (!bank->domain) {
-		err = -ENODEV;
-		goto err_clk;
+		if (!bank->domain) {
+			err = -ENODEV;
+			goto err_clk;
+		}
 	}
 
 	err = gpiochip_add_data(&bank->gpio_chip, bank);
@@ -1510,6 +1512,8 @@ int stm32_pctl_probe(struct platform_device *pdev)
 	pctl->domain = stm32_pctrl_get_irq_domain(pdev);
 	if (IS_ERR(pctl->domain))
 		return PTR_ERR(pctl->domain);
+	if (!pctl->domain)
+		dev_warn(dev, "pinctrl without interrupt support\n");
 
 	/* hwspinlock is optional */
 	hwlock_id = of_hwspin_lock_get_id(pdev->dev.of_node, 0);
#1 lore raw
Quoted 62 lines · On 11/07/2022 09:08, [email protected] wrote:

The patch below does not apply to the 5.18-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From a1d4ef1adf8bbd302067534ead671a94759687ed Mon Sep 17 00:00:00 2001
From: Fabien Dessenne <[email protected]>
Date: Mon, 27 Jun 2022 16:23:50 +0200
Subject: [PATCH] pinctrl: stm32: fix optional IRQ support to gpios

To act as an interrupt controller, a gpio bank relies on the "interrupt-parent" of the pin controller.
When this optional "interrupt-parent" misses, do not create any IRQ domain.

This fixes a "NULL pointer in stm32_gpio_domain_alloc()" kernel crash when the interrupt-parent = <exti> property is not declared in the Device Tree.

Fixes 0eb9f683336d ("pinctrl: Add IRQ support to STM32 gpios")
drivers/pinctrl/stm32/pinctrl-stm32.c +10 -8
index 57a33fb0f2d7..14bcca73238a 100644
@@ -1338,16 +1338,18 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
  	bank->secure_control = pctl->match_data->secure_control;
  	spin_lock_init(&bank->lock);
 
-	/* create irq hierarchical domain */
-	bank->fwnode = fwnode;
+	if (pctl->domain) {
+		/* create irq hierarchical domain */
+		bank->fwnode = fwnode;
 
-	bank->domain = irq_domain_create_hierarchy(pctl->domain, 0,
-					STM32_GPIO_IRQ_LINE, bank->fwnode,
-					&stm32_gpio_domain_ops, bank);
+		bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE,
+							   bank->fwnode, &stm32_gpio_domain_ops,
+							   bank);
 
-	if (!bank->domain) {
-		err = -ENODEV;
-		goto err_clk;
+		if (!bank->domain) {
+			err = -ENODEV;
+			goto err_clk;
+		}
  	}
 
  	err = gpiochip_add_data(&bank->gpio_chip, bank);

drivers/pinctrl/stm32/pinctrl-stm32.c int stm32_pctl_probe(struct platform_device *pdev) · line 1519

Quoted 8 lines
drivers/pinctrl/stm32/pinctrl-stm32.c +2 -0
@@ -1510,6 +1512,8 @@ int stm32_pctl_probe(struct platform_device *pdev)
  	pctl->domain = stm32_pctrl_get_irq_domain(pdev);
  	if (IS_ERR(pctl->domain))
  		return PTR_ERR(pctl->domain);
+	if (!pctl->domain)
+		dev_warn(dev, "pinctrl without interrupt support\n");
 
  	/* hwspinlock is optional */
  	hwlock_id = of_hwspin_lock_get_id(pdev->dev.of_node, 0);

Hi,

Below is an updated patch which fixes the problem on all 5.x releases (5.18, 5.15, 5.10, 5.4). The initial patch can be dropped on any 4.x releases.

BR,
Fabien

From d82f7a72e3b1c7b6ed86c17b2108db6f97b61dc7 Mon Sep 17 00:00:00 2001
From: Fabien Dessenne <[email protected]>
Date: Mon, 27 Jun 2022 14:55:35 +0200
Subject: [PATCH] pinctrl: stm32: fix optional IRQ support to gpios

To act as an interrupt controller, a gpio bank relies on the "interrupt-parent" of the pin controller.
When this optional "interrupt-parent" misses, do not create any IRQ domain.

This fixes a "NULL pointer in stm32_gpio_domain_alloc()" kernel crash when the interrupt-parent = <exti> property is not declared in the Device Tree.

Fixes 0eb9f683336d ("pinctrl: Add IRQ support to STM32 gpios")
---
 drivers/pinctrl/stm32/pinctrl-stm32.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)
drivers/pinctrl/stm32/pinctrl-stm32.c +11 -7
index f7c9459f6628..edd0d0af5c14 100644
@@ -1299,15 +1299,17 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
 	bank->bank_ioport_nr = bank_ioport_nr;
 	spin_lock_init(&bank->lock);
 
-	/* create irq hierarchical domain */
-	bank->fwnode = of_node_to_fwnode(np);
+	if (pctl->domain) {
+		/* create irq hierarchical domain */
+		bank->fwnode = of_node_to_fwnode(np);
 
-	bank->domain = irq_domain_create_hierarchy(pctl->domain, 0,
-					STM32_GPIO_IRQ_LINE, bank->fwnode,
-					&stm32_gpio_domain_ops, bank);
+		bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE,
+							   bank->fwnode, &stm32_gpio_domain_ops,
+							   bank);
 
-	if (!bank->domain)
-		return -ENODEV;
+		if (!bank->domain)
+			return -ENODEV;
+	}
 
 	err = gpiochip_add_data(&bank->gpio_chip, bank);
 	if (err) {
@@ -1466,6 +1468,8 @@ int stm32_pctl_probe(struct platform_device *pdev)
 	pctl->domain = stm32_pctrl_get_irq_domain(np);
 	if (IS_ERR(pctl->domain))
 		return PTR_ERR(pctl->domain);
+	if (!pctl->domain)
+		dev_warn(dev, "pinctrl without interrupt support\n");
 
 	/* hwspinlock is optional */
 	hwlock_id = of_hwspin_lock_get_id(pdev->dev.of_node, 0);
Signature · 1 line
2.25.1
author maintainer
#2 lore raw
Quoted 69 lines · Fabien DESSENNE
Quoted 57 lines · On 11/07/2022 09:08, [email protected] wrote:

The patch below does not apply to the 5.18-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From a1d4ef1adf8bbd302067534ead671a94759687ed Mon Sep 17 00:00:00 2001
From: Fabien Dessenne <[email protected]>
Date: Mon, 27 Jun 2022 16:23:50 +0200
Subject: [PATCH] pinctrl: stm32: fix optional IRQ support to gpios

To act as an interrupt controller, a gpio bank relies on the "interrupt-parent" of the pin controller.
When this optional "interrupt-parent" misses, do not create any IRQ domain.

This fixes a "NULL pointer in stm32_gpio_domain_alloc()" kernel crash when the interrupt-parent = <exti> property is not declared in the Device Tree.

Fixes 0eb9f683336d ("pinctrl: Add IRQ support to STM32 gpios")
drivers/pinctrl/stm32/pinctrl-stm32.c +10 -8
index 57a33fb0f2d7..14bcca73238a 100644
@@ -1338,16 +1338,18 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
  	bank->secure_control = pctl->match_data->secure_control;
  	spin_lock_init(&bank->lock);
-	/* create irq hierarchical domain */
-	bank->fwnode = fwnode;
+	if (pctl->domain) {
+		/* create irq hierarchical domain */
+		bank->fwnode = fwnode;
-	bank->domain = irq_domain_create_hierarchy(pctl->domain, 0,
-					STM32_GPIO_IRQ_LINE, bank->fwnode,
-					&stm32_gpio_domain_ops, bank);
+		bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE,
+							   bank->fwnode, &stm32_gpio_domain_ops,
+							   bank);
-	if (!bank->domain) {
-		err = -ENODEV;
-		goto err_clk;
+		if (!bank->domain) {
+			err = -ENODEV;
+			goto err_clk;
+		}
  	}
  	err = gpiochip_add_data(&bank->gpio_chip, bank);

drivers/pinctrl/stm32/pinctrl-stm32.c int stm32_pctl_probe(struct platform_device *pdev) · line 1519

Quoted 8 lines
drivers/pinctrl/stm32/pinctrl-stm32.c +2 -0
@@ -1510,6 +1512,8 @@ int stm32_pctl_probe(struct platform_device *pdev)
  	pctl->domain = stm32_pctrl_get_irq_domain(pdev);
  	if (IS_ERR(pctl->domain))
  		return PTR_ERR(pctl->domain);
+	if (!pctl->domain)
+		dev_warn(dev, "pinctrl without interrupt support\n");
  	/* hwspinlock is optional */
  	hwlock_id = of_hwspin_lock_get_id(pdev->dev.of_node, 0);
 

Hi,

Quoted 3 lines

Below is an updated patch which fixes the problem on all 5.x releases (5.18, 5.15, 5.10, 5.4).
The initial patch can be dropped on any 4.x releases.

Thanks, now queued up. Note, this was white-spaced damaged, I had to fix it up by hand, you should fix your email client.

greg k-h