FAILED: patch "[PATCH] KVM: SVM: move MSR_IA32_SPEC_CTRL save/restore to assembly" failed to apply to 5.10-stable tree
Subsystems (4)
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maintainerThe patch below does not apply to the 5.10-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
Possible dependencies:
9f2febf3f04d ("KVM: SVM: move MSR_IA32_SPEC_CTRL save/restore to assembly") e287bd005ad9 ("KVM: SVM: restore host save area from assembly") e61ab42de874 ("KVM: SVM: move guest vmsave/vmload back to assembly") 73412dfeea72 ("KVM: SVM: do not allocate struct svm_cpu_data dynamically") 181d0fb0bb02 ("KVM: SVM: remove dead field from struct svm_cpu_data") f6d58266d731 ("KVM: SVM: retrieve VMCB from assembly")f7ef280132f9 ("KVM: SVM: adjust register allocation for __svm_vcpu_run()") 16fdc1de169e ("KVM: SVM: replace regs argument of __svm_vcpu_run() with vcpu_svm") debc5a1ec0d1 ("KVM: x86: use a separate asm-offsets.c file") 07853adc29a0 ("KVM: VMX: Prevent RSB underflow before vmenter") fc02735b14ff ("KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS") bb06650634d3 ("KVM: VMX: Convert launched argument to flags") 8bd200d23ec4 ("KVM: VMX: Flatten __vmx_vcpu_run()")acac5e98ef8d ("x86/speculation: Remove x86_spec_ctrl_mask")bbb69e8bee1b ("x86/speculation: Use cached host SPEC_CTRL value for guest entry/exit") 7c693f54c873 ("x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS") c779bc1a9002 ("x86/bugs: Optimize SPEC_CTRL MSR writes")caa0ff24d5d0 ("x86/bugs: Keep a per-CPU IA32_SPEC_CTRL value") a149180fbcf3 ("x86: Add magic AMD return-thunk")d9e9d2300681 ("x86,objtool: Create .return_sites")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 9f2febf3f04daebdaaa5a43cfa20e3844905c0f9 Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <[email protected]>
Date: Fri, 30 Sep 2022 14:24:40 -0400
Subject: [PATCH] KVM: SVM: move MSR_IA32_SPEC_CTRL save/restore to assembly
Restoration of the host IA32_SPEC_CTRL value is probably too late with respect to the return thunk training sequence.
With respect to the user/kernel boundary, AMD says, "If software chooses to toggle STIBP (e.g., set STIBP on kernel entry, and clear it on kernel exit), software should set STIBP to 1 before executing the return thunk training sequence." I assume the same requirements apply to the guest/host boundary. The return thunk training sequence is in vmenter.S, quite close to the VM-exit. On hosts without V_SPEC_CTRL, however, the host's IA32_SPEC_CTRL value is not restored until much later.
To avoid this, move the restoration of host SPEC_CTRL to assembly and, for consistency, move the restoration of the guest SPEC_CTRL as well. This is not particularly difficult, apart from some care to cover both 32- and 64-bit, and to share code between SEV-ES and normal vmentry.
arch/x86/kernel/cpu/bugs.c +3 -10
@@ -196,22 +196,15 @@ void __init check_bugs(void) }/* -* NOTE: This function is *only* called for SVM. VMX spec_ctrl handling is -* done in vmenter.S. +* NOTE: This function is *only* called for SVM, since Intel uses +* MSR_IA32_SPEC_CTRL for SSBD. */ void x86_virt_spec_ctrl (u64 guest_spec_ctrl,u64 guest_virt_spec_ctrl,bool setguest) { -u64 msrval, guestval = guest_spec_ctrl, hostval =spec_ctrl_current (); +u64 guestval, hostval;struct thread_info *ti =current_thread_info (); -if (static_cpu_has (X86_FEATURE_MSR_SPEC_CTRL )) { -if (hostval != guestval) { - msrval = setguest ? guestval : hostval; -wrmsrl (MSR_IA32_SPEC_CTRL , msrval); - } - } -/* * If SSBD is not handled in MSR_SPEC_CTRL on AMD, update * MSR_AMD64_L2_CFG or MSR_VIRT_SPEC_CTRL if supported.
arch/x86/kvm/kvm-asm-offsets.c +1 -0
@@ -16,6 +16,7 @@ static void __used common(void)BLANK ();OFFSET (SVM_vcpu_arch_regs, vcpu_svm, vcpu.arch.regs);OFFSET (SVM_current_vmcb, vcpu_svm, current_vmcb); +OFFSET (SVM_spec_ctrl, vcpu_svm, spec_ctrl);OFFSET (SVM_vmcb01, vcpu_svm, vmcb01);OFFSET (KVM_VMCB_pa, kvm_vmcb_info, pa);OFFSET (SD_save_area_pa, svm_cpu_data, save_area_pa);
arch/x86/kvm/svm/svm.c +14 -23
@@ -720,6 +720,15 @@ static bool msr_write_intercepted(struct kvm_vcpu *vcpu, u32 msr)u32 offset;u32 *msrpm; +/* +* For non-nested case: +* If the L01 MSR bitmap does not intercept the MSR, then we need to +* save it. +* +* For nested case: +* If the L02 MSR bitmap does not intercept the MSR, then we need to +* save it. +*/ msrpm =is_guest_mode (vcpu) ?to_svm (vcpu)->nested.msrpm:to_svm (vcpu)->msrpm;
@@ -3901,16 +3910,16 @@ static fastpath_t svm_exit_handlers_fastpath(struct kvm_vcpu *vcpu)return EXIT_FASTPATH_NONE ; } -static noinstr void svm_vcpu_enter_exit(struct kvm_vcpu *vcpu) +static noinstr void svm_vcpu_enter_exit(struct kvm_vcpu *vcpu, bool spec_ctrl_intercepted) {struct vcpu_svm *svm =to_svm (vcpu);guest_state_enter_irqoff ();if (sev_es_guest (vcpu->kvm)) -__svm_sev_es_vcpu_run (svm); +__svm_sev_es_vcpu_run (svm, spec_ctrl_intercepted);else -__svm_vcpu_run (svm); +__svm_vcpu_run (svm, spec_ctrl_intercepted);guest_state_exit_irqoff (); }
@@ -3918,6 +3927,7 @@ static noinstr void svm_vcpu_enter_exit(struct kvm_vcpu *vcpu) static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu) {struct vcpu_svm *svm =to_svm (vcpu); +bool spec_ctrl_intercepted =msr_write_intercepted (vcpu,MSR_IA32_SPEC_CTRL );trace_kvm_entry (vcpu);
@@ -3976,26 +3986,7 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu)if (!static_cpu_has (X86_FEATURE_V_SPEC_CTRL ))x86_spec_ctrl_set_guest (svm->spec_ctrl, svm->virt_spec_ctrl); -svm_vcpu_enter_exit (vcpu); - -/* -* We do not use IBRS in the kernel. If this vCPU has used the -* SPEC_CTRL MSR it may have left it on; save the value and -* turn it off. This is much more efficient than blindly adding -* it to the atomic save/restore list. Especially as the former -* (Saving guest MSRs on vmexit) doesn't even exist in KVM. -* -* For non-nested case: -* If the L01 MSR bitmap does not intercept the MSR, then we need to -* save it. -* -* For nested case: -* If the L02 MSR bitmap does not intercept the MSR, then we need to -* save it. -*/ -if (!static_cpu_has (X86_FEATURE_V_SPEC_CTRL ) && -unlikely (!msr_write_intercepted (vcpu,MSR_IA32_SPEC_CTRL ))) - svm->spec_ctrl =native_read_msr (MSR_IA32_SPEC_CTRL ); +svm_vcpu_enter_exit (vcpu, spec_ctrl_intercepted);if (!sev_es_guest (vcpu->kvm))reload_tss (vcpu);
arch/x86/kvm/svm/svm.h +2 -2
@@ -682,7 +682,7 @@ void sev_es_unmap_ghcb(struct vcpu_svm *svm);/* vmenter.S */ -void __svm_sev_es_vcpu_run (struct vcpu_svm *svm); -void __svm_vcpu_run (struct vcpu_svm *svm); +void __svm_sev_es_vcpu_run (struct vcpu_svm *svm,bool spec_ctrl_intercepted); +void __svm_vcpu_run (struct vcpu_svm *svm,bool spec_ctrl_intercepted);#endif
arch/x86/kvm/svm/vmenter.S +116 -3
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