ARM: sirf: drop CSR marco and add atlas7 platform

PATCH Superseded Barry Song 3 participants 13 messages Jan 3, 2015 – Jan 4, 2015

Subsystems (5)

Device tree bindings Arm (32-bit) Arm sub-architectures Clocksource, clockevent drivers +1 more subsystems

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Barry Song

author

2015-01-03 01:36 UTC #0 lore raw

v2 cover ARM: sirf: drop CSR marco and add atlas7 platform

From: Barry Song <[email protected]>

this patchset drops MARCO as it is not supported any more. its replacement is atlas7.
some IPs from marco are moved to atlas7, for example timer. for this kind of IPs, we rename to atlas7. some IPs need some change for atlas7, such as platsmp, we break marco and move to atlas7 directly.

the patchset add debug ports, machine and devicetree for the new atlas7.

-v2:
drop marco before adding atlas7;
use DEBUG_UART_PHYS/VIRT and debug_ll_io_init;
drop sirfsoc_map_io;
correct timer tick;

thanks very much for Arnd's feedbacks

Barry Song (5):
ARM: sirf: drop MARCO low-level debug port
ARM: dts: drop MARCO platform DT stuff
ARM: sirf: drop MARCO support in reset controller module
ARM: sirf: drop MARCO machine
clocksource: marco: rename marco to atlas7

Guo Zeng (1):
ARM: sirf: add two debug ports for CSRatlas7 SoC

Zhiwu Song (3):
ARM: sirf: move platsmp to support atlas7 SoC
ARM: sirf: add atlas7 machine support
ARM: dts: add init dts file for CSR atlas7 SoC

 Documentation/devicetree/bindings/arm/sirf.txt     |   6 +-
 arch/arm/Kconfig.debug                             |  37 +-
 arch/arm/boot/dts/Makefile                         |   2 +-
 arch/arm/boot/dts/atlas7-evb.dts                   | 110 +++
 arch/arm/boot/dts/atlas7.dtsi                      | 813 +++++++++++++++++++++
 arch/arm/boot/dts/marco-evb.dts                    |  54 --
 arch/arm/boot/dts/marco.dtsi                       | 757 -------------------
 arch/arm/include/debug/sirf.S                      |  30 +-
 arch/arm/mach-prima2/Kconfig                       |  22 +-
 arch/arm/mach-prima2/common.c                      |  22 +-
 arch/arm/mach-prima2/lluart.c                      |  35 -
 arch/arm/mach-prima2/platsmp.c                     |  52 +-
 arch/arm/mach-prima2/rstc.c                        |  41 +-
 arch/arm/mach-prima2/rtciobrg.c                    |   1 -
 drivers/clocksource/Makefile                       |   2 +-
 .../clocksource/{timer-marco.c => timer-atlas7.c}  |  15 +-
 16 files changed, 1021 insertions(+), 978 deletions(-)
 create mode 100644 arch/arm/boot/dts/atlas7-evb.dts
 create mode 100644 arch/arm/boot/dts/atlas7.dtsi
 delete mode 100644 arch/arm/boot/dts/marco-evb.dts
 delete mode 100644 arch/arm/boot/dts/marco.dtsi
 delete mode 100644 arch/arm/mach-prima2/lluart.c
 rename drivers/clocksource/{timer-marco.c => timer-atlas7.c} (95%)

Signature · 1 line

2.2.1

Barry Song

author

2015-01-03 01:36 UTC #1 lore raw

PATCH v2 1/9 ARM: sirf: drop MARCO low-level debug port

From: Barry Song <[email protected]>

MARCO will not be supported any more. it has been replaced by CSR atlas7.

Signed-off-by Barry Song <[email protected]>

---
 arch/arm/Kconfig.debug        | 9 +--------
 arch/arm/include/debug/sirf.S | 2 --
 arch/arm/mach-prima2/lluart.c | 2 --
 3 files changed, 1 insertion(+), 12 deletions(-)

arch/arm/Kconfig.debug +1 -8

index 5ddd490..e0a3cc9 100644
@@ -920,13 +920,6 @@ choice
 		  Say Y here if you want the debug print routines to direct
 		  their output to the uart1 port on SiRFprimaII devices.
 
-	config DEBUG_SIRFMARCO_UART1
-		bool "Kernel low-level debugging messages via SiRFmarco UART1"
-		depends on ARCH_MARCO
-		help
-		  Say Y here if you want the debug print routines to direct
-		  their output to the uart1 port on SiRFmarco devices.
-
 	config STIH41X_DEBUG_ASC2
 		bool "Use StiH415/416 ASC2 UART for low-level debug"
 		depends on ARCH_STI

@@ -1195,7 +1188,7 @@ config DEBUG_LL_INCLUDE
 	default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
 	default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
 	default "debug/s5pv210.S" if DEBUG_S5PV210_UART
-	default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
+	default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1
 	default "debug/sti.S" if DEBUG_STI_UART
 	default "debug/tegra.S" if DEBUG_TEGRA_UART
 	default "debug/ux500.S" if DEBUG_UX500_UART

arch/arm/include/debug/sirf.S +0 -2

index dbf250c..006ec9f 100644
@@ -8,8 +8,6 @@
 
 #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
 #define SIRFSOC_UART1_PA_BASE          0xb0060000
-#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
-#define SIRFSOC_UART1_PA_BASE          0xcc060000
 #else
 #define SIRFSOC_UART1_PA_BASE          0
 #endif

arch/arm/mach-prima2/lluart.c +0 -2

index 99c0c92..20453c1 100644
@@ -13,8 +13,6 @@
 
 #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
 #define SIRFSOC_UART1_PA_BASE          0xb0060000
-#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
-#define SIRFSOC_UART1_PA_BASE          0xcc060000
 #else
 #define SIRFSOC_UART1_PA_BASE          0
 #endif

Signature · 1 line

2.2.1

Barry Song

author

2015-01-03 01:36 UTC #2 lore raw

PATCH v2 2/9 ARM: dts: drop MARCO platform DT stuff

In reply to Barry Song

From: Barry Song <[email protected]>

MARCO will not be supported any more. it has been replaced by CSR atlas7.

Signed-off-by Barry Song <[email protected]>

---
 Documentation/devicetree/bindings/arm/sirf.txt |   2 -
 arch/arm/boot/dts/Makefile                     |   1 -
 arch/arm/boot/dts/marco-evb.dts                |  54 --
 arch/arm/boot/dts/marco.dtsi                   | 757 -------------------------
 4 files changed, 814 deletions(-)
 delete mode 100644 arch/arm/boot/dts/marco-evb.dts
 delete mode 100644 arch/arm/boot/dts/marco.dtsi

Documentation/devicetree/bindings/arm/sirf.txt +0 -2

index c6ba6d3..9daa1c1 100644
@@ -4,6 +4,4 @@ CSR SiRFprimaII and SiRFmarco device tree bindings.
 Required root node properties:
     - compatible:
     - "sirf,prima2-cb" : prima2 "cb" evaluation board
-    - "sirf,marco-cb" : marco "cb" evaluation board
     - "sirf,prima2" : prima2 device based board
-    - "sirf,marco" : marco device based board

arch/arm/boot/dts/Makefile +0 -1

index 91bd5bd..68feb8f 100644
@@ -175,7 +175,6 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
 	kirkwood-ts419-6281.dtb \
 	kirkwood-ts419-6282.dtb
 dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
-dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
 dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb
 dtb-$(CONFIG_ARCH_MMP) += pxa168-aspenite.dtb \
 	pxa910-dkb.dtb \

arch/arm/boot/dts/marco-evb.dts deleted +0 ~~-54~~

54 lines not on this page · raw message

arch/arm/boot/dts/marco.dtsi deleted +0 ~~-757~~

757 lines not on this page · raw message

Signature · 1 line

2.2.1

Barry Song

author

2015-01-03 01:36 UTC #3 lore raw

PATCH v2 3/9 ARM: sirf: drop MARCO support in reset controller module

In reply to Barry Song

From: Barry Song <[email protected]>

MARCO will not be supported any more. it has been replaced by CSR atlas7.

Signed-off-by Barry Song <[email protected]>

---
 arch/arm/mach-prima2/rstc.c | 41 ++++++++++++-----------------------------
 1 file changed, 12 insertions(+), 29 deletions(-)

arch/arm/mach-prima2/rstc.c +12 ~~-29~~

index e1f1f86..7c251eb 100644
@@ -34,36 +34,20 @@ static int sirfsoc_reset_module(struct reset_controller_dev *rcdev,
 
 	mutex_lock(&rstc_lock);
 
-	if (of_device_is_compatible(rcdev->of_node, "sirf,prima2-rstc")) {
-		/*
-		 * Writing 1 to this bit resets corresponding block.
-		 * Writing 0 to this bit de-asserts reset signal of the
-		 * corresponding block. datasheet doesn't require explicit
-		 * delay between the set and clear of reset bit. it could
-		 * be shorter if tests pass.
-		 */
-		writel(readl(sirfsoc_rstc_base +
+	/*
+	 * Writing 1 to this bit resets corresponding block.
+	 * Writing 0 to this bit de-asserts reset signal of the
+	 * corresponding block. datasheet doesn't require explicit
+	 * delay between the set and clear of reset bit. it could
+	 * be shorter if tests pass.
+	 */
+	writel(readl(sirfsoc_rstc_base +
 			(reset_bit / 32) * 4) | (1 << reset_bit),
-			sirfsoc_rstc_base + (reset_bit / 32) * 4);
-		msleep(20);
-		writel(readl(sirfsoc_rstc_base +
+		sirfsoc_rstc_base + (reset_bit / 32) * 4);
+	msleep(20);
+	writel(readl(sirfsoc_rstc_base +
 			(reset_bit / 32) * 4) & ~(1 << reset_bit),
-			sirfsoc_rstc_base + (reset_bit / 32) * 4);
-	} else {
-		/*
-		 * For MARCO and POLO
-		 * Writing 1 to SET register resets corresponding block.
-		 * Writing 1 to CLEAR register de-asserts reset signal of the
-		 * corresponding block.
-		 * datasheet doesn't require explicit delay between the set and
-		 * clear of reset bit. it could be shorter if tests pass.
-		 */
-		writel(1 << reset_bit,
-			sirfsoc_rstc_base + (reset_bit / 32) * 8);
-		msleep(20);
-		writel(1 << reset_bit,
-			sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
-	}
+		sirfsoc_rstc_base + (reset_bit / 32) * 4);
 
 	mutex_unlock(&rstc_lock);

@@ -106,7 +90,6 @@ static int sirfsoc_rstc_probe(struct platform_device *pdev)
 
 static const struct of_device_id rstc_ids[]  = {
 	{ .compatible = "sirf,prima2-rstc" },
-	{ .compatible = "sirf,marco-rstc" },
 	{},
 };

Signature · 1 line

2.2.1

Barry Song

author

2015-01-03 01:36 UTC #4 lore raw

PATCH v2 4/9 ARM: sirf: drop MARCO machine

In reply to Barry Song

From: Barry Song <[email protected]>

MARCO will not be supported any more. it has been replaced by CSR atlas7.

Signed-off-by Barry Song <[email protected]>

---
 arch/arm/mach-prima2/Kconfig    |  9 ---------
 arch/arm/mach-prima2/common.c   | 17 -----------------
 arch/arm/mach-prima2/rtciobrg.c |  1 -
 3 files changed, 27 deletions(-)

arch/arm/mach-prima2/Kconfig +0 -9

index 042f693..cc1c323 100644
@@ -28,15 +28,6 @@ config ARCH_PRIMA2
 	help
           Support for CSR SiRFSoC ARM Cortex A9 Platform
 
-config ARCH_MARCO
-	bool "CSR SiRFSoC MARCO ARM Cortex A9 Platform"
-	default y
-	select ARM_GIC
-	select HAVE_ARM_SCU if SMP
-	select SMP_ON_UP if SMP
-	help
-          Support for CSR SiRFSoC ARM Cortex A9 Platform
-
 config SIRF_IRQ
 	bool

arch/arm/mach-prima2/common.c +0 ~~-17~~

index a860ea2..bc53cc4 100644
@@ -58,20 +58,3 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
 	.dt_compat      = prima2_dt_match,
 MACHINE_END
 #endif
-
-#ifdef CONFIG_ARCH_MARCO
-static const char *marco_dt_match[] __initconst = {
-	"sirf,marco",
-	NULL
-};
-
-DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
-	/* Maintainer: Barry Song <[email protected]> */
-	.l2c_aux_val	= 0,
-	.l2c_aux_mask	= ~0,
-	.smp            = smp_ops(sirfsoc_smp_ops),
-	.map_io         = sirfsoc_map_io,
-	.init_late	= sirfsoc_init_late,
-	.dt_compat      = marco_dt_match,
-MACHINE_END
-#endif

arch/arm/mach-prima2/rtciobrg.c +0 -1

index 70a0b47..8f66d8f 100644
@@ -104,7 +104,6 @@ EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_writel);
 
 static const struct of_device_id rtciobrg_ids[] = {
 	{ .compatible = "sirf,prima2-rtciobg" },
-	{ .compatible = "sirf,marco-rtciobg" },
 	{}
 };

Signature · 1 line

2.2.1

Barry Song

author

2015-01-03 01:36 UTC #5 lore raw

PATCH v2 5/9 ARM: sirf: move platsmp to support atlas7 SoC

In reply to Barry Song

From: Zhiwu Song <[email protected]>

this patch breaks marco SMP support, but marco project has been dropped. so its correct cpu1 jump/flag address for atlas7 and remove scu related logic as scu doesn't expose in cortex-a7.

Signed-off-by Zhiwu Song <[email protected]>

Signed-off-by Barry Song <[email protected]>

---
 arch/arm/mach-prima2/common.c  |  1 -
 arch/arm/mach-prima2/platsmp.c | 52 +++++++++++-------------------------------
 2 files changed, 13 insertions(+), 40 deletions(-)

arch/arm/mach-prima2/common.c +0 -1

index bc53cc4..a20b8d4 100644
@@ -23,7 +23,6 @@ static void __init sirfsoc_init_late(void)
 static __init void sirfsoc_map_io(void)
 {
 	sirfsoc_map_lluart();
-	sirfsoc_map_scu();
 }
 
 #ifdef CONFIG_ARCH_ATLAS6

arch/arm/mach-prima2/platsmp.c +13 ~~-39~~

91 lines not on this page · raw message

Signature · 1 line

2.2.1

Barry Song

author

2015-01-03 01:36 UTC #6 lore raw

PATCH v2 6/9 ARM: sirf: add two debug ports for CSRatlas7 SoC

In reply to Barry Song

From: Guo Zeng <[email protected]>

this patch adds UART0 and UART1 as LLUART port, as the new atlas7 registers layout are different, it also refines some names of old hard-coded MARCOs.

this patch also moves to CONFIG_DEBUG_UART_PHYS/DEBUG_UART_VIRT and debug_ll_io_init().

Signed-off-by Guo Zeng <[email protected]>

Signed-off-by Zhiwu Song <[email protected]>

Signed-off-by Barry Song <[email protected]>

---
 arch/arm/Kconfig.debug        | 36 +++++++++++++++++++++++++++++++++---
 arch/arm/include/debug/sirf.S | 28 +++++++++++++---------------
 arch/arm/mach-prima2/common.c |  7 -------
 arch/arm/mach-prima2/lluart.c | 33 ---------------------------------
 4 files changed, 46 insertions(+), 58 deletions(-)
 delete mode 100644 arch/arm/mach-prima2/lluart.c

arch/arm/Kconfig.debug +33 -3

index e0a3cc9..1edfb86 100644
@@ -916,10 +916,29 @@ choice
 	config DEBUG_SIRFPRIMA2_UART1
 		bool "Kernel low-level debugging messages via SiRFprimaII UART1"
 		depends on ARCH_PRIMA2
+		select DEBUG_SIRFSOC_UART
 		help
 		  Say Y here if you want the debug print routines to direct
 		  their output to the uart1 port on SiRFprimaII devices.
 
+	config DEBUG_SIRFATLAS7_UART0
+		bool "Kernel low-level debugging messages via SiRFatlas7 UART0"
+		depends on ARCH_ATLAS7
+		select DEBUG_SIRFSOC_UART
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to the uart0 port on SiRFATLAS7 devices.The uart0
+		  is used on SiRFATLAS7 as a extra debug port.sometimes an extra
+		  debug port can be very useful.
+
+	config DEBUG_SIRFATLAS7_UART1
+		bool "Kernel low-level debugging messages via SiRFatlas7 UART1"
+		depends on ARCH_ATLAS7
+		select DEBUG_SIRFSOC_UART
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to the uart1 port on SiRFATLAS7 devices.
+
 	config STIH41X_DEBUG_ASC2
 		bool "Use StiH415/416 ASC2 UART for low-level debug"
 		depends on ARCH_STI

@@ -1154,6 +1173,10 @@ config DEBUG_STI_UART
 	bool
 	depends on ARCH_STI
 
+config DEBUG_SIRFSOC_UART
+	bool
+	depends on ARCH_SIRF
+
 config DEBUG_LL_INCLUDE
 	string
 	default "debug/sa1100.S" if DEBUG_SA1100

@@ -1188,7 +1211,7 @@ config DEBUG_LL_INCLUDE
 	default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
 	default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
 	default "debug/s5pv210.S" if DEBUG_S5PV210_UART
-	default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1
+	default "debug/sirf.S" if DEBUG_SIRFSOC_UART
 	default "debug/sti.S" if DEBUG_STI_UART
 	default "debug/tegra.S" if DEBUG_TEGRA_UART
 	default "debug/ux500.S" if DEBUG_UX500_UART

@@ -1305,6 +1328,9 @@ config DEBUG_UART_PHYS
 	default 0xfff36000 if DEBUG_HIGHBANK_UART
 	default 0xfffe8600 if DEBUG_UART_BCM63XX
 	default 0xfffff700 if ARCH_IOP33X
+	default 0xb0060000 if DEBUG_SIRFPRIMA2_UART1
+	default 0x18010000 if DEBUG_SIRFATLAS7_UART0
+	default 0x18020000 if DEBUG_SIRFATLAS7_UART1
 	depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
 		DEBUG_LL_UART_EFM32 || \
 		DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \

@@ -1313,7 +1339,8 @@ config DEBUG_UART_PHYS
 		DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
 		DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
 		DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
-		DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
+		DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || \
+		DEBUG_SIRFSOC_UART
 
 config DEBUG_UART_VIRT
 	hex "Virtual base address of debug UART"

@@ -1387,11 +1414,14 @@ config DEBUG_UART_VIRT
 	default 0xfef36000 if DEBUG_HIGHBANK_UART
 	default 0xfefff700 if ARCH_IOP33X
 	default 0xff003000 if DEBUG_U300_UART
+	default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1
+	default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
+	default 0xfec20000 if DEBUG_SIRFATLAS7_UART1
 	default DEBUG_UART_PHYS if !MMU
 	depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
 		DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
 		DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
-		DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
+		DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || DEBUG_SIRFSOC_UART
 
 config DEBUG_UART_8250_SHIFT
 	int "Register offset shift for the 8250 debug UART"

arch/arm/include/debug/sirf.S +13 ~~-15~~

index 006ec9f..630f231 100644
@@ -6,35 +6,33 @@
  * Licensed under GPLv2 or later.
  */
 
-#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
-#define SIRFSOC_UART1_PA_BASE          0xb0060000
-#else
-#define SIRFSOC_UART1_PA_BASE          0
-#endif
+#define SIRF_LLUART_TXFIFO_STATUS	0x0114
+#define SIRF_LLUART_TXFIFO_DATA	0x0118
 
-#define SIRFSOC_UART1_VA_BASE		0xFEC60000
+#define SIRF_LLUART_TXFIFO_FULL                       (1 << 5)
 
-#define SIRFSOC_UART_TXFIFO_STATUS	0x0114
-#define SIRFSOC_UART_TXFIFO_DATA	0x0118
+#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0
+#define SIRF_LLUART_TXFIFO_EMPTY			(1 << 8)
+#else
+#define SIRF_LLUART_TXFIFO_EMPTY			(1 << 6)
+#endif
 
-#define SIRFSOC_UART1_TXFIFO_FULL                       (1 << 5)
-#define SIRFSOC_UART1_TXFIFO_EMPTY			(1 << 6)
 
 	.macro	addruart, rp, rv, tmp
-	ldr	\rp, =SIRFSOC_UART1_PA_BASE		@ physical
-	ldr	\rv, =SIRFSOC_UART1_VA_BASE		@ virtual
+	ldr	\rp, =CONFIG_DEBUG_UART_PHYS		@ physical
+	ldr	\rv, =CONFIG_DEBUG_UART_VIRT		@ virtual
 	.endm
 
 	.macro	senduart,rd,rx
-	str	\rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA]
+	str	\rd, [\rx, #SIRF_LLUART_TXFIFO_DATA]
 	.endm
 
 	.macro	busyuart,rd,rx
 	.endm
 
 	.macro	waituart,rd,rx
-1001:	ldr	\rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS]
-	tst	\rd, #SIRFSOC_UART1_TXFIFO_EMPTY
+1001:	ldr	\rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
+	tst	\rd, #SIRF_LLUART_TXFIFO_EMPTY
 	beq	1001b
 	.endm

arch/arm/mach-prima2/common.c +0 -7

index a20b8d4..c62ff68 100644
@@ -20,11 +20,6 @@ static void __init sirfsoc_init_late(void)
 	sirfsoc_pm_init();
 }
 
-static __init void sirfsoc_map_io(void)
-{
-	sirfsoc_map_lluart();
-}
-
 #ifdef CONFIG_ARCH_ATLAS6
 static const char *atlas6_dt_match[] __initconst = {
 	"sirf,atlas6",

@@ -35,7 +30,6 @@ DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
 	/* Maintainer: Barry Song <[email protected]> */
 	.l2c_aux_val	= 0,
 	.l2c_aux_mask	= ~0,
-	.map_io         = sirfsoc_map_io,
 	.init_late	= sirfsoc_init_late,
 	.dt_compat      = atlas6_dt_match,
 MACHINE_END

@@ -51,7 +45,6 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
 	/* Maintainer: Barry Song <[email protected]> */
 	.l2c_aux_val	= 0,
 	.l2c_aux_mask	= ~0,
-	.map_io         = sirfsoc_map_io,
 	.dma_zone_size	= SZ_256M,
 	.init_late	= sirfsoc_init_late,
 	.dt_compat      = prima2_dt_match,

arch/arm/mach-prima2/lluart.c deleted +0 ~~-33~~

deleted file mode 100644
index 20453c1..0000000
@@ -1,33 +0,0 @@
-/*
- * Static memory mapping for DEBUG_LL
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#include <linux/kernel.h>
-#include <asm/page.h>
-#include <asm/mach/map.h>
-#include "common.h"
-
-#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
-#define SIRFSOC_UART1_PA_BASE          0xb0060000
-#else
-#define SIRFSOC_UART1_PA_BASE          0
-#endif
-
-#define SIRFSOC_UART1_VA_BASE          SIRFSOC_VA(0x060000)
-#define SIRFSOC_UART1_SIZE		SZ_4K
-
-void __init sirfsoc_map_lluart(void)
-{
-	struct map_desc sirfsoc_lluart_map = {
-		.virtual        = SIRFSOC_UART1_VA_BASE,
-		.pfn            = __phys_to_pfn(SIRFSOC_UART1_PA_BASE),
-		.length         = SIRFSOC_UART1_SIZE,
-		.type           = MT_DEVICE,
-	};
-
-	iotable_init(&sirfsoc_lluart_map, 1);
-}

Signature · 1 line

2.2.1

Arnd Bergmann

maintainer

2015-01-04 16:55 UTC #7 lore raw

PATCH v2 6/9 ARM: sirf: add two debug ports for CSRatlas7 SoC

Quoted 6 lines · On Saturday 03 January 2015 09:36:44 Barry Song wrote:

From: Guo Zeng <[email protected]>
this patch adds UART0 and UART1 as LLUART port, as the new atlas7 registers layout are different, it also refines some names of old hard-coded MARCOs.

Quoted 7 lines

this patch also moves to CONFIG_DEBUG_UART_PHYS/DEBUG_UART_VIRT and debug_ll_io_init().
Signed-off-by Guo Zeng <[email protected]>
Signed-off-by Zhiwu Song <[email protected]>
Signed-off-by Barry Song <[email protected]>

The patch looks ok, but if you have the chance, better split it into two separate patches to do the two things you describe above.

Arnd

Barry Song

author

2015-01-03 01:36 UTC #8 lore raw

PATCH v2 7/9 ARM: sirf: add atlas7 machine support

In reply to Barry Song

From: Zhiwu Song <[email protected]>

atlas7 is next-gen auto soc from CSR.
It could bring to customers most integrated SoC solution:
- World leading Bluetooth 4.0 and GNSS baseband
- Audio processing, analog CODEC and ADC by DSP
- Analog video input
- SDR accelerators
- CAN bus support by Cortex-M3

Signed-off-by Zhiwu Song <[email protected]>

Signed-off-by Barry Song <[email protected]>

---
 Documentation/devicetree/bindings/arm/sirf.txt |  4 ++++
 arch/arm/mach-prima2/Kconfig                   | 13 ++++++++++++-
 arch/arm/mach-prima2/common.c                  | 13 +++++++++++++
 3 files changed, 29 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/arm/sirf.txt +4 -0

index 9daa1c1..7b28ee6 100644
@@ -3,5 +3,9 @@ CSR SiRFprimaII and SiRFmarco device tree bindings.
 
 Required root node properties:
     - compatible:
+    - "sirf,atlas6-cb" : atlas6 "cb" evaluation board
+    - "sirf,atlas6" : atlas6 device based board
+    - "sirf,atlas7-cb" : atlas7 "cb" evaluation board
+    - "sirf,atlas7" : atlas7 device based board
     - "sirf,prima2-cb" : prima2 "cb" evaluation board
     - "sirf,prima2" : prima2 device based board

arch/arm/mach-prima2/Kconfig +12 -1

index cc1c323..a219dc3 100644
@@ -11,7 +11,7 @@ menuconfig ARCH_SIRF
 
 if ARCH_SIRF
 
-comment "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
+comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features"
 
 config ARCH_ATLAS6
 	bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"

@@ -20,6 +20,17 @@ config ARCH_ATLAS6
 	help
           Support for CSR SiRFSoC ARM Cortex A9 Platform
 
+config ARCH_ATLAS7
+	bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform"
+	default y
+	select ARM_GIC
+	select CPU_V7
+	select HAVE_ARM_SCU if SMP
+	select HAVE_SMP
+	select SMP_ON_UP if SMP
+	help
+          Support for CSR SiRFSoC ARM Cortex A7 Platform
+
 config ARCH_PRIMA2
 	bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 	default y

arch/arm/mach-prima2/common.c +13 -0

index c62ff68..0c819bb 100644
@@ -50,3 +50,16 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
 	.dt_compat      = prima2_dt_match,
 MACHINE_END
 #endif
+
+#ifdef CONFIG_ARCH_ATLAS7
+static const char *atlas7_dt_match[] __initdata = {
+	"sirf,atlas7",
+	NULL
+};
+
+DT_MACHINE_START(ATLAS7_DT, "Generic ATLAS7 (Flattened Device Tree)")
+	/* Maintainer: Barry Song <[email protected]> */
+	.smp            = smp_ops(sirfsoc_smp_ops),
+	.dt_compat      = atlas7_dt_match,
+MACHINE_END
+#endif

Signature · 1 line

2.2.1

Barry Song

author

2015-01-03 01:36 UTC #9 lore raw

PATCH v2 8/9 ARM: dts: add init dts file for CSR atlas7 SoC

In reply to Barry Song

From: Zhiwu Song <[email protected]>

CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens of MARCOs, in each MARCO, there are dozens of hardware modules.

Signed-off-by Zhiwu Song <[email protected]>

Signed-off-by Hao Liu <[email protected]>

Signed-off-by Barry Song <[email protected]>

---
 arch/arm/boot/dts/Makefile       |   1 +
 arch/arm/boot/dts/atlas7-evb.dts | 110 ++++++
 arch/arm/boot/dts/atlas7.dtsi    | 813 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 924 insertions(+)
 create mode 100644 arch/arm/boot/dts/atlas7-evb.dts
 create mode 100644 arch/arm/boot/dts/atlas7.dtsi

arch/arm/boot/dts/Makefile +1 -0

index 68feb8f..0048cb1 100644
@@ -52,6 +52,7 @@ dtb-$(CONFIG_ARCH_AT91)	+= sama5d36ek.dtb
 dtb-$(CONFIG_ARCH_AT91)	+= at91-sama5d4ek.dtb
 
 dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
+dtb-$(CONFIG_ARCH_ATLAS7) += atlas7-evb.dtb
 dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b-plus.dtb

arch/arm/boot/dts/atlas7-evb.dts new file +110 -0

110 lines not on this page · raw message

arch/arm/boot/dts/atlas7.dtsi new file +813 -0

813 lines not on this page · raw message

Signature · 1 line

2.2.1

Barry Song

author

2015-01-03 01:36 UTC #10 lore raw

PATCH v2 9/9 clocksource: marco: rename marco to atlas7

In reply to Barry Song

From: Barry Song <[email protected]>

marco project is replaced by atlas7 and we should obliterate its all traces.

Cc Daniel Lezcano <[email protected]>

Signed-off-by Barry Song <[email protected]>

---
 drivers/clocksource/Makefile                          |  2 +-
 drivers/clocksource/{timer-marco.c => timer-atlas7.c} | 15 +++++++--------
 2 files changed, 8 insertions(+), 9 deletions(-)
 rename drivers/clocksource/{timer-marco.c => timer-atlas7.c} (95%)

drivers/clocksource/Makefile +1 -1

index 94d90b2..306bc47 100644
@@ -18,7 +18,7 @@ obj-$(CONFIG_ARMADA_370_XP_TIMER)	+= time-armada-370-xp.o
 obj-$(CONFIG_ORION_TIMER)	+= time-orion.o
 obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835_timer.o
 obj-$(CONFIG_ARCH_CLPS711X)	+= clps711x-timer.o
-obj-$(CONFIG_ARCH_MARCO)	+= timer-marco.o
+obj-$(CONFIG_ARCH_ATLAS7)	+= timer-atlas7.o
 obj-$(CONFIG_ARCH_MOXART)	+= moxart_timer.o
 obj-$(CONFIG_ARCH_MXS)		+= mxs_timer.o
 obj-$(CONFIG_ARCH_PXA)		+= pxa_timer.o

drivers/clocksource/timer-atlas7.c renamed from drivers/clocksource/timer-marco.c +7 -8

similarity index 95%
rename from drivers/clocksource/timer-marco.c
rename to drivers/clocksource/timer-atlas7.c
index 361a789..60f9de3 100644
@@ -38,7 +38,7 @@
 
 #define SIRFSOC_TIMER_REG_CNT 6
 
-static unsigned long marco_timer_rate;
+static unsigned long atlas7_timer_rate;
 
 static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
 	SIRFSOC_TIMER_WATCHDOG_EN,

@@ -195,7 +195,7 @@ static int sirfsoc_local_timer_setup(struct clock_event_device *ce)
 	ce->rating = 200;
 	ce->set_mode = sirfsoc_timer_set_mode;
 	ce->set_next_event = sirfsoc_timer_set_next_event;
-	clockevents_calc_mult_shift(ce, marco_timer_rate, 60);
+	clockevents_calc_mult_shift(ce, atlas7_timer_rate, 60);
 	ce->max_delta_ns = clockevent_delta2ns(-2, ce);
 	ce->min_delta_ns = clockevent_delta2ns(2, ce);
 	ce->cpumask = cpumask_of(cpu);

@@ -255,9 +255,8 @@ static void __init sirfsoc_clockevent_init(void)
 }
 
 /* initialize the kernel jiffy timer source */
-static void __init sirfsoc_marco_timer_init(struct device_node *np)
+static void __init sirfsoc_atlas7_timer_init(struct device_node *np)
 {
-	u32 timer_div;
 	struct clk *clk;
 
 	clk = of_clk_get(np, 0);

@@ -265,7 +264,7 @@ static void __init sirfsoc_marco_timer_init(struct device_node *np)
 
 	BUG_ON(clk_prepare_enable(clk));
 
-	marco_timer_rate = clk_get_rate(clk);
+	atlas7_timer_rate = clk_get_rate(clk);
 
 	/* timer dividers: 0, not divided */
 	writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);

@@ -283,7 +282,7 @@ static void __init sirfsoc_marco_timer_init(struct device_node *np)
 	/* Clear all interrupts */
 	writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
 
-	BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, marco_timer_rate));
+	BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, atlas7_timer_rate));
 
 	sirfsoc_clockevent_init();
 }

@@ -302,6 +301,6 @@ static void __init sirfsoc_of_timer_init(struct device_node *np)
 	if (!sirfsoc_timer1_irq.irq)
 		panic("No irq passed for timer1 via DT\n");
 
-	sirfsoc_marco_timer_init(np);
+	sirfsoc_atlas7_timer_init(np);
 }
-CLOCKSOURCE_OF_DECLARE(sirfsoc_marco_timer, "sirf,marco-tick", sirfsoc_of_timer_init );
+CLOCKSOURCE_OF_DECLARE(sirfsoc_atlas7_timer, "sirf,atlas7-tick", sirfsoc_of_timer_init);

Signature · 1 line

2.2.1

Daniel Lezcano

2015-01-04 18:00 UTC #11 lore raw

PATCH v2 9/9 clocksource: marco: rename marco to atlas7

Quoted 7 lines · Barry Song

From: Barry Song <[email protected]>
marco project is replaced by atlas7 and we should obliterate its all traces.
Cc Daniel Lezcano <[email protected]>
Signed-off-by Barry Song <[email protected]>

Acked-by Daniel Lezcano <[email protected]>

Quoted 83 lines

---
  drivers/clocksource/Makefile                          |  2 +-
  drivers/clocksource/{timer-marco.c => timer-atlas7.c} | 15 +++++++--------
  2 files changed, 8 insertions(+), 9 deletions(-)

rename drivers/clocksource/{timer-marco.c => timer-atlas7.c} (95%)

drivers/clocksource/Makefile +1 -1

index 94d90b2..306bc47 100644
@@ -18,7 +18,7 @@ obj-$(CONFIG_ARMADA_370_XP_TIMER)	+= time-armada-370-xp.o
  obj-$(CONFIG_ORION_TIMER)	+= time-orion.o
  obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835_timer.o
  obj-$(CONFIG_ARCH_CLPS711X)	+= clps711x-timer.o
-obj-$(CONFIG_ARCH_MARCO)	+= timer-marco.o
+obj-$(CONFIG_ARCH_ATLAS7)	+= timer-atlas7.o
  obj-$(CONFIG_ARCH_MOXART)	+= moxart_timer.o
  obj-$(CONFIG_ARCH_MXS)		+= mxs_timer.o
  obj-$(CONFIG_ARCH_PXA)		+= pxa_timer.o

drivers/clocksource/timer-atlas7.c renamed from drivers/clocksource/timer-marco.c +7 -8

similarity index 95%
rename from drivers/clocksource/timer-marco.c
rename to drivers/clocksource/timer-atlas7.c
index 361a789..60f9de3 100644
@@ -38,7 +38,7 @@
 
  #define SIRFSOC_TIMER_REG_CNT 6
 
-static unsigned long marco_timer_rate;
+static unsigned long atlas7_timer_rate;
 
  static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
  	SIRFSOC_TIMER_WATCHDOG_EN,

@@ -195,7 +195,7 @@ static int sirfsoc_local_timer_setup(struct clock_event_device *ce)
  	ce->rating = 200;
  	ce->set_mode = sirfsoc_timer_set_mode;
  	ce->set_next_event = sirfsoc_timer_set_next_event;
-	clockevents_calc_mult_shift(ce, marco_timer_rate, 60);
+	clockevents_calc_mult_shift(ce, atlas7_timer_rate, 60);
  	ce->max_delta_ns = clockevent_delta2ns(-2, ce);
  	ce->min_delta_ns = clockevent_delta2ns(2, ce);
  	ce->cpumask = cpumask_of(cpu);

@@ -255,9 +255,8 @@ static void __init sirfsoc_clockevent_init(void)
  }
 
  /* initialize the kernel jiffy timer source */
-static void __init sirfsoc_marco_timer_init(struct device_node *np)
+static void __init sirfsoc_atlas7_timer_init(struct device_node *np)
  {
-	u32 timer_div;
  	struct clk *clk;
 
  	clk = of_clk_get(np, 0);

@@ -265,7 +264,7 @@ static void __init sirfsoc_marco_timer_init(struct device_node *np)
 
  	BUG_ON(clk_prepare_enable(clk));
 
-	marco_timer_rate = clk_get_rate(clk);
+	atlas7_timer_rate = clk_get_rate(clk);
 
  	/* timer dividers: 0, not divided */
  	writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);

@@ -283,7 +282,7 @@ static void __init sirfsoc_marco_timer_init(struct device_node *np)
  	/* Clear all interrupts */
  	writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
 
-	BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, marco_timer_rate));
+	BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, atlas7_timer_rate));
 
  	sirfsoc_clockevent_init();
  }

@@ -302,6 +301,6 @@ static void __init sirfsoc_of_timer_init(struct device_node *np)
  	if (!sirfsoc_timer1_irq.irq)
  		panic("No irq passed for timer1 via DT\n");
 
-	sirfsoc_marco_timer_init(np);
+	sirfsoc_atlas7_timer_init(np);
  }
-CLOCKSOURCE_OF_DECLARE(sirfsoc_marco_timer, "sirf,marco-tick", sirfsoc_of_timer_init );
+CLOCKSOURCE_OF_DECLARE(sirfsoc_atlas7_timer, "sirf,atlas7-tick", sirfsoc_of_timer_init);

Signature · 5 lines

  <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
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<http://www.linaro.org/linaro-blog/> Blog

Arnd Bergmann

maintainer

2015-01-04 16:56 UTC #12 lore raw

v2 cover ARM: sirf: drop CSR marco and add atlas7 platform

In reply to Barry Song

Quoted 10 lines · On Saturday 03 January 2015 09:36:38 Barry Song wrote:

From: Barry Song <[email protected]>
this patchset drops MARCO as it is not supported any more. its replacement is atlas7.
some IPs from marco are moved to atlas7, for example timer. for this kind of IPs, we rename to atlas7. some IPs need some change for atlas7, such as platsmp, we break marco and move to atlas7 directly.
the patchset add debug ports, machine and devicetree for the new atlas7.

Looks all good, please add my

Acked-by Arnd Bergmann <[email protected]>