config: move existing code that is common to the top

PATCH Superseded Andre Muezerie 2 participants 5 messages Feb 28, 2025 – Mar 6, 2025 Arm/Amlogic Meson SoC support

lore

Share & tools

lore

Andre Muezerie

author

2025-02-28 15:52 UTC #0 lore raw

PATCH 1/1 config: move existing code that is common to the top

In preparation to add better MSVC support, existing common code was moved up.

A split was added which in future will call an MSVC specific meson.build file:

if is_ms_compiler
subdir_done()
endif

Signed-off-by Andre Muezerie <[email protected]>

Acked-by Bruce Richardson <[email protected]>

---
 config/x86/meson.build | 91 ++++++++++++++++++++++--------------------
 1 file changed, 48 insertions(+), 43 deletions(-)

config/x86/meson.build +48 ~~-43~~

index 47a5b0c04a..68fcdc4993 100644
@@ -1,6 +1,52 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017-2020 Intel Corporation
 
+cc_has_avx512 = false
+target_has_avx512 = false
+
+dpdk_conf.set('RTE_ARCH_X86', 1)
+if dpdk_conf.get('RTE_ARCH_64')
+    dpdk_conf.set('RTE_ARCH_X86_64', 1)
+    dpdk_conf.set('RTE_ARCH', 'x86_64')
+else
+    dpdk_conf.set('RTE_ARCH_I686', 1)
+    dpdk_conf.set('RTE_ARCH', 'i686')
+endif
+
+dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+dpdk_conf.set('RTE_MAX_LCORE', 128)
+
+epyc_zen_cores = {
+    '__znver5__':768,
+    '__znver4__':512,
+    '__znver3__':256,
+    '__znver2__':256,
+    '__znver1__':128
+    }
+
+cpu_instruction_set = get_option('cpu_instruction_set')
+if cpu_instruction_set == 'native'
+    foreach m:epyc_zen_cores.keys()
+        if cc.get_define(m, args: machine_args) != ''
+            dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m])
+            break
+        endif
+    endforeach
+else
+    foreach m:epyc_zen_cores.keys()
+        if m.contains(cpu_instruction_set)
+            dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m])
+            break
+        endif
+    endforeach
+endif
+
+dpdk_conf.set('RTE_MAX_NUMA_NODES', 32)
+
+if is_ms_compiler
+    subdir_done()
+endif
+
 # get binutils version for the workaround of Bug 97
 binutils_ok = true
 if is_linux or cc.get_id() == 'gcc'

@@ -14,9 +60,8 @@ if is_linux or cc.get_id() == 'gcc'
     endif
 endif
 
-cc_avx512_flags = ['-mavx512f', '-mavx512vl', '-mavx512dq', '-mavx512bw']
-cc_has_avx512 = false
-target_has_avx512 = false
+cc_avx2_flags = ['-mavx2']
+cc_avx512_flags = ['-mavx512f', '-mavx512vl', '-mavx512dq', '-mavx512bw', '-mavx512cd']
 if (binutils_ok and cc.has_multi_arguments(cc_avx512_flags)
         and '-mno-avx512f' not in get_option('c_args'))
     # check if compiler is working with _mm512_extracti64x4_epi64

@@ -82,43 +127,3 @@ foreach f:optional_flags
         compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
     endif
 endforeach
-
-
-dpdk_conf.set('RTE_ARCH_X86', 1)
-if dpdk_conf.get('RTE_ARCH_64')
-    dpdk_conf.set('RTE_ARCH_X86_64', 1)
-    dpdk_conf.set('RTE_ARCH', 'x86_64')
-else
-    dpdk_conf.set('RTE_ARCH_I686', 1)
-    dpdk_conf.set('RTE_ARCH', 'i686')
-endif
-
-dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
-dpdk_conf.set('RTE_MAX_LCORE', 128)
-
-epyc_zen_cores = {
-    '__znver5__':768,
-    '__znver4__':512,
-    '__znver3__':256,
-    '__znver2__':256,
-    '__znver1__':128
-    }
-
-cpu_instruction_set = get_option('cpu_instruction_set')
-if cpu_instruction_set == 'native'
-    foreach m:epyc_zen_cores.keys()
-        if cc.get_define(m, args: machine_args) != ''
-            dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m])
-            break
-        endif
-    endforeach
-else
-    foreach m:epyc_zen_cores.keys()
-        if m.contains(cpu_instruction_set)
-            dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m])
-            break
-        endif
-    endforeach
-endif
-
-dpdk_conf.set('RTE_MAX_NUMA_NODES', 32)

Signature · 1 line

2.48.1.vfs.0.0

Andre Muezerie

author

2025-02-28 22:03 UTC #1 lore raw

v2 cover move existing code that is common to the top

In preparation to add better MSVC support, existing common code was moved up.

A split was added which in future will call an MSVC specific meson.build file:

if is_ms_compiler
subdir_done()
endif

v2:
- removed call to get_option('cpu_instruction_set') from config/x86/meson.build as that call should not be done from here - cpu_instruction_set is already correctly set from config/meson.build. A separate patch was prepared to fix this in older releases.

Andre Muezerie (1):
config: move existing code that is common to the top

 config/x86/meson.build | 90 ++++++++++++++++++++++--------------------
 1 file changed, 47 insertions(+), 43 deletions(-)

--
2.48.1.vfs.0.0

Andre Muezerie

author

2025-02-28 22:03 UTC #2 lore raw

PATCH v2 1/1 config: move existing code that is common to the top

In preparation to add better MSVC support, existing common code was moved up.

A split was added which in future will call an MSVC specific meson.build file:

if is_ms_compiler
subdir_done()
endif

Signed-off-by Andre Muezerie <[email protected]>

Acked-by Bruce Richardson <[email protected]>

---
 config/x86/meson.build | 90 ++++++++++++++++++++++--------------------
 1 file changed, 47 insertions(+), 43 deletions(-)

config/x86/meson.build +47 ~~-43~~

index 47a5b0c04a..ea9bd8231d 100644
@@ -1,6 +1,51 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017-2020 Intel Corporation
 
+cc_has_avx512 = false
+target_has_avx512 = false
+
+dpdk_conf.set('RTE_ARCH_X86', 1)
+if dpdk_conf.get('RTE_ARCH_64')
+    dpdk_conf.set('RTE_ARCH_X86_64', 1)
+    dpdk_conf.set('RTE_ARCH', 'x86_64')
+else
+    dpdk_conf.set('RTE_ARCH_I686', 1)
+    dpdk_conf.set('RTE_ARCH', 'i686')
+endif
+
+dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+dpdk_conf.set('RTE_MAX_LCORE', 128)
+
+epyc_zen_cores = {
+    '__znver5__':768,
+    '__znver4__':512,
+    '__znver3__':256,
+    '__znver2__':256,
+    '__znver1__':128
+    }
+
+if cpu_instruction_set == 'native'
+    foreach m:epyc_zen_cores.keys()
+        if cc.get_define(m, args: machine_args) != ''
+            dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m])
+            break
+        endif
+    endforeach
+else
+    foreach m:epyc_zen_cores.keys()
+        if m.contains(cpu_instruction_set)
+            dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m])
+            break
+        endif
+    endforeach
+endif
+
+dpdk_conf.set('RTE_MAX_NUMA_NODES', 32)
+
+if is_ms_compiler
+    subdir_done()
+endif
+
 # get binutils version for the workaround of Bug 97
 binutils_ok = true
 if is_linux or cc.get_id() == 'gcc'

@@ -14,9 +59,8 @@ if is_linux or cc.get_id() == 'gcc'
     endif
 endif
 
-cc_avx512_flags = ['-mavx512f', '-mavx512vl', '-mavx512dq', '-mavx512bw']
-cc_has_avx512 = false
-target_has_avx512 = false
+cc_avx2_flags = ['-mavx2']
+cc_avx512_flags = ['-mavx512f', '-mavx512vl', '-mavx512dq', '-mavx512bw', '-mavx512cd']
 if (binutils_ok and cc.has_multi_arguments(cc_avx512_flags)
         and '-mno-avx512f' not in get_option('c_args'))
     # check if compiler is working with _mm512_extracti64x4_epi64

@@ -82,43 +126,3 @@ foreach f:optional_flags
         compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
     endif
 endforeach
-
-
-dpdk_conf.set('RTE_ARCH_X86', 1)
-if dpdk_conf.get('RTE_ARCH_64')
-    dpdk_conf.set('RTE_ARCH_X86_64', 1)
-    dpdk_conf.set('RTE_ARCH', 'x86_64')
-else
-    dpdk_conf.set('RTE_ARCH_I686', 1)
-    dpdk_conf.set('RTE_ARCH', 'i686')
-endif
-
-dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
-dpdk_conf.set('RTE_MAX_LCORE', 128)
-
-epyc_zen_cores = {
-    '__znver5__':768,
-    '__znver4__':512,
-    '__znver3__':256,
-    '__znver2__':256,
-    '__znver1__':128
-    }
-
-cpu_instruction_set = get_option('cpu_instruction_set')
-if cpu_instruction_set == 'native'
-    foreach m:epyc_zen_cores.keys()
-        if cc.get_define(m, args: machine_args) != ''
-            dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m])
-            break
-        endif
-    endforeach
-else
-    foreach m:epyc_zen_cores.keys()
-        if m.contains(cpu_instruction_set)
-            dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m])
-            break
-        endif
-    endforeach
-endif
-
-dpdk_conf.set('RTE_MAX_NUMA_NODES', 32)

Signature · 1 line

2.48.1.vfs.0.0

David Marchand

2025-03-06 13:41 UTC #3 lore raw

config/x86/meson.build if is_linux or cc.get_id() == 'gcc' · line 62

Quoted 8 lines · Andre Muezerie

config/x86/meson.build +1 -3

@@ -14,9 +59,8 @@ if is_linux or cc.get_id() == 'gcc'
     endif
 endif
 
-cc_avx512_flags = ['-mavx512f', '-mavx512vl', '-mavx512dq', '-mavx512bw']
-cc_has_avx512 = false
-target_has_avx512 = false
+cc_avx2_flags = ['-mavx2']

It looks like rebase damage/conflict with another series touching those flags. I'll see if I can fix this while applying...

Quoted 4 lines

config/x86/meson.build +1 -0

+cc_avx512_flags = ['-mavx512f', '-mavx512vl', '-mavx512dq', '-mavx512bw', '-mavx512cd']
 if (binutils_ok and cc.has_multi_arguments(cc_avx512_flags)
         and '-mno-avx512f' not in get_option('c_args'))
     # check if compiler is working with _mm512_extracti64x4_epi64

Signature · 1 line

David Marchand

David Marchand

2025-03-06 13:47 UTC #4 lore raw

In reply to Andre Muezerie

Quoted 7 lines · Andre Muezerie

In preparation to add better MSVC support, existing common code was moved up.
A split was added which in future will call an MSVC specific meson.build file:

Quoted 6 lines

if is_ms_compiler
subdir_done()
endif
Signed-off-by Andre Muezerie <[email protected]>
Acked-by Bruce Richardson <[email protected]>

In addition to my previous remark, I dropped the change adding AVX512CD, so it comes with the change associated to the ACL library. Applied, thanks.

Signature · 1 line

David Marchand