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ARM: S3C24XX: convert s3c2412 to common clock framework

PATCH Superseded Heiko Stübner 4 participants 11 messages Feb 22, 2014 – Feb 25, 2014

Subsystems (7)

v2 of 3 Superseded Latest is v3 →

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#0 lore raw

v2 cover ARM: S3C24XX: convert s3c2412 to common clock framework

Second incarnation of the series converting s3c2412/s3c2413 to the common clock framework. As before the conversion is done by a mix of datasheet data and the pre-existing clock code and as this time I have no hardware of this type, it is compile-tested only. So hopefully somebody with s3c2412 hw will be able to test it for real.

The conversion of s3c2412 now moved in front of the s3c2410/s3c2440/s3c2442 one, as I'll need a bit more time for the clockout changes suggested by Tomasz Figa.

This series builds on top of the previous submitted s3c2443/s3c2416 series.

Changes since v1:
- move in front of s3c2410 conversion, therefore move 2 necessary patches that also got ACKs, from there into this series
- adapt to Samsung clock pm rework from Tomasz Figa
- apply some changes suggested by Tomasz Figa in the s3c2410 clock driver that also apply to this driver.

Heiko Stuebner (5):
ARM: S3C24XX: only store clock registers when old clock code is active
clk: samsung: add plls used by the early s3c24xx cpus
dt-bindings: add documentation for s3c2412 clock controller
clk: samsung: add clock controller driver for s3c2412
ARM: S3C24XX: convert s3c2412 to common clock framework

 .../bindings/clock/samsung,s3c2412-clock.txt       |  50 ++
 arch/arm/mach-s3c24xx/Kconfig                      |   8 +-
 arch/arm/mach-s3c24xx/Makefile                     |   2 +-
 arch/arm/mach-s3c24xx/clock-s3c2412.c              | 761 ---------------------
 arch/arm/mach-s3c24xx/common.c                     |   9 +-
 arch/arm/mach-s3c24xx/common.h                     |   4 +
 arch/arm/mach-s3c24xx/mach-jive.c                  |   9 +-
 arch/arm/mach-s3c24xx/mach-smdk2413.c              |   9 +-
 arch/arm/mach-s3c24xx/mach-vstms.c                 |   9 +-
 arch/arm/mach-s3c24xx/pm.c                         |  13 +-
 arch/arm/mach-s3c24xx/s3c2412.c                    |  43 --
 drivers/clk/samsung/Makefile                       |   1 +
 drivers/clk/samsung/clk-pll.c                      | 182 +++++
 drivers/clk/samsung/clk-pll.h                      |   3 +
 drivers/clk/samsung/clk-s3c2412.c                  | 268 ++++++++
 include/dt-bindings/clock/s3c2412.h                |  73 ++
 16 files changed, 627 insertions(+), 817 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt
 delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2412.c
 create mode 100644 drivers/clk/samsung/clk-s3c2412.c
 create mode 100644 include/dt-bindings/clock/s3c2412.h
Signature · 1 line
1.8.5.3
#1 lore raw

PATCH v2 1/5 ARM: S3C24XX: only store clock registers when old clock code is active

The Samsung ccf driver already handles the save and restore of the clock registers on suspend and resume. The architecture code should not duplicate this when the ccf is active.

---
 arch/arm/mach-s3c24xx/pm.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)
arch/arm/mach-s3c24xx/pm.c +10 -3
index 052ca23..e99d131 100644
@@ -51,9 +51,6 @@
 #define PFX "s3c24xx-pm: "
 
 static struct sleep_save core_save[] = {
-	SAVE_ITEM(S3C2410_LOCKTIME),
-	SAVE_ITEM(S3C2410_CLKCON),
-
 	/* we restore the timings here, with the proviso that the board
 	 * brings the system up in an slower, or equal frequency setting
 	 * to the original system.
@@ -70,6 +67,9 @@ static struct sleep_save core_save[] = {
 	SAVE_ITEM(S3C2410_BANKCON4),
 	SAVE_ITEM(S3C2410_BANKCON5),
 
+#ifdef CONFIG_SAMSUNG_CLOCK
+	SAVE_ITEM(S3C2410_LOCKTIME),
+	SAVE_ITEM(S3C2410_CLKCON),
 #ifndef CONFIG_CPU_FREQ
 	SAVE_ITEM(S3C2410_CLKDIVN),
 	SAVE_ITEM(S3C2410_MPLLCON),
@@ -77,11 +77,14 @@ static struct sleep_save core_save[] = {
 #endif
 	SAVE_ITEM(S3C2410_UPLLCON),
 	SAVE_ITEM(S3C2410_CLKSLOW),
+#endif /* CONFIG_SAMSUNG_CLOCK */
 };
 
+#ifdef CONFIG_SAMSUNG_CLOCK
 static struct sleep_save misc_save[] = {
 	SAVE_ITEM(S3C2410_DCLKCON),
 };
+#endif
 
 /* s3c_pm_check_resume_pin
  *
@@ -140,12 +143,16 @@ void s3c_pm_configure_extint(void)
 void s3c_pm_restore_core(void)
 {
 	s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
+#ifdef CONFIG_SAMSUNG_CLOCK
 	s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
+#endif
 }
 
 void s3c_pm_save_core(void)
 {
+#ifdef CONFIG_SAMSUNG_CLOCK
 	s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
+#endif
 	s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
 }
 
Signature · 1 line
1.8.5.3
#2 lore raw

PATCH v2 2/5 clk: samsung: add plls used by the early s3c24xx cpus

In reply to Heiko Stübner

The manuals do not give them explicit names like in later socs, so more generic names with a s3c2410-prefix were used for them.

As it was common to do so in the previous implementation, functionality to change the pll rate is already included.

---
 drivers/clk/samsung/clk-pll.c | 182 ++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/samsung/clk-pll.h |   3 +
 2 files changed, 185 insertions(+)
drivers/clk/samsung/clk-pll.c +182 -0
index 8c9c015..7fb0a28 100644
@@ -11,6 +11,7 @@
 
 #include <linux/errno.h>
 #include <linux/hrtimer.h>
+#include <linux/delay.h>
 #include "clk.h"
 #include "clk-pll.h"
 
@@ -701,6 +702,169 @@ static const struct clk_ops samsung_pll6553_clk_ops = {
 };
 
 /*
+ * PLL Clock Type of S3C24XX before S3C2443
+ */
+
+#define PLLS3C2410_MDIV_MASK		(0xff)
+#define PLLS3C2410_PDIV_MASK		(0x1f)
+#define PLLS3C2410_SDIV_MASK		(0x3)
+#define PLLS3C2410_MDIV_SHIFT		(12)
+#define PLLS3C2410_PDIV_SHIFT		(4)
+#define PLLS3C2410_SDIV_SHIFT		(0)
+
+#define PLLS3C2410_ENABLE_REG_OFFSET	0x10
+
+static unsigned long samsung_s3c2410_pll_recalc_rate(struct clk_hw *hw,
+					unsigned long parent_rate)
+{
+	struct samsung_clk_pll *pll = to_clk_pll(hw);
+	u32 pll_con, mdiv, pdiv, sdiv;
+	u64 fvco = parent_rate;
+
+	pll_con = __raw_readl(pll->con_reg);
+	mdiv = (pll_con >> PLLS3C2410_MDIV_SHIFT) & PLLS3C2410_MDIV_MASK;
+	pdiv = (pll_con >> PLLS3C2410_PDIV_SHIFT) & PLLS3C2410_PDIV_MASK;
+	sdiv = (pll_con >> PLLS3C2410_SDIV_SHIFT) & PLLS3C2410_SDIV_MASK;
+
+	fvco *= (mdiv + 8);
+	do_div(fvco, (pdiv + 2) << sdiv);
+
+	return (unsigned int)fvco;
+}
+
+static unsigned long samsung_s3c2440_mpll_recalc_rate(struct clk_hw *hw,
+					unsigned long parent_rate)
+{
+	struct samsung_clk_pll *pll = to_clk_pll(hw);
+	u32 pll_con, mdiv, pdiv, sdiv;
+	u64 fvco = parent_rate;
+
+	pll_con = __raw_readl(pll->con_reg);
+	mdiv = (pll_con >> PLLS3C2410_MDIV_SHIFT) & PLLS3C2410_MDIV_MASK;
+	pdiv = (pll_con >> PLLS3C2410_PDIV_SHIFT) & PLLS3C2410_PDIV_MASK;
+	sdiv = (pll_con >> PLLS3C2410_SDIV_SHIFT) & PLLS3C2410_SDIV_MASK;
+
+	fvco *= (2 * (mdiv + 8));
+	do_div(fvco, (pdiv + 2) << sdiv);
+
+	return (unsigned int)fvco;
+}
+
+static int samsung_s3c2410_pll_set_rate(struct clk_hw *hw, unsigned long drate,
+					unsigned long prate)
+{
+	struct samsung_clk_pll *pll = to_clk_pll(hw);
+	const struct samsung_pll_rate_table *rate;
+	u32 tmp;
+
+	/* Get required rate settings from table */
+	rate = samsung_get_pll_settings(pll, drate);
+	if (!rate) {
+		pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__,
+			drate, __clk_get_name(hw->clk));
+		return -EINVAL;
+	}
+
+	tmp = __raw_readl(pll->con_reg);
+
+	/* Change PLL PMS values */
+	tmp &= ~((PLLS3C2410_MDIV_MASK << PLLS3C2410_MDIV_SHIFT) |
+			(PLLS3C2410_PDIV_MASK << PLLS3C2410_PDIV_SHIFT) |
+			(PLLS3C2410_SDIV_MASK << PLLS3C2410_SDIV_SHIFT));
+	tmp |= (rate->mdiv << PLLS3C2410_MDIV_SHIFT) |
+			(rate->pdiv << PLLS3C2410_PDIV_SHIFT) |
+			(rate->sdiv << PLLS3C2410_SDIV_SHIFT);
+	__raw_writel(tmp, pll->con_reg);
+
+	/* Time to settle according to the manual */
+	udelay(300);
+
+	return 0;
+}
+
+static int samsung_s3c2410_pll_enable(struct clk_hw *hw, int bit, bool enable)
+{
+	struct samsung_clk_pll *pll = to_clk_pll(hw);
+	u32 pll_en = __raw_readl(pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET);
+	u32 pll_en_orig = pll_en;
+
+	if (enable)
+		pll_en &= ~BIT(bit);
+	else
+		pll_en |= BIT(bit);
+
+	__raw_writel(pll_en, pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET);
+
+	/* if we started the UPLL, then allow to settle */
+	if (enable && (pll_en_orig & BIT(bit)))
+		udelay(300);
+
+	return 0;
+}
+
+static int samsung_s3c2410_mpll_enable(struct clk_hw *hw)
+{
+	return samsung_s3c2410_pll_enable(hw, 5, true);
+}
+
+static void samsung_s3c2410_mpll_disable(struct clk_hw *hw)
+{
+	samsung_s3c2410_pll_enable(hw, 5, false);
+}
+
+static int samsung_s3c2410_upll_enable(struct clk_hw *hw)
+{
+	return samsung_s3c2410_pll_enable(hw, 7, true);
+}
+
+static void samsung_s3c2410_upll_disable(struct clk_hw *hw)
+{
+	samsung_s3c2410_pll_enable(hw, 7, false);
+}
+
+static const struct clk_ops samsung_s3c2410_mpll_clk_min_ops = {
+	.recalc_rate = samsung_s3c2410_pll_recalc_rate,
+	.enable = samsung_s3c2410_mpll_enable,
+	.disable = samsung_s3c2410_mpll_disable,
+};
+
+static const struct clk_ops samsung_s3c2410_upll_clk_min_ops = {
+	.recalc_rate = samsung_s3c2410_pll_recalc_rate,
+	.enable = samsung_s3c2410_upll_enable,
+	.disable = samsung_s3c2410_upll_disable,
+};
+
+static const struct clk_ops samsung_s3c2440_mpll_clk_min_ops = {
+	.recalc_rate = samsung_s3c2440_mpll_recalc_rate,
+	.enable = samsung_s3c2410_mpll_enable,
+	.disable = samsung_s3c2410_mpll_disable,
+};
+
+static const struct clk_ops samsung_s3c2410_mpll_clk_ops = {
+	.recalc_rate = samsung_s3c2410_pll_recalc_rate,
+	.enable = samsung_s3c2410_mpll_enable,
+	.disable = samsung_s3c2410_mpll_disable,
+	.round_rate = samsung_pll_round_rate,
+	.set_rate = samsung_s3c2410_pll_set_rate,
+};
+
+static const struct clk_ops samsung_s3c2410_upll_clk_ops = {
+	.recalc_rate = samsung_s3c2410_pll_recalc_rate,
+	.enable = samsung_s3c2410_upll_enable,
+	.disable = samsung_s3c2410_upll_disable,
+	.round_rate = samsung_pll_round_rate,
+	.set_rate = samsung_s3c2410_pll_set_rate,
+};
+
+static const struct clk_ops samsung_s3c2440_mpll_clk_ops = {
+	.recalc_rate = samsung_s3c2440_mpll_recalc_rate,
+	.enable = samsung_s3c2410_mpll_enable,
+	.disable = samsung_s3c2410_mpll_disable,
+	.round_rate = samsung_pll_round_rate,
+	.set_rate = samsung_s3c2410_pll_set_rate,
+};
+
+/*
  * PLL2550x Clock Type
  */
 
@@ -866,6 +1030,24 @@ static void __init _samsung_clk_register_pll(struct samsung_pll_clock *pll_clk,
 		else
 			init.ops = &samsung_pll46xx_clk_ops;
 		break;
+	case pll_s3c2410_mpll:
+		if (!pll->rate_table)
+			init.ops = &samsung_s3c2410_mpll_clk_min_ops;
+		else
+			init.ops = &samsung_s3c2410_mpll_clk_ops;
+		break;
+	case pll_s3c2410_upll:
+		if (!pll->rate_table)
+			init.ops = &samsung_s3c2410_upll_clk_min_ops;
+		else
+			init.ops = &samsung_s3c2410_upll_clk_ops;
+		break;
+	case pll_s3c2440_mpll:
+		if (!pll->rate_table)
+			init.ops = &samsung_s3c2440_mpll_clk_min_ops;
+		else
+			init.ops = &samsung_s3c2440_mpll_clk_ops;
+		break;
 	default:
 		pr_warn("%s: Unknown pll type for pll clk %s\n",
 			__func__, pll_clk->name);
drivers/clk/samsung/clk-pll.h +3 -0
index 5b64bdb..6428bcc 100644
@@ -28,6 +28,9 @@ enum samsung_pll_type {
 	pll_6552,
 	pll_6552_s3c2416,
 	pll_6553,
+	pll_s3c2410_mpll,
+	pll_s3c2410_upll,
+	pll_s3c2440_mpll,
 };
 
 #define PLL_35XX_RATE(_rate, _m, _p, _s)			\
Signature · 1 line
1.8.5.3
#3 lore raw

PATCH v2 3/5 dt-bindings: add documentation for s3c2412 clock controller

In reply to Heiko Stübner

Describe the clock controller of the s3c2412.

---
 .../bindings/clock/samsung,s3c2412-clock.txt       | 50 ++++++++++++++++++++++
 1 file changed, 50 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt
Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt new file +50 -0
new file mode 100644
index 0000000..2b43096
@@ -0,0 +1,50 @@
+* Samsung S3C2412 Clock Controller
+
+The S3C2412 clock controller generates and supplies clock to various controllers
+within the SoC. The clock binding described here is applicable to the s3c2412
+and s3c2413 SoCs in the s3c24x family.
+
+Required Properties:
+
+- compatible: should be "samsung,s3c2412-clock"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- #clock-cells: should be 1.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. Some of the clocks are available only
+on a particular SoC.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/s3c2412.h header and can be used in device
+tree sources.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xti" - crystal input - required,
+ - "ext" - external clock source - optional,
+
+Example: Clock controller node:
+
+	clocks: clock-controller at 4c000000 {
+		compatible = "samsung,s3c2412-clock";
+		reg = <0x4c000000 0x20>;
+		#clock-cells = <1>;
+	};
+
+Example: UART controller node that consumes the clock generated by the clock
+  controller (refer to the standard clock bindings for information about
+  "clocks" and "clock-names" properties):
+
+	serial at 50004000 {
+		compatible = "samsung,s3c2412-uart";
+		reg = <0x50004000 0x4000>;
+		interrupts = <1 23 3 4>, <1 23 4 4>;
+		clock-names = "uart", "clk_uart_baud2", "clk_uart_baud3";
+		clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
+			 <&clocks SCLK_UART>;
+		status = "disabled";
+	};
Signature · 1 line
1.8.5.3
#4 lore raw

PATCH v2 4/5 clk: samsung: add clock controller driver for s3c2412

In reply to Heiko Stübner

This driver can handle the clock controller in the s3c2412 soc.

The clock structure is built according to the manuals of the included SoCs and might include changes in comparison to the previous clock structure.

---
 drivers/clk/samsung/Makefile        |   1 +
 drivers/clk/samsung/clk-s3c2412.c   | 268 ++++++++++++++++++++++++++++++++++++
 include/dt-bindings/clock/s3c2412.h |  73 ++++++++++
 3 files changed, 342 insertions(+)
 create mode 100644 drivers/clk/samsung/clk-s3c2412.c
 create mode 100644 include/dt-bindings/clock/s3c2412.h
drivers/clk/samsung/Makefile +1 -0
index 4c892c6..77313e2 100644
@@ -8,5 +8,6 @@ obj-$(CONFIG_SOC_EXYNOS5250)	+= clk-exynos5250.o
 obj-$(CONFIG_SOC_EXYNOS5420)	+= clk-exynos5420.o
 obj-$(CONFIG_SOC_EXYNOS5440)	+= clk-exynos5440.o
 obj-$(CONFIG_ARCH_EXYNOS)	+= clk-exynos-audss.o
+obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o
 obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o
 obj-$(CONFIG_ARCH_S3C64XX)	+= clk-s3c64xx.o
drivers/clk/samsung/clk-s3c2412.c new file +269 -0

269 lines not on this page · raw message

include/dt-bindings/clock/s3c2412.h new file +73 -0

73 lines not on this page · raw message

Signature · 1 line
1.8.5.3
#5 lore raw

PATCH v2 5/5 ARM: S3C24XX: convert s3c2412 to common clock framework

In reply to Heiko Stübner

Convert all machines using these cpus to use the ccf clock driver instead of the legacy Samsung clock implementation.

---
 arch/arm/mach-s3c24xx/Kconfig         |   8 +-
 arch/arm/mach-s3c24xx/Makefile        |   2 +-
 arch/arm/mach-s3c24xx/clock-s3c2412.c | 761 ----------------------------------
 arch/arm/mach-s3c24xx/common.c        |   9 +-
 arch/arm/mach-s3c24xx/common.h        |   4 +
 arch/arm/mach-s3c24xx/mach-jive.c     |   9 +-
 arch/arm/mach-s3c24xx/mach-smdk2413.c |   9 +-
 arch/arm/mach-s3c24xx/mach-vstms.c    |   9 +-
 arch/arm/mach-s3c24xx/s3c2412.c       |  43 --
 9 files changed, 40 insertions(+), 814 deletions(-)
 delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2412.c
arch/arm/mach-s3c24xx/Kconfig +7 -1
index 3c351cf..d067f76 100644
@@ -39,9 +39,10 @@ config CPU_S3C2410
 
 config CPU_S3C2412
 	bool "SAMSUNG S3C2412"
-	depends on SAMSUNG_CLOCK
+	select COMMON_CLK
 	select CPU_ARM926T
 	select CPU_LLSERIAL_S3C2440
+	select S3C2412_COMMON_CLK
 	select S3C2412_DMA if S3C24XX_DMA
 	select S3C2412_PM if PM
 	help
@@ -363,6 +364,11 @@ config S3C2412_PM_SLEEP
 
 if CPU_S3C2412
 
+config S3C2412_COMMON_CLK
+	bool
+	help
+	  Build the s3c2412 clock driver based on the common clock framework.
+
 config CPU_S3C2412_ONLY
 	bool
 	depends on !CPU_S3C2410 && !CPU_S3C2416 && !CPU_S3C2440 && \
arch/arm/mach-s3c24xx/Makefile +1 -1
index ba0e547..f254797 100644
@@ -21,7 +21,7 @@ obj-$(CONFIG_S3C2410_DMA)	+= dma-s3c2410.o
 obj-$(CONFIG_S3C2410_PLL)	+= pll-s3c2410.o
 obj-$(CONFIG_S3C2410_PM)	+= pm-s3c2410.o sleep-s3c2410.o
 
-obj-$(CONFIG_CPU_S3C2412)	+= s3c2412.o clock-s3c2412.o
+obj-$(CONFIG_CPU_S3C2412)	+= s3c2412.o
 obj-$(CONFIG_S3C2412_DMA)	+= dma-s3c2412.o
 obj-$(CONFIG_S3C2412_PM)	+= pm-s3c2412.o
 obj-$(CONFIG_S3C2412_PM_SLEEP)	+= sleep-s3c2412.o
arch/arm/mach-s3c24xx/clock-s3c2412.c deleted +0 -761

761 lines not on this page · raw message

arch/arm/mach-s3c24xx/common.c +7 -2
index 015e6c0..92a1e3a 100644
@@ -127,7 +127,6 @@ static struct cpu_table cpu_ids[] __initdata = {
 		.idcode		= 0x32412001,
 		.idmask		= 0xffffffff,
 		.map_io		= s3c2412_map_io,
-		.init_clocks	= s3c2412_init_clocks,
 		.init_uarts	= s3c2412_init_uarts,
 		.init		= s3c2412_init,
 		.name		= name_s3c2412,
@@ -136,7 +135,6 @@ static struct cpu_table cpu_ids[] __initdata = {
 		.idcode		= 0x32412003,
 		.idmask		= 0xffffffff,
 		.map_io		= s3c2412_map_io,
-		.init_clocks	= s3c2412_init_clocks,
 		.init_uarts	= s3c2412_init_uarts,
 		.init		= s3c2412_init,
 		.name		= name_s3c2412,
@@ -536,6 +534,13 @@ struct platform_device s3c2443_device_dma = {
 };
 #endif
 
+#ifdef CONFIG_CPU_S3C2412
+void __init s3c2412_init_clocks(int xtal)
+{
+	s3c2412_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR);
+}
+#endif
+
 #ifdef CONFIG_CPU_S3C2416
 void __init s3c2416_init_clocks(int xtal)
 {
arch/arm/mach-s3c24xx/common.h +4 -0
index d7323f1..6744739 100644
@@ -114,6 +114,10 @@ extern struct platform_device s3c2412_device_dma;
 extern struct platform_device s3c2440_device_dma;
 extern struct platform_device s3c2443_device_dma;
 
+#ifdef CONFIG_S3C2412_COMMON_CLK
+void __init s3c2412_common_clk_init(struct device_node *np, unsigned long xti_f,
+				unsigned long ext_f, void __iomem *reg_base);
+#endif
 #ifdef CONFIG_S3C2443_COMMON_CLK
 void __init s3c2443_common_clk_init(struct device_node *np, unsigned long xti_f,
 				    int current_soc,
arch/arm/mach-s3c24xx/mach-jive.c +7 -2
index 67cb8e9..ac6a468 100644
@@ -507,11 +507,16 @@ static struct syscore_ops jive_pm_syscore_ops = {
 static void __init jive_map_io(void)
 {
 	s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc));
-	s3c24xx_init_clocks(12000000);
 	s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs));
 	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
 
+static void __init jive_init_time(void)
+{
+	s3c2412_init_clocks(12000000);
+	samsung_timer_init();
+}
+
 static void jive_power_off(void)
 {
 	printk(KERN_INFO "powering system down...\n");
@@ -665,6 +670,6 @@ MACHINE_START(JIVE, "JIVE")
 	.init_irq	= s3c2412_init_irq,
 	.map_io		= jive_map_io,
 	.init_machine	= jive_machine_init,
-	.init_time	= samsung_timer_init,
+	.init_time	= jive_init_time,
 	.restart	= s3c2412_restart,
 MACHINE_END
arch/arm/mach-s3c24xx/mach-smdk2413.c +7 -2
index f5bc721..9be3696 100644
@@ -106,11 +106,16 @@ static void __init smdk2413_fixup(struct tag *tags, char **cmdline,
 static void __init smdk2413_map_io(void)
 {
 	s3c24xx_init_io(smdk2413_iodesc, ARRAY_SIZE(smdk2413_iodesc));
-	s3c24xx_init_clocks(12000000);
 	s3c24xx_init_uarts(smdk2413_uartcfgs, ARRAY_SIZE(smdk2413_uartcfgs));
 	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
 
+static void __init smdk2413_init_time(void)
+{
+	s3c2412_init_clocks(12000000);
+	samsung_timer_init();
+}
+
 static void __init smdk2413_machine_init(void)
 {	/* Turn off suspend on both USB ports, and switch the
 	 * selectable USB port to USB device mode. */
@@ -159,6 +164,6 @@ MACHINE_START(SMDK2413, "SMDK2413")
 	.init_irq	= s3c2412_init_irq,
 	.map_io		= smdk2413_map_io,
 	.init_machine	= smdk2413_machine_init,
-	.init_time	= samsung_timer_init,
+	.init_time	= smdk2413_init_time,
 	.restart	= s3c2412_restart,
 MACHINE_END
arch/arm/mach-s3c24xx/mach-vstms.c +7 -2
index f7ec9c5..d4ebaf4 100644
@@ -142,11 +142,16 @@ static void __init vstms_fixup(struct tag *tags, char **cmdline,
 static void __init vstms_map_io(void)
 {
 	s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
-	s3c24xx_init_clocks(12000000);
 	s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
 	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
 
+static void __init vstms_init_time(void)
+{
+	s3c2412_init_clocks(12000000);
+	samsung_timer_init();
+}
+
 static void __init vstms_init(void)
 {
 	s3c_i2c0_set_platdata(NULL);
@@ -162,6 +167,6 @@ MACHINE_START(VSTMS, "VSTMS")
 	.init_irq	= s3c2412_init_irq,
 	.init_machine	= vstms_init,
 	.map_io		= vstms_map_io,
-	.init_time	= samsung_timer_init,
+	.init_time	= vstms_init_time,
 	.restart	= s3c2412_restart,
 MACHINE_END
arch/arm/mach-s3c24xx/s3c2412.c +0 -43

49 lines not on this page · raw message

Signature · 1 line
1.8.5.3
#6 lore raw

v2 cover ARM: S3C24XX: convert s3c2412 to common clock framework

In reply to Heiko Stübner

Hi,

Quoted 44 lines · Heiko St?bner

Second incarnation of the series converting s3c2412/s3c2413 to the common clock framework. As before the conversion is done by a mix of datasheet data and the pre-existing clock code and as this time I have no hardware of this type, it is compile-tested only. So hopefully somebody with s3c2412 hw will be able to test it for real.

The conversion of s3c2412 now moved in front of the s3c2410/s3c2440/s3c2442 one, as I'll need a bit more time for the clockout changes suggested by Tomasz Figa.

This series builds on top of the previous submitted s3c2443/s3c2416 series.

Changes since v1:
- move in front of s3c2410 conversion, therefore move 2 necessary patches that also got ACKs, from there into this series
- adapt to Samsung clock pm rework from Tomasz Figa
- apply some changes suggested by Tomasz Figa in the s3c2410 clock driver that also apply to this driver.

Heiko Stuebner (5):
ARM: S3C24XX: only store clock registers when old clock code is active
clk: samsung: add plls used by the early s3c24xx cpus
dt-bindings: add documentation for s3c2412 clock controller
clk: samsung: add clock controller driver for s3c2412
ARM: S3C24XX: convert s3c2412 to common clock framework

  .../bindings/clock/samsung,s3c2412-clock.txt       |  50 ++
  arch/arm/mach-s3c24xx/Kconfig                      |   8 +-
  arch/arm/mach-s3c24xx/Makefile                     |   2 +-
  arch/arm/mach-s3c24xx/clock-s3c2412.c              | 761 ---------------------
  arch/arm/mach-s3c24xx/common.c                     |   9 +-
  arch/arm/mach-s3c24xx/common.h                     |   4 +
  arch/arm/mach-s3c24xx/mach-jive.c                  |   9 +-
  arch/arm/mach-s3c24xx/mach-smdk2413.c              |   9 +-
  arch/arm/mach-s3c24xx/mach-vstms.c                 |   9 +-
  arch/arm/mach-s3c24xx/pm.c                         |  13 +-
  arch/arm/mach-s3c24xx/s3c2412.c                    |  43 --
  drivers/clk/samsung/Makefile                       |   1 +
  drivers/clk/samsung/clk-pll.c                      | 182 +++++
  drivers/clk/samsung/clk-pll.h                      |   3 +
  drivers/clk/samsung/clk-s3c2412.c                  | 268 ++++++++
  include/dt-bindings/clock/s3c2412.h                |  73 ++
  16 files changed, 627 insertions(+), 817 deletions(-)
Quoted 5 lines

create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2412.c
create mode 100644 drivers/clk/samsung/clk-s3c2412.c
create mode 100644 include/dt-bindings/clock/s3c2412.h

For mach and DT patches:

Kukjin, I'll take binding and clock patches to Samsung clock tree as soon as DT bindings get acked by one of DT maintainers. I will prepare a branch for you to apply mach patches on top. Is it fine for you?

Best regards,
Tomasz

#7 lore raw

v2 cover ARM: S3C24XX: convert s3c2412 to common clock framework

Hi Tomasz,

Am Sonntag, 23. Februar 2014, 00:49:56 schrieb Tomasz Figa:

Quoted 60 lines

Hi,

Quoted 51 lines · Heiko St?bner

Second incarnation of the series converting s3c2412/s3c2413 to the common clock framework. As before the conversion is done by a mix of datasheet data and the pre-existing clock code and as this time I have no hardware of this type, it is compile-tested only. So hopefully somebody with s3c2412
hw will be able to test it for real.

The conversion of s3c2412 now moved in front of the s3c2410/s3c2440/s3c2442
one, as I'll need a bit more time for the clockout changes suggested by Tomasz Figa.

This series builds on top of the previous submitted s3c2443/s3c2416 series.

Changes since v1:
- move in front of s3c2410 conversion, therefore move 2 necessary patches

that also got ACKs, from there into this series

- adapt to Samsung clock pm rework from Tomasz Figa
- apply some changes suggested by Tomasz Figa in the s3c2410 clock driver

that also apply to this driver.

Heiko Stuebner (5):
ARM: S3C24XX: only store clock registers when old clock code is active
clk: samsung: add plls used by the early s3c24xx cpus
dt-bindings: add documentation for s3c2412 clock controller
clk: samsung: add clock controller driver for s3c2412
ARM: S3C24XX: convert s3c2412 to common clock framework

  .../bindings/clock/samsung,s3c2412-clock.txt       |  50 ++
  arch/arm/mach-s3c24xx/Kconfig                      |   8 +-
  arch/arm/mach-s3c24xx/Makefile                     |   2 +-
  arch/arm/mach-s3c24xx/clock-s3c2412.c              | 761
  --------------------- arch/arm/mach-s3c24xx/common.c                   
   |   9 +-
  arch/arm/mach-s3c24xx/common.h                     |   4 +
  arch/arm/mach-s3c24xx/mach-jive.c                  |   9 +-
  arch/arm/mach-s3c24xx/mach-smdk2413.c              |   9 +-
  arch/arm/mach-s3c24xx/mach-vstms.c                 |   9 +-
  arch/arm/mach-s3c24xx/pm.c                         |  13 +-
  arch/arm/mach-s3c24xx/s3c2412.c                    |  43 --
  drivers/clk/samsung/Makefile                       |   1 +
  drivers/clk/samsung/clk-pll.c                      | 182 +++++
  drivers/clk/samsung/clk-pll.h                      |   3 +
  drivers/clk/samsung/clk-s3c2412.c                  | 268 ++++++++
  include/dt-bindings/clock/s3c2412.h                |  73 ++
  16 files changed, 627 insertions(+), 817 deletions(-)
Quoted 5 lines

create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2412.c create mode 100644 drivers/clk/samsung/clk-s3c2412.c create mode 100644 include/dt-bindings/clock/s3c2412.h

Quoted 7 lines

For mach and DT patches:

Kukjin, I'll take binding and clock patches to Samsung clock tree as soon as DT bindings get acked by one of DT maintainers. I will prepare a branch for you to apply mach patches on top. Is it fine for you?

I think Kukjin already applied the s3c2416/s3c2443 series on top of your clock-pm-changes in the linux-samsung tree [1], so it might be best to just pile this series on top of it.

Heiko

[1] https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/?h=v3.15-next/clk-s3c24xx

#8 lore raw

v2 cover ARM: S3C24XX: convert s3c2412 to common clock framework

Quoted 67 lines · Heiko St?bner

Hi Tomasz,

Am Sonntag, 23. Februar 2014, 00:49:56 schrieb Tomasz Figa:

Quoted 64 lines

Hi,

Quoted 51 lines · Heiko St?bner

Second incarnation of the series converting s3c2412/s3c2413 to the common clock framework. As before the conversion is done by a mix of datasheet data and the pre-existing clock code and as this time I have no hardware of this type, it is compile-tested only. So hopefully somebody with s3c2412
hw will be able to test it for real.

The conversion of s3c2412 now moved in front of the s3c2410/s3c2440/s3c2442
one, as I'll need a bit more time for the clockout changes suggested by Tomasz Figa.

This series builds on top of the previous submitted s3c2443/s3c2416 series.

Changes since v1:
- move in front of s3c2410 conversion, therefore move 2 necessary patches

that also got ACKs, from there into this series

- adapt to Samsung clock pm rework from Tomasz Figa
- apply some changes suggested by Tomasz Figa in the s3c2410 clock driver

that also apply to this driver.

Heiko Stuebner (5):
ARM: S3C24XX: only store clock registers when old clock code is active
clk: samsung: add plls used by the early s3c24xx cpus
dt-bindings: add documentation for s3c2412 clock controller
clk: samsung: add clock controller driver for s3c2412
ARM: S3C24XX: convert s3c2412 to common clock framework

   .../bindings/clock/samsung,s3c2412-clock.txt       |  50 ++
   arch/arm/mach-s3c24xx/Kconfig                      |   8 +-
   arch/arm/mach-s3c24xx/Makefile                     |   2 +-
   arch/arm/mach-s3c24xx/clock-s3c2412.c              | 761
   --------------------- arch/arm/mach-s3c24xx/common.c
    |   9 +-
   arch/arm/mach-s3c24xx/common.h                     |   4 +
   arch/arm/mach-s3c24xx/mach-jive.c                  |   9 +-
   arch/arm/mach-s3c24xx/mach-smdk2413.c              |   9 +-
   arch/arm/mach-s3c24xx/mach-vstms.c                 |   9 +-
   arch/arm/mach-s3c24xx/pm.c                         |  13 +-
   arch/arm/mach-s3c24xx/s3c2412.c                    |  43 --
   drivers/clk/samsung/Makefile                       |   1 +
   drivers/clk/samsung/clk-pll.c                      | 182 +++++
   drivers/clk/samsung/clk-pll.h                      |   3 +
   drivers/clk/samsung/clk-s3c2412.c                  | 268 ++++++++
   include/dt-bindings/clock/s3c2412.h                |  73 ++
   16 files changed, 627 insertions(+), 817 deletions(-)
Quoted 5 lines

create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2412.c create mode 100644 drivers/clk/samsung/clk-s3c2412.c create mode 100644 include/dt-bindings/clock/s3c2412.h

For mach and DT patches:

Quoted 7 lines
Quoted 3 lines

Kukjin, I'll take binding and clock patches to Samsung clock tree as soon as DT bindings get acked by one of DT maintainers. I will prepare a branch for you to apply mach patches on top. Is it fine for you?

I think Kukjin already applied the s3c2416/s3c2443 series on top of your clock-pm-changes in the linux-samsung tree [1], so it might be best to just pile this series on top of it.

I'm aware of this, but I'm afraid this might cause conflicts with remaining patches that I might have to apply in this release cycle.

Patch clk/samsung: add support for multiple clock providers[1] is mostly what I have in my mind, but there is also at least one patch that is based on top of PM rework floating on the list.

I'd try to sort this out first with Kukjin and if we fail we will have to fall back to merging any clock patches through Samsung tree for this release cycle.

[1] http://www.spinics.net/lists/linux-samsung-soc/msg26695.html

Best regards,
Tomasz

#9 lore raw

v2 cover ARM: S3C24XX: convert s3c2412 to common clock framework

Quoting Tomasz Figa (2014-02-22 16:48:45)

Quoted 79 lines · Heiko St?bner
Quoted 67 lines

Hi Tomasz,

Am Sonntag, 23. Februar 2014, 00:49:56 schrieb Tomasz Figa:

Quoted 64 lines

Hi,

Quoted 51 lines · Heiko St?bner

Second incarnation of the series converting s3c2412/s3c2413 to the common clock framework. As before the conversion is done by a mix of datasheet data and the pre-existing clock code and as this time I have no hardware of this type, it is compile-tested only. So hopefully somebody with s3c2412
hw will be able to test it for real.

The conversion of s3c2412 now moved in front of the s3c2410/s3c2440/s3c2442
one, as I'll need a bit more time for the clockout changes suggested by Tomasz Figa.

This series builds on top of the previous submitted s3c2443/s3c2416 series.

Changes since v1:
- move in front of s3c2410 conversion, therefore move 2 necessary patches

that also got ACKs, from there into this series

- adapt to Samsung clock pm rework from Tomasz Figa
- apply some changes suggested by Tomasz Figa in the s3c2410 clock driver

that also apply to this driver.

Heiko Stuebner (5):
ARM: S3C24XX: only store clock registers when old clock code is active
clk: samsung: add plls used by the early s3c24xx cpus
dt-bindings: add documentation for s3c2412 clock controller
clk: samsung: add clock controller driver for s3c2412
ARM: S3C24XX: convert s3c2412 to common clock framework

   .../bindings/clock/samsung,s3c2412-clock.txt       |  50 ++
   arch/arm/mach-s3c24xx/Kconfig                      |   8 +-
   arch/arm/mach-s3c24xx/Makefile                     |   2 +-
   arch/arm/mach-s3c24xx/clock-s3c2412.c              | 761
   --------------------- arch/arm/mach-s3c24xx/common.c
    |   9 +-
   arch/arm/mach-s3c24xx/common.h                     |   4 +
   arch/arm/mach-s3c24xx/mach-jive.c                  |   9 +-
   arch/arm/mach-s3c24xx/mach-smdk2413.c              |   9 +-
   arch/arm/mach-s3c24xx/mach-vstms.c                 |   9 +-
   arch/arm/mach-s3c24xx/pm.c                         |  13 +-
   arch/arm/mach-s3c24xx/s3c2412.c                    |  43 --
   drivers/clk/samsung/Makefile                       |   1 +
   drivers/clk/samsung/clk-pll.c                      | 182 +++++
   drivers/clk/samsung/clk-pll.h                      |   3 +
   drivers/clk/samsung/clk-s3c2412.c                  | 268 ++++++++
   include/dt-bindings/clock/s3c2412.h                |  73 ++
   16 files changed, 627 insertions(+), 817 deletions(-)
Quoted 5 lines

create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2412.c create mode 100644 drivers/clk/samsung/clk-s3c2412.c create mode 100644 include/dt-bindings/clock/s3c2412.h

For mach and DT patches:

Quoted 7 lines
Quoted 3 lines

Kukjin, I'll take binding and clock patches to Samsung clock tree as soon as DT bindings get acked by one of DT maintainers. I will prepare a branch for you to apply mach patches on top. Is it fine for you?

I think Kukjin already applied the s3c2416/s3c2443 series on top of your clock-pm-changes in the linux-samsung tree [1], so it might be best to just pile this series on top of it.

I'm aware of this, but I'm afraid this might cause conflicts with remaining patches that I might have to apply in this release cycle.

Quoted 7 lines

Patch clk/samsung: add support for multiple clock providers[1] is mostly what I have in my mind, but there is also at least one patch that is based on top of PM rework floating on the list.

I'd try to sort this out first with Kukjin and if we fail we will have to fall back to merging any clock patches through Samsung tree for this release cycle.

Better if we can sort it out, but if these patches must go through the samsung tree then please add my Ack.

Regards,
Mike

Quoted 5 lines

[1] http://www.spinics.net/lists/linux-samsung-soc/msg26695.html

Best regards,
Tomasz

#10 lore raw

v2 cover ARM: S3C24XX: convert s3c2412 to common clock framework

Quoted 88 lines · Mike Turquette

Quoting Tomasz Figa (2014-02-22 16:48:45)

Quoted 86 lines · Heiko St?bner
Quoted 67 lines

Hi Tomasz,

Am Sonntag, 23. Februar 2014, 00:49:56 schrieb Tomasz Figa:

Quoted 64 lines

Hi,

Quoted 48 lines · Heiko St?bner

Second incarnation of the series converting s3c2412/s3c2413 to the common clock framework. As before the conversion is done by a mix of datasheet data and the pre-existing clock code and as this time I have no hardware of this type, it is compile-tested only. So hopefully somebody with s3c2412
hw will be able to test it for real.

The conversion of s3c2412 now moved in front of the s3c2410/s3c2440/s3c2442
one, as I'll need a bit more time for the clockout changes suggested by Tomasz Figa.

This series builds on top of the previous submitted s3c2443/s3c2416 series.

Changes since v1:
- move in front of s3c2410 conversion, therefore move 2 necessary patches

that also got ACKs, from there into this series

- adapt to Samsung clock pm rework from Tomasz Figa
- apply some changes suggested by Tomasz Figa in the s3c2410 clock driver

that also apply to this driver.

Heiko Stuebner (5):
ARM: S3C24XX: only store clock registers when old clock code is active
clk: samsung: add plls used by the early s3c24xx cpus
dt-bindings: add documentation for s3c2412 clock controller
clk: samsung: add clock controller driver for s3c2412
ARM: S3C24XX: convert s3c2412 to common clock framework

.../bindings/clock/samsung,s3c2412-clock.txt | 50 ++
arch/arm/mach-s3c24xx/Kconfig | 8 +-
arch/arm/mach-s3c24xx/Makefile | 2 +-
arch/arm/mach-s3c24xx/clock-s3c2412.c | 761
--------------------- arch/arm/mach-s3c24xx/common.c
| 9 +-
arch/arm/mach-s3c24xx/common.h | 4 +
arch/arm/mach-s3c24xx/mach-jive.c | 9 +-
arch/arm/mach-s3c24xx/mach-smdk2413.c | 9 +-
arch/arm/mach-s3c24xx/mach-vstms.c | 9 +-
arch/arm/mach-s3c24xx/pm.c | 13 +-
arch/arm/mach-s3c24xx/s3c2412.c | 43 --
drivers/clk/samsung/Makefile | 1 +
drivers/clk/samsung/clk-pll.c | 182 +++++
drivers/clk/samsung/clk-pll.h | 3 +

Quoted 8 lines

drivers/clk/samsung/clk-s3c2412.c | 268 ++++++++
include/dt-bindings/clock/s3c2412.h | 73 ++
16 files changed, 627 insertions(+), 817 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2412.c create mode 100644 drivers/clk/samsung/clk-s3c2412.c create mode 100644 include/dt-bindings/clock/s3c2412.h

For mach and DT patches:

Quoted 7 lines
Quoted 3 lines

Kukjin, I'll take binding and clock patches to Samsung clock tree as soon as DT bindings get acked by one of DT maintainers. I will prepare a branch for you to apply mach patches on top. Is it fine for you?

I think Kukjin already applied the s3c2416/s3c2443 series on top of your clock-pm-changes in the linux-samsung tree [1], so it might be best to just pile this series on top of it.

I'm aware of this, but I'm afraid this might cause conflicts with remaining patches that I might have to apply in this release cycle.

Patch clk/samsung: add support for multiple clock providers[1] is mostly what I have in my mind, but there is also at least one patch that is based on top of PM rework floating on the list.

I'd try to sort this out first with Kukjin and if we fail we will have to fall back to merging any clock patches through Samsung tree for this release cycle.

YES!

Quoted 3 lines

Better if we can sort it out, but if these patches must go through the samsung tree then please add my Ack.

Agreed and thanks.

Tomasz, I'll take this series with you and Mike's ack then if required, can you please merge the branch "v3.15-next/clk-s3c24xx" into your clk branch?

- Kukjin