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Add R8A7792 I2C support

PATCH New Sergei Shtylyov 3 participants 18 messages Jul 23, 2016 – Sep 5, 2016 Device tree bindings

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Sergei Shtylyov

author
#0 lore raw

cover Add R8A7792 I2C support

Hello.

Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160722-v4.7-rc7' tag plus the SDHI patches just reposted. We're adding the R8A7792 I2C clocks and device nodes.

[1/2] ARM: dts: r8a7792: add I2C clocks
[2/2] ARM: dts: r8a7792: add I2C support

WBR, Sergei

author
#1 lore raw

PATCH 1/2 ARM: dts: r8a7792: add I2C clocks

Describe the I2C[0-5] clocks in the R8A7792 device tree.

Signed-off-by Sergei Shtylyov <[email protected]>
---
 arch/arm/boot/dts/r8a7792.dtsi |    9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7792.dtsi +7 -2
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
@@ -632,7 +632,8 @@
 			clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
 				 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
 				 <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>,
-				 <&cp_clk>, <&cp_clk>;
+				 <&cp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>,
+				 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
 			#clock-cells = <1>;
 			clock-indices = <
 				R8A7792_CLK_GPIO7 R8A7792_CLK_GPIO6

@@ -642,12 +643,16 @@
 				R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10
 				R8A7792_CLK_CAN1 R8A7792_CLK_CAN0
 				R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8
+				R8A7792_CLK_I2C5 R8A7792_CLK_I2C4
+				R8A7792_CLK_I2C3 R8A7792_CLK_I2C2
+				R8A7792_CLK_I2C1 R8A7792_CLK_I2C0
 			>;
 			clock-output-names =
 				"gpio7", "gpio6", "gpio5", "gpio4",
 				"gpio3", "gpio2", "gpio1", "gpio0",
 				"gpio11", "gpio10", "can1", "can0",
-				"gpio9", "gpio8";
+				"gpio9", "gpio8", "i2c5", "i2c4",
+				"i2c3",	"i2c2", "i2c1", "i2c0";
 		};
 	};
author
#3 lore raw

PATCH 1/2 ARM: dts: r8a7792: add I2C clocks

Quoted 5 lines · Simon Horman
Quoted 3 lines

Describe the I2C[0-5] clocks in the R8A7792 device tree.

Signed-off-by Sergei Shtylyov <[email protected]>

Thanks, I have queued this up for v4.8.

    4.9 you mean?

MBR, Sergei

#4 lore raw

PATCH 1/2 ARM: dts: r8a7792: add I2C clocks

Quoted 9 lines · Sergei Shtylyov
Quoted 5 lines · Simon Horman
Quoted 3 lines

Describe the I2C[0-5] clocks in the R8A7792 device tree.

Signed-off-by Sergei Shtylyov <[email protected]>

Thanks, I have queued this up for v4.8.

   4.9 you mean?

Yes, 4.9.

#5 lore raw

PATCH 1/2 ARM: dts: r8a7792: add I2C clocks

In reply to Sergei Shtylyov
Quoted 3 lines · Sergei Shtylyov

Describe the I2C[0-5] clocks in the R8A7792 device tree.

Signed-off-by Sergei Shtylyov <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

author
#6 lore raw

PATCH 2/2 ARM: dts: r8a7792: add I2C support

In reply to Sergei Shtylyov

Define the generic R8A7792 parts of the I2C[0-5] device node.

Signed-off-by Sergei Shtylyov <[email protected]>
---
 arch/arm/boot/dts/r8a7792.dtsi |   82 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 82 insertions(+)
arch/arm/boot/dts/r8a7792.dtsi +82 -0
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
@@ -18,6 +18,15 @@
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	aliases {
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;

@@ -466,6 +475,79 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
+		};
+
+		/* I2C doesn't need pinmux */
+		i2c0: i2c at e6508000 {
+			compatible = "renesas,i2c-r8a7792";
+			reg = <0 0xe6508000 0 0x40>;
+			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7792_CLK_I2C0>;
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			i2c-scl-internal-delay-ns = <6>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c at e6518000 {
+			compatible = "renesas,i2c-r8a7792";
+			reg = <0 0xe6518000 0 0x40>;
+			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7792_CLK_I2C1>;
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			i2c-scl-internal-delay-ns = <6>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c at e6530000 {
+			compatible = "renesas,i2c-r8a7792";
+			reg = <0 0xe6530000 0 0x40>;
+			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7792_CLK_I2C2>;
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			i2c-scl-internal-delay-ns = <6>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c at e6540000 {
+			compatible = "renesas,i2c-r8a7792";
+			reg = <0 0xe6540000 0 0x40>;
+			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7792_CLK_I2C3>;
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			i2c-scl-internal-delay-ns = <6>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c at e6520000 {
+			compatible = "renesas,i2c-r8a7792";
+			reg = <0 0xe6520000 0 0x40>;
+			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7792_CLK_I2C4>;
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			i2c-scl-internal-delay-ns = <6>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c5: i2c at e6528000 {
+			compatible = "renesas,i2c-r8a7792";
+			reg = <0 0xe6528000 0 0x40>;
+			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7792_CLK_I2C5>;
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			i2c-scl-internal-delay-ns = <110>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
 		};
 
 		can0: can at e6e80000 {
author
#7 lore raw

PATCH 2/2 ARM: dts: r8a7792: add I2C support

Hello.

Quoted 1 line · Sergei Shtylyov

Define the generic R8A7792 parts of the I2C[0-5] device node.

Oops, nodes, of course!
Perhaps might be fixed when applying?

Quoted 1 line
Signed-off-by Sergei Shtylyov <[email protected]>

[...]

MBR, Sergei

#8 lore raw

PATCH 2/2 ARM: dts: r8a7792: add I2C support

Quoted 8 lines · Sergei Shtylyov

Hello.

Quoted 1 line · Sergei Shtylyov

Define the generic R8A7792 parts of the I2C[0-5] device node.

Oops, nodes, of course!
Perhaps might be fixed when applying?

Sure, done.

I have queued this up for v4.9.

#9 lore raw

PATCH 2/2 ARM: dts: r8a7792: add I2C support

In reply to Sergei Shtylyov
Quoted 3 lines · Sergei Shtylyov

Define the generic R8A7792 parts of the I2C[0-5] device node.

Signed-off-by Sergei Shtylyov <[email protected]>

JFTR, Reviewed-by: Geert Uytterhoeven <[email protected]>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

author
#10 lore raw

PATCH 1/1 ARM: dts: r8a7792: fix misindented line

In reply to Sergei Shtylyov

Commit 2a0900655d5e (ARM: dts: r8a7792: add I2C support) had a wrongly indented line at the end of the "aliases" subnode -- fix it.

Signed-off-by Sergei Shtylyov <[email protected]>

---
This patch is against the 'renesas-devel-20160725-v4.7-rc7' tag of Simon Horman's 'renesas.git' repo.

 arch/arm/boot/dts/r8a7792.dtsi |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/r8a7792.dtsi +1 -1
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
@@ -31,7 +31,7 @@
 		vin3 = &vin3;
 		vin4 = &vin4;
 		vin5 = &vin5;
-};
+	};
 
 	cpus {
 		#address-cells = <1>;
#11 lore raw

PATCH 1/1 ARM: dts: r8a7792: fix misindented line

Quoted 8 lines · Sergei Shtylyov

Commit 2a0900655d5e (ARM: dts: r8a7792: add I2C support) had a wrongly indented line at the end of the "aliases" subnode -- fix it.

Signed-off-by Sergei Shtylyov <[email protected]>

---
This patch is against the 'renesas-devel-20160725-v4.7-rc7' tag of Simon Horman's 'renesas.git' repo.

Thanks, I have queued this up for v4.9.

author
#12 lore raw

PATCH 1/1 ARM: dts: r8a7794: add VSP1 support

In reply to Sergei Shtylyov

Describe two instances (VSPS and VSPD0) of the VSP1 in the R8A7794 device tree.

Signed-off-by Sergei Shtylyov <[email protected]>

---
This patch is against the 'renesas-devel-20160815-v4.8-rc2' of Simon Horman's 'renesas.git' repo.

 arch/arm/boot/dts/r8a7794.dtsi |   16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm/boot/dts/r8a7794.dtsi +16 -0
Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
@@ -894,6 +894,22 @@
 		};
 	};
 
+	vsp1 at fe928000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe928000 0 0x8000>;
+		interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7794_CLK_VSP1_S>;
+		power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+	};
+
+	vsp1 at fe930000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe930000 0 0x8000>;
+		interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7794_CLK_VSP1_DU0>;
+		power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+	};
+
 	du: display at feb00000 {
 		compatible = "renesas,du-r8a7794";
 		reg = <0 0xfeb00000 0 0x40000>;
#13 lore raw

PATCH 1/1 ARM: dts: r8a7794: add VSP1 support

Quoted 4 lines · Sergei Shtylyov

Describe two instances (VSPS and VSPD0) of the VSP1 in the R8A7794 device tree.

Signed-off-by Sergei Shtylyov <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

author
#15 lore raw

PATCH 1/1 ARM: dts: r8a7794: fix PWM clock parent

In reply to Sergei Shtylyov

When removing the non-existing thermal clock I forgot to remove its parent from the node's "clocks" property -- this led to a wrong PWM clock's parent clock.

Fixes 2a29f9d6fea8 ("ARM: dts: r8a7794: add MSTP5 clocks")
Signed-off-by Sergei Shtylyov <[email protected]>

---
The patch is against the 'renesas-devel-20160902-v4.8-rc4' branch of Simon Horman's 'renesas.git' repo...

arch/arm/boot/dts/r8a7794.dtsi | 2 +-

 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/r8a7794.dtsi +1 -1
Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
@@ -1251,7 +1251,7 @@
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
-			clocks = <&hp_clk>, <&extal_clk>, <&p_clk>;
+			clocks = <&hp_clk>, <&p_clk>;
 			#clock-cells = <1>;
 			clock-indices = <R8A7794_CLK_AUDIO_DMAC0
 					 R8A7794_CLK_PWM>;
#16 lore raw

PATCH 1/1 ARM: dts: r8a7794: fix PWM clock parent

Quoted 6 lines · Sergei Shtylyov

When removing the non-existing thermal clock I forgot to remove its parent from the node's "clocks" property -- this led to a wrong PWM clock's parent clock.

Fixes 2a29f9d6fea8 ("ARM: dts: r8a7794: add MSTP5 clocks")
Signed-off-by Sergei Shtylyov <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#17 lore raw

PATCH 1/1 ARM: dts: r8a7794: fix PWM clock parent

Quoted 10 lines · Geert Uytterhoeven
Quoted 6 lines · Sergei Shtylyov

When removing the non-existing thermal clock I forgot to remove its parent from the node's "clocks" property -- this led to a wrong PWM clock's parent clock.

Fixes 2a29f9d6fea8 ("ARM: dts: r8a7794: add MSTP5 clocks")
Signed-off-by Sergei Shtylyov <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>

Thanks, I have queued this up.