ARM: Meson6: enable SMP
cover ARM: Meson6: enable SMP
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Carlo Caione (3):
ARM: Meson6: docs: document bindings
ARM: Meson6: Add SMP support for Amlogic Meson6
ARM: Meson6: enable SMP in DTS/DTSI
.../bindings/arm/meson/amlogic,meson6-cpuconfig | 16 +++++ .../bindings/arm/meson/amlogic,meson6-smp | 26 +++++++ arch/arm/boot/dts/meson.dtsi | 5 ++ arch/arm/boot/dts/meson6.dtsi | 6 ++ arch/arm/mach-meson/Kconfig | 1 + arch/arm/mach-meson/Makefile | 1 + arch/arm/mach-meson/headsmp.S | 7 ++ arch/arm/mach-meson/platsmp.c | 80 ++++++++++++++++++++++ 8 files changed, 142 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/meson/amlogic,meson6-cpuconfig create mode 100644 Documentation/devicetree/bindings/arm/meson/amlogic,meson6-smp create mode 100644 arch/arm/mach-meson/headsmp.S create mode 100644 arch/arm/mach-meson/platsmp.c
Signature · 1 line
1.9.1
PATCH 1/3 ARM: Meson6: docs: document bindings
Documentation for the devicetree bindings introduced with the SMP support
--- .../bindings/arm/meson/amlogic,meson6-cpuconfig | 16 +++++++++++++ .../bindings/arm/meson/amlogic,meson6-smp | 26 ++++++++++++++++++++++ 2 files changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/meson/amlogic,meson6-cpuconfig create mode 100644 Documentation/devicetree/bindings/arm/meson/amlogic,meson6-smp
Documentation/devicetree/bindings/arm/meson/amlogic,meson6-cpuconfig new file +16 -0
@@ -0,0 +1,16 @@ +Secondary CPU management unit: +------------------------------- + +This document describes the "amlogic,meson6-cpuconfig" node for enabling the +secondary CPU. + +Required node properties: +- compatible value : = "amlogic,meson6-cpuconfig"; +- reg : physical base address and the size of the registers window + +Example: + + cpuconfig at d901ff80 { + compatible = "amlogic,meson6-cpuconfig"; + reg = <0xd901ff80 0x8>; + };
Documentation/devicetree/bindings/arm/meson/amlogic,meson6-smp new file +26 -0
@@ -0,0 +1,26 @@ +Secondary CPU enable-method "amlogic,meson6-smp" binding: +---------------------------------------------------------- + +This document describes the "amlogic,meson6-smp" method for enabling secondary +CPUs. To apply to all CPUs, a single "amlogic,meson6-smp" enable method should +be defined in the "cpus" node. + +Example: + + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "amlogic,meson6-smp"; + + cpu at 200 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x200>; + }; + + cpu at 201 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x201>; + }; + };
Signature · 1 line
1.9.1
PATCH 2/3 ARM: Meson6: Add SMP support for Amlogic Meson6
In reply to Carlo CaioneAmlogic Meson6 is a dual core Cortex-A9. This patch adds the logic to boot up the second CPU.
--- arch/arm/mach-meson/Kconfig | 1 + arch/arm/mach-meson/Makefile | 1 + arch/arm/mach-meson/headsmp.S | 7 ++++ arch/arm/mach-meson/platsmp.c | 80 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 89 insertions(+) create mode 100644 arch/arm/mach-meson/headsmp.S create mode 100644 arch/arm/mach-meson/platsmp.c
arch/arm/mach-meson/Kconfig +1 -0
@@ -2,6 +2,7 @@ menuconfig ARCH_MESON bool "Amlogic Meson SoCs" if ARCH_MULTI_V7 select GENERIC_IRQ_CHIP select ARM_GIC + select HAVE_ARM_SCU if SMP if ARCH_MESON
arch/arm/mach-meson/Makefile +1 -0
@@ -1 +1,2 @@ obj-$(CONFIG_ARCH_MESON) += meson.o +obj-$(CONFIG_SMP) += platsmp.o headsmp.o
arch/arm/mach-meson/headsmp.S new file +7 -0
@@ -0,0 +1,7 @@ +#include <linux/linkage.h> +#include <linux/init.h> + +ENTRY(meson_secondary_startup) + bl v7_invalidate_l1 + b secondary_startup +ENDPROC(meson_secondary_startup)
arch/arm/mach-meson/platsmp.c new file +80 -0
80 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH 3/3 ARM: Meson6: enable SMP in DTS/DTSI
In reply to Carlo Caione--- arch/arm/boot/dts/meson.dtsi | 5 +++++ arch/arm/boot/dts/meson6.dtsi | 6 ++++++ 2 files changed, 11 insertions(+)
arch/arm/boot/dts/meson.dtsi +5 -0
@@ -64,6 +64,11 @@ interrupts = <0 10 1>; }; + scu at c4300000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xc4300000 0x1000>; + }; + soc { compatible = "simple-bus"; #address-cells = <1>;
arch/arm/boot/dts/meson6.dtsi +6 -0
@@ -56,6 +56,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "amlogic,meson6-smp"; cpu at 200 { device_type = "cpu";
@@ -70,6 +71,11 @@ }; }; + cpuconfig at d901ff80 { + compatible = "amlogic,meson6-cpuconfig"; + reg = <0xd901ff80 0x8>; + }; + clk81: clk at 0 { #clock-cells = <0>; compatible = "fixed-clock";
Signature · 1 line
1.9.1
cover ARM: Meson6: enable SMP
In reply to Carlo CaioneQuoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.
Signature · 1 line
Carlo Caione
cover ARM: Meson6: enable SMP
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.
Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
Arnd
cover ARM: Meson6: enable SMP
Quoted 5 lines · Arnd Bergmann
Quoted 4 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Quoted 8 lines
Quoted 2 lines
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Signature · 1 line
Carlo Caione
cover ARM: Meson6: enable SMP
Quoted 12 lines · On Tuesday 30 September 2014 22:45:38 Carlo Caione wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
Quoted 8 lines
Quoted 2 lines
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Ok, I see. Let's give Amlogic some more time then. I think it's better to merge other parts of the platform first when we can reasonably assume that we don't have to change the binding any more.
It would be a shame to merge this now and then make it obsolete by implementing PSCI but still having to carry around the original code for compatibility reasons.
Arnd
cover ARM: Meson6: enable SMP
Hi Arnd,
Quoted 22 lines · Arnd Bergmann
Quoted 12 lines · On Tuesday 30 September 2014 22:45:38 Carlo Caione wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
Quoted 8 lines
Quoted 2 lines
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Quoted 7 lines
Ok, I see. Let's give Amlogic some more time then. I think it's better to merge other parts of the platform first when we can reasonably assume that we don't have to change the binding any more.
It would be a shame to merge this now and then make it obsolete by implementing PSCI but still having to carry around the original code for compatibility reasons.
More likely, PSCI is not going to be supported by the bootloaders of the devices already in the wild, so we still have to provide them an option. And even when it will, you'll still have to support both the devices with the old bootloaders, and the one with the new.
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20141002/24e1b59c/attachment.sig>
cover ARM: Meson6: enable SMP
Quoted 27 lines · On Thursday 02 October 2014 16:54:26 Maxime Ripard wrote:
Quoted 26 lines · Arnd Bergmann
Quoted 12 lines · On Tuesday 30 September 2014 22:45:38 Carlo Caione wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
Quoted 8 lines
Quoted 2 lines
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Ok, I see. Let's give Amlogic some more time then. I think it's better to merge other parts of the platform first when we can reasonably assume that we don't have to change the binding any more.
Quoted 8 lines
Quoted 3 lines
It would be a shame to merge this now and then make it obsolete by implementing PSCI but still having to carry around the original code for compatibility reasons.
More likely, PSCI is not going to be supported by the bootloaders of the devices already in the wild, so we still have to provide them an option. And even when it will, you'll still have to support both the devices with the old bootloaders, and the one with the new.
It depends on how common the old boot loaders are, and whether it's possible to upgrade them. If we can get to the point where you can boot a kernel with a single CPU and have an easy way to update the boot loader, we don't need to support it.
Arnd
cover ARM: Meson6: enable SMP
Quoted 37 lines · Arnd Bergmann
Quoted 27 lines · On Thursday 02 October 2014 16:54:26 Maxime Ripard wrote:
Quoted 26 lines · Arnd Bergmann
Quoted 12 lines · On Tuesday 30 September 2014 22:45:38 Carlo Caione wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
Quoted 8 lines
Quoted 2 lines
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Ok, I see. Let's give Amlogic some more time then. I think it's better to merge other parts of the platform first when we can reasonably assume that we don't have to change the binding any more.
Quoted 8 lines
Quoted 3 lines
It would be a shame to merge this now and then make it obsolete by implementing PSCI but still having to carry around the original code for compatibility reasons.
More likely, PSCI is not going to be supported by the bootloaders of the devices already in the wild, so we still have to provide them an option. And even when it will, you'll still have to support both the devices with the old bootloaders, and the one with the new.
Quoted 4 lines
It depends on how common the old boot loaders are, and whether it's possible to upgrade them. If we can get to the point where you can boot a kernel with a single CPU and have an easy way to update the boot loader, we don't need to support it.
I thought I heard Olof at some point ranting about this kind of requirements, but ok :)
Still, holding off until something that hypothetical happens looks a bit odd, doesn't it?
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20141002/eaad49c4/attachment.sig>
cover ARM: Meson6: enable SMP
Quoted 43 lines · On Thursday 02 October 2014 17:38:04 Maxime Ripard wrote:
Quoted 37 lines · Arnd Bergmann
Quoted 27 lines · On Thursday 02 October 2014 16:54:26 Maxime Ripard wrote:
Quoted 26 lines · Arnd Bergmann
Quoted 12 lines · On Tuesday 30 September 2014 22:45:38 Carlo Caione wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
Quoted 8 lines
Quoted 2 lines
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Ok, I see. Let's give Amlogic some more time then. I think it's better to merge other parts of the platform first when we can reasonably assume that we don't have to change the binding any more.
Quoted 8 lines
Quoted 3 lines
It would be a shame to merge this now and then make it obsolete by implementing PSCI but still having to carry around the original code for compatibility reasons.
More likely, PSCI is not going to be supported by the bootloaders of the devices already in the wild, so we still have to provide them an option. And even when it will, you'll still have to support both the devices with the old bootloaders, and the one with the new.
Quoted 4 lines
It depends on how common the old boot loaders are, and whether it's possible to upgrade them. If we can get to the point where you can boot a kernel with a single CPU and have an easy way to update the boot loader, we don't need to support it.
Quoted 5 lines
I thought I heard Olof at some point ranting about this kind of requirements, but ok
Still, holding off until something that hypothetical happens looks a bit odd, doesn't it?
I was mainly trying to follow what you are doing in mach-sunxi, but maybe I misunderstood what your plans are for PSCI support there.
mach-meson is still in a very early stage, and it's not like SMP support is the most important feature missing from it. If there are good reasons to include the current patches in 3.19, we can do that.
Arnd
cover ARM: Meson6: enable SMP
Quoted 50 lines · Arnd Bergmann
Quoted 43 lines · On Thursday 02 October 2014 17:38:04 Maxime Ripard wrote:
Quoted 37 lines · Arnd Bergmann
Quoted 27 lines · On Thursday 02 October 2014 16:54:26 Maxime Ripard wrote:
Quoted 26 lines · Arnd Bergmann
Quoted 12 lines · On Tuesday 30 September 2014 22:45:38 Carlo Caione wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
Quoted 8 lines
Quoted 2 lines
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Ok, I see. Let's give Amlogic some more time then. I think it's better to merge other parts of the platform first when we can reasonably assume that we don't have to change the binding any more.
Quoted 8 lines
Quoted 3 lines
It would be a shame to merge this now and then make it obsolete by implementing PSCI but still having to carry around the original code for compatibility reasons.
More likely, PSCI is not going to be supported by the bootloaders of the devices already in the wild, so we still have to provide them an option. And even when it will, you'll still have to support both the devices with the old bootloaders, and the one with the new.
Quoted 4 lines
It depends on how common the old boot loaders are, and whether it's possible to upgrade them. If we can get to the point where you can boot a kernel with a single CPU and have an easy way to update the boot loader, we don't need to support it.
Quoted 5 lines
I thought I heard Olof at some point ranting about this kind of requirements, but ok
Still, holding off until something that hypothetical happens looks a bit odd, doesn't it?
Quoted 6 lines
I was mainly trying to follow what you are doing in mach-sunxi, but maybe I misunderstood what your plans are for PSCI support there.
mach-meson is still in a very early stage, and it's not like SMP support is the most important feature missing from it. If there are good reasons to include the current patches in 3.19, we can do that.
I agree with Maxime. The problem is that I have no idea whether in the future we will have access to all the pieces of information to replace the bootloader to upgrade it. Realistically it's not the most important feature but I don't think things are going to change anytime soon. Moreover I highly doubt that people are willing to upgrade the bootloader on their devices just to boot the mainline kernel with full SMP support and the better we can do is to give people the chance to use a mainline kernel on their device at full speed without risking to throw the device away.
Signature · 1 line
Carlo Caione
cover ARM: Meson6: enable SMP
In reply to Arnd BergmannQuoted 44 lines · Arnd Bergmann
Quoted 43 lines · On Thursday 02 October 2014 17:38:04 Maxime Ripard wrote:
Quoted 41 lines · Arnd Bergmann
Quoted 27 lines · On Thursday 02 October 2014 16:54:26 Maxime Ripard wrote:
Quoted 26 lines · Arnd Bergmann
Quoted 12 lines · On Tuesday 30 September 2014 22:45:38 Carlo Caione wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
Quoted 8 lines
Quoted 2 lines
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Ok, I see. Let's give Amlogic some more time then. I think it's better to merge other parts of the platform first when we can reasonably assume that we don't have to change the binding any more.
Quoted 8 lines
Quoted 3 lines
It would be a shame to merge this now and then make it obsolete by implementing PSCI but still having to carry around the original code for compatibility reasons.
More likely, PSCI is not going to be supported by the bootloaders of the devices already in the wild, so we still have to provide them an option. And even when it will, you'll still have to support both the devices with the old bootloaders, and the one with the new.
It depends on how common the old boot loaders are, and whether it's possible to upgrade them. If we can get to the point where you can boot a kernel with a single CPU and have an easy way to update the boot loader, we don't need to support it.
Quoted 8 lines
Quoted 5 lines
I thought I heard Olof at some point ranting about this kind of requirements, but ok
Still, holding off until something that hypothetical happens looks a bit odd, doesn't it?
I was mainly trying to follow what you are doing in mach-sunxi, but maybe I misunderstood what your plans are for PSCI support there.
Well, we did it only for the A20, because:
- We had a very good bootloader support already
- And we needed it to be able to use it for virtualization
AFAIK, the amlogic guys don't have such a bootloader yet, and can't use the virtualization, since it's a cortex-a9.
Note that for all the other SoCs, where we don't have such a bootloader support, we do have smp_ops, or will have, because we can just use Allwinner's bootloader.
Quoted 3 lines
mach-meson is still in a very early stage, and it's not like SMP support is the most important feature missing from it. If there are good reasons to include the current patches in 3.19, we can do that.
That's more of a mainlining scheduling discussion, and I can't really argue with that. I wouldn't have done it in that order, but I'm not really sure we can do that on that argument alone.
The only question that should matter I guess is whether this feature improves the overall support of the SoC, and whether the code is clean enough. If both answers are yes, then I think it should come in.
Remember that Carlo is a hobbyist, and doesn't really have an agenda :)
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20141003/c7f25ef2/attachment.sig>
cover ARM: Meson6: enable SMP
Quoted 7 lines · Maxime Ripard
Quoted 3 lines
mach-meson is still in a very early stage, and it's not like SMP support is the most important feature missing from it. If there are good reasons to include the current patches in 3.19, we can do that.
That's more of a mainlining scheduling discussion, and I can't really argue with that. I wouldn't have done it in that order, but I'm not really sure we can do that on that argument alone.
The SMP support was implemented because it was fairly small and fun enough to write during my breaks from working on the clock drivers. I work on mainlining during the nights after my daily job, so yeah, I don't really have a mainlining schedule (yet) :)
Quoted 3 lines
The only question that should matter I guess is whether this feature improves the overall support of the SoC, and whether the code is clean enough. If both answers are yes, then I think it should come in.
Agree
Quoted 2 lines
Remember that Carlo is a hobbyist, and doesn't really have an agenda :)
But wait, if someone is willing to offer me a job to work full-time on the Linux kernel this could easily change ;)
Cheers,
Signature · 1 line
Carlo Caione
cover ARM: Meson6: enable SMP
In reply to Maxime RipardQuoted 58 lines · On Friday 03 October 2014 09:09:13 Maxime Ripard wrote:
Quoted 44 lines · Arnd Bergmann
Quoted 43 lines · On Thursday 02 October 2014 17:38:04 Maxime Ripard wrote:
Quoted 41 lines · Arnd Bergmann
Quoted 27 lines · On Thursday 02 October 2014 16:54:26 Maxime Ripard wrote:
Quoted 26 lines · Arnd Bergmann
Quoted 12 lines · On Tuesday 30 September 2014 22:45:38 Carlo Caione wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Tuesday 30 September 2014 10:46:46 Carlo Caione wrote:
Quoted 2 lines · Carlo Caione
Amlogic Meson6 is a dual-core Cortex-A9. This patchset adds all the necessary pieces to boot the secondary CPU.
Sorry for the double sending.
Forgot to CC LAKML.Looks good to me in principle, but I wonder about the CPU enable method. Are you able to implement PSCI in u-boot like it was done for allwinner?
Quoted 8 lines
Quoted 2 lines
This is mostly a question of whether the system comes up in secure mode or non-secure mode.
I would be able if I had the u-boot source code or the possibility to flash the board I'm using. Unfortunately at this moment I don't have either. Probably in the near future I'll be able to implement PSCI in u-boot since Amlogic is kindly starting to provide documentation but now this is the best I can do.
Ok, I see. Let's give Amlogic some more time then. I think it's better to merge other parts of the platform first when we can reasonably assume that we don't have to change the binding any more.
Quoted 8 lines
Quoted 3 lines
It would be a shame to merge this now and then make it obsolete by implementing PSCI but still having to carry around the original code for compatibility reasons.
More likely, PSCI is not going to be supported by the bootloaders of the devices already in the wild, so we still have to provide them an option. And even when it will, you'll still have to support both the devices with the old bootloaders, and the one with the new.
It depends on how common the old boot loaders are, and whether it's possible to upgrade them. If we can get to the point where you can boot a kernel with a single CPU and have an easy way to update the boot loader, we don't need to support it.
Quoted 8 lines
Quoted 5 lines
I thought I heard Olof at some point ranting about this kind of requirements, but ok
Still, holding off until something that hypothetical happens looks a bit odd, doesn't it?
I was mainly trying to follow what you are doing in mach-sunxi, but maybe I misunderstood what your plans are for PSCI support there.
Well, we did it only for the A20, because:
- We had a very good bootloader support already
- And we needed it to be able to use it for virtualization
Quoted 6 lines
AFAIK, the amlogic guys don't have such a bootloader yet, and can't use the virtualization, since it's a cortex-a9.
Note that for all the other SoCs, where we don't have such a bootloader support, we do have
smp_ops, or will have, because we can just use Allwinner's bootloader.
Ok, I see.
Quoted 11 lines
Quoted 3 lines
mach-meson is still in a very early stage, and it's not like SMP support is the most important feature missing from it. If there are good reasons to include the current patches in 3.19, we can do that.
That's more of a mainlining scheduling discussion, and I can't really argue with that. I wouldn't have done it in that order, but I'm not really sure we can do that on that argument alone.
The only question that should matter I guess is whether this feature improves the overall support of the SoC, and whether the code is clean enough. If both answers are yes, then I think it should come in.
Makes sense. We should plan to merge it for 3.19 then.
Arnd