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gpios: Add daisy-chaining and dt support to 74x164

PATCH Superseded Maxime Ripard 4 participants 19 messages Sep 7, 2012 – Sep 12, 2012

Subsystems (3)

v2 of 3 Superseded Latest is v3 →

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#0 lore raw

v2 cover gpios: Add daisy-chaining and dt support to 74x164

Hi all,

This is the second attempt at adding the support for chained 8 bit shift registers that are present in the cfa-10049.

This patchset also adds dt support to the 74x164 gpio driver.

Thanks,
Maxime

Changes since v1:
* Added back the possibility to set the gpio base from the platform data
* Removed the output-latch-gpios dt property to use the regular spi chip select mechanism that works in the same way.
* Moved from multiple spi_write to a single spi_sync call because the chip select must be enabled during the whole transfer in our case, and not disabled after sending every byte.

Maxime Ripard (7):
gpio: 74x164: Use module_spi_driver boiler plate function
gpio: 74x164: Use devm_kzalloc
gpio: 74x164: Use dynamic gpio number assignment if no pdata is
present
gpio: 74x164: Add device tree support
gpio: 74x164: Add support for the daisy-chaining
gpio: 74x164: dts: Add documentation for the dt binding
ARM: dts: cfa10049: Add the 74HC595 gpio expanders

 .../devicetree/bindings/gpio/gpio-74x164.txt       |   22 ++++
 arch/arm/boot/dts/imx28-cfa10049.dts               |   21 ++++
 drivers/gpio/gpio-74x164.c                         |  105 ++++++++++++++------
 3 files changed, 120 insertions(+), 28 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-74x164.txt
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH v2 1/7 gpio: 74x164: Use module_spi_driver boiler plate function

---
 drivers/gpio/gpio-74x164.c |   13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)
drivers/gpio/gpio-74x164.c +1 -12
index a31ad6f..2975036 100644
@@ -159,18 +159,7 @@ static struct spi_driver gen_74x164_driver = {
 	.probe		= gen_74x164_probe,
 	.remove		= __devexit_p(gen_74x164_remove),
 };
-
-static int __init gen_74x164_init(void)
-{
-	return spi_register_driver(&gen_74x164_driver);
-}
-subsys_initcall(gen_74x164_init);
-
-static void __exit gen_74x164_exit(void)
-{
-	spi_unregister_driver(&gen_74x164_driver);
-}
-module_exit(gen_74x164_exit);
+module_spi_driver(gen_74x164_driver);
 
 MODULE_AUTHOR("Gabor Juhos <[email protected]>");
 MODULE_AUTHOR("Miguel Gaio <[email protected]>");
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH v2 2/7 gpio: 74x164: Use devm_kzalloc

In reply to Maxime Ripard
---
 drivers/gpio/gpio-74x164.c |    8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)
drivers/gpio/gpio-74x164.c +3 -5
index 2975036..604b998 100644
@@ -90,7 +90,7 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
 	if (ret < 0)
 		return ret;
 
-	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+	chip = devm_kzalloc(&spi->dev, sizeof(*chip), GFP_KERNEL);
 	if (!chip)
 		return -ENOMEM;
 
@@ -125,7 +125,6 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
 exit_destroy:
 	dev_set_drvdata(&spi->dev, NULL);
 	mutex_destroy(&chip->lock);
-	kfree(chip);
 	return ret;
 }
 
@@ -141,10 +140,9 @@ static int __devexit gen_74x164_remove(struct spi_device *spi)
 	dev_set_drvdata(&spi->dev, NULL);
 
 	ret = gpiochip_remove(&chip->gpio_chip);
-	if (!ret) {
+	if (!ret)
 		mutex_destroy(&chip->lock);
-		kfree(chip);
-	} else
+	else
 		dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n",
 				ret);
 
Signature · 1 line
1.7.9.5
#3 lore raw

PATCH v2 3/7 gpio: 74x164: Use dynamic gpio number assignment if no pdata is present

In reply to Maxime Ripard
---
 drivers/gpio/gpio-74x164.c |   13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)
drivers/gpio/gpio-74x164.c +6 -7
index 604b998..ef8baac 100644
@@ -75,12 +75,6 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
 	struct gen_74x164_chip_platform_data *pdata;
 	int ret;
 
-	pdata = spi->dev.platform_data;
-	if (!pdata || !pdata->base) {
-		dev_dbg(&spi->dev, "incorrect or missing platform data\n");
-		return -EINVAL;
-	}
-
 	/*
 	 * bits_per_word cannot be configured in platform data
 	 */
@@ -94,6 +88,12 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
 	if (!chip)
 		return -ENOMEM;
 
+	pdata = spi->dev.platform_data;
+	if (pdata && pdata->base)
+		chip->gpio_chip.base = pdata->base;
+	else
+		chip->gpio_chip.base = -1;
+
 	mutex_init(&chip->lock);
 
 	dev_set_drvdata(&spi->dev, chip);
@@ -104,7 +104,6 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
 	chip->gpio_chip.direction_output = gen_74x164_direction_output;
 	chip->gpio_chip.get = gen_74x164_get_value;
 	chip->gpio_chip.set = gen_74x164_set_value;
-	chip->gpio_chip.base = pdata->base;
 	chip->gpio_chip.ngpio = 8;
 	chip->gpio_chip.can_sleep = 1;
 	chip->gpio_chip.dev = &spi->dev;
Signature · 1 line
1.7.9.5
#4 lore raw

PATCH 3/7 gpio: 74x164: Use dynamic gpio number assignment if no pdata is present

Quoted 1 line · On Friday 07 September 2012 14:18:12 Maxime Ripard wrote:

Thank you Maxime!

drivers/gpio/gpio-74x164.c static int __devinit gen_74x164_probe(struct spi_device

Quoted 9 lines
---
 drivers/gpio/gpio-74x164.c |   13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)
drivers/gpio/gpio-74x164.c +0 -0
index 604b998..ef8baac 100644
@@ -75,12 +75,6 @@ static int __devinit gen_74x164_probe(struct spi_device 

*spi)

drivers/gpio/gpio-74x164.c static int __devinit gen_74x164_probe(struct spi_device

Quoted 13 lines
drivers/gpio/gpio-74x164.c +0 -6
 	struct gen_74x164_chip_platform_data *pdata;
 	int ret;
 
-	pdata = spi->dev.platform_data;
-	if (!pdata || !pdata->base) {
-		dev_dbg(&spi->dev, "incorrect or missing platform data\n");
-		return -EINVAL;
-	}
-
 	/*
 	 * bits_per_word cannot be configured in platform data
 	 */
@@ -94,6 +88,12 @@ static int __devinit gen_74x164_probe(struct spi_device 

*spi)

drivers/gpio/gpio-74x164.c static int __devinit gen_74x164_probe(struct spi_device

Quoted 13 lines
drivers/gpio/gpio-74x164.c +6 -0
 	if (!chip)
 		return -ENOMEM;
 
+	pdata = spi->dev.platform_data;
+	if (pdata && pdata->base)
+		chip->gpio_chip.base = pdata->base;
+	else
+		chip->gpio_chip.base = -1;
+
 	mutex_init(&chip->lock);
 
 	dev_set_drvdata(&spi->dev, chip);
@@ -104,7 +104,6 @@ static int __devinit gen_74x164_probe(struct spi_device 

*spi)

Quoted 15 lines
drivers/gpio/gpio-74x164.c +0 -1
 	chip->gpio_chip.direction_output = gen_74x164_direction_output;
 	chip->gpio_chip.get = gen_74x164_get_value;
 	chip->gpio_chip.set = gen_74x164_set_value;
-	chip->gpio_chip.base = pdata->base;
 	chip->gpio_chip.ngpio = 8;
 	chip->gpio_chip.can_sleep = 1;
 	chip->gpio_chip.dev = &spi->dev;
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#6 lore raw

PATCH v2 4/7 gpio: 74x164: Add device tree support

In reply to Maxime Ripard
---
 drivers/gpio/gpio-74x164.c |    7 +++++++
 1 file changed, 7 insertions(+)
drivers/gpio/gpio-74x164.c +7 -0
index ef8baac..2e31bd3 100644
@@ -148,10 +148,17 @@ static int __devexit gen_74x164_remove(struct spi_device *spi)
 	return ret;
 }
 
+static const struct of_device_id gen_74x164_dt_ids[] = {
+	{ .compatible = "fairchild,74hc595" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
+
 static struct spi_driver gen_74x164_driver = {
 	.driver = {
 		.name		= "74x164",
 		.owner		= THIS_MODULE,
+		.of_match_table	= of_match_ptr(gen_74x164_dt_ids),
 	},
 	.probe		= gen_74x164_probe,
 	.remove		= __devexit_p(gen_74x164_remove),
Signature · 1 line
1.7.9.5
#8 lore raw

PATCH v2 5/7 gpio: 74x164: Add support for the daisy-chaining

In reply to Maxime Ripard

The shift registers have an output pin that, when enabled, propagates the values of its internal register to the pins. If another value comes to the register while the output pin is disabled, this new value will makae the older shift into the next register in the chain.

This patch adds support for daisy-chaining the registers, using the regular SPI chip select mechanism to manage the output pin, and the registers-number dt property to set the number of chained registers.

---
 drivers/gpio/gpio-74x164.c |   70 +++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 63 insertions(+), 7 deletions(-)
drivers/gpio/gpio-74x164.c +63 -7
index 2e31bd3..1831d0f 100644
@@ -14,14 +14,18 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/74x164.h>
 #include <linux/gpio.h>
+#include <linux/of_gpio.h>
 #include <linux/slab.h>
 #include <linux/module.h>
 
+#define GEN_74X164_NUMBER_GPIOS	8
+
 struct gen_74x164_chip {
 	struct spi_device	*spi;
+	u8			*buffer;
 	struct gpio_chip	gpio_chip;
 	struct mutex		lock;
-	u8			port_config;
+	u32			registers;
 };
 
 static struct gen_74x164_chip *gpio_to_74x164_chip(struct gpio_chip *gc)
@@ -31,17 +35,49 @@ static struct gen_74x164_chip *gpio_to_74x164_chip(struct gpio_chip *gc)
 
 static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
 {
-	return spi_write(chip->spi,
-			 &chip->port_config, sizeof(chip->port_config));
+	struct spi_message message;
+	struct spi_transfer *msg_buf;
+	int i, ret;
+
+	msg_buf = kzalloc(chip->registers * sizeof(struct spi_transfer),
+			GFP_KERNEL);
+	if (!msg_buf)
+		return -ENOMEM;
+
+	spi_message_init(&message);
+
+	/*
+	 * Since the registers are chained, every byte sent will make
+	 * the previous byte shift to the next register in the
+	 * chain. Thus, the first byte send will end up in the last
+	 * register at the end of the transfer. So, to have a logical
+	 * numbering, send the bytes in reverse order so that the last
+	 * byte of the buffer will end up in the last register.
+	 */
+	for (i = chip->registers - 1; i >= 0; i--) {
+		msg_buf[i].tx_buf = chip->buffer +i;
+		msg_buf[i].len = sizeof(u8);
+		spi_message_add_tail(msg_buf + i, &message);
+	}
+
+	ret = spi_sync(chip->spi, &message);
+	if (ret)
+		return ret;
+
+	kfree(msg_buf);
+
+	return 0;
 }
 
 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
 {
 	struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc);
+	u8 bank = offset / 8;
+	u8 pin = offset % 8;
 	int ret;
 
 	mutex_lock(&chip->lock);
-	ret = (chip->port_config >> offset) & 0x1;
+	ret = (chip->buffer[bank] >> pin) & 0x1;
 	mutex_unlock(&chip->lock);
 
 	return ret;
@@ -51,12 +87,14 @@ static void gen_74x164_set_value(struct gpio_chip *gc,
 		unsigned offset, int val)
 {
 	struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc);
+	u8 bank = offset / 8;
+	u8 pin = offset % 8;
 
 	mutex_lock(&chip->lock);
 	if (val)
-		chip->port_config |= (1 << offset);
+		chip->buffer[bank] |= (1 << pin);
 	else
-		chip->port_config &= ~(1 << offset);
+		chip->buffer[bank] &= ~(1 << pin);
 
 	__gen_74x164_write_config(chip);
 	mutex_unlock(&chip->lock);
@@ -75,6 +113,11 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
 	struct gen_74x164_chip_platform_data *pdata;
 	int ret;
 
+	if (!spi->dev.of_node) {
+		dev_err(&spi->dev, "No device tree data available.\n");
+		return -EINVAL;
+	}
+
 	/*
 	 * bits_per_word cannot be configured in platform data
 	 */
@@ -104,7 +147,20 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
 	chip->gpio_chip.direction_output = gen_74x164_direction_output;
 	chip->gpio_chip.get = gen_74x164_get_value;
 	chip->gpio_chip.set = gen_74x164_set_value;
-	chip->gpio_chip.ngpio = 8;
+
+	if (of_property_read_u32(spi->dev.of_node, "registers-number", &chip->registers)) {
+		dev_err(&spi->dev, "Missing registers-number property in the DT.\n");
+		ret = -EINVAL;
+		goto exit_destroy;
+	}
+
+	chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
+	chip->buffer = devm_kzalloc(&spi->dev, chip->gpio_chip.ngpio, GFP_KERNEL);
+	if (!chip->buffer) {
+		ret = -ENOMEM;
+		goto exit_destroy;
+	}
+
 	chip->gpio_chip.can_sleep = 1;
 	chip->gpio_chip.dev = &spi->dev;
 	chip->gpio_chip.owner = THIS_MODULE;
Signature · 1 line
1.7.9.5
#9 lore raw

PATCH 5/7 gpio: 74x164: Add support for the daisy-chaining

Hello Maxime,

Quoted 11 lines · On Friday 07 September 2012 14:18:14 Maxime Ripard wrote:

The shift registers have an output pin that, when enabled, propagates the values of its internal register to the pins. If another value comes to the register while the output pin is disabled, this new value will makae the older shift into the next register in the chain.

This patch adds support for daisy-chaining the registers, using the regular SPI chip select mechanism to manage the output pin, and the registers-number dt property to set the number of chained registers.

---

[snip]

Quoted 22 lines

static int __gen_74x164_write_config(struct gen_74x164_chip *chip) {

drivers/gpio/gpio-74x164.c +18 -2
-	return spi_write(chip->spi,
-			 &chip->port_config, sizeof(chip->port_config));
+	struct spi_message message;
+	struct spi_transfer *msg_buf;
+	int i, ret;
+
+	msg_buf = kzalloc(chip->registers * sizeof(struct spi_transfer),
+			GFP_KERNEL);
+	if (!msg_buf)
+		return -ENOMEM;
+
+	spi_message_init(&message);
+
+	/*
+	 * Since the registers are chained, every byte sent will make
+	 * the previous byte shift to the next register in the
+	 * chain. Thus, the first byte send will end up in the last
+	 * register at the end of the transfer. So, to have a logical
+	 * numbering, send the bytes in reverse order so that the last
+	 * byte of the buffer will end up in the last register.

drivers/gpio/gpio-74x164.c static struct gen_74x164_chip *gpio_to_74x164_chip(struct gpio_chip *gc) · line 65

Quoted 10 lines
drivers/gpio/gpio-74x164.c +10 -0
+	 */
+	for (i = chip->registers - 1; i >= 0; i--) {
+		msg_buf[i].tx_buf = chip->buffer +i;
+		msg_buf[i].len = sizeof(u8);
+		spi_message_add_tail(msg_buf + i, &message);
+	}
+
+	ret = spi_sync(chip->spi, &message);
+	if (ret)
+		return ret;

You are leaking msg_buf here in case of error.

drivers/gpio/gpio-74x164.c static int __devinit gen_74x164_probe(struct spi_device

Quoted 37 lines
drivers/gpio/gpio-74x164.c +11 -3
+
+	kfree(msg_buf);
+
+	return 0;
 }
 
 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
 {
 	struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc);
+	u8 bank = offset / 8;
+	u8 pin = offset % 8;
 	int ret;
 
 	mutex_lock(&chip->lock);
-	ret = (chip->port_config >> offset) & 0x1;
+	ret = (chip->buffer[bank] >> pin) & 0x1;
 	mutex_unlock(&chip->lock);
 
 	return ret;
@@ -51,12 +87,14 @@ static void gen_74x164_set_value(struct gpio_chip *gc,
 		unsigned offset, int val)
 {
 	struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc);
+	u8 bank = offset / 8;
+	u8 pin = offset % 8;
 
 	mutex_lock(&chip->lock);
 	if (val)
-		chip->port_config |= (1 << offset);
+		chip->buffer[bank] |= (1 << pin);
 	else
-		chip->port_config &= ~(1 << offset);
+		chip->buffer[bank] &= ~(1 << pin);
 
 	__gen_74x164_write_config(chip);
 	mutex_unlock(&chip->lock);
@@ -75,6 +113,11 @@ static int __devinit gen_74x164_probe(struct spi_device 

*spi)

drivers/gpio/gpio-74x164.c static int __devinit gen_74x164_probe(struct spi_device *spi) · line 119

Quoted 7 lines
drivers/gpio/gpio-74x164.c +4 -0
 	struct gen_74x164_chip_platform_data *pdata;
 	int ret;
 
+	if (!spi->dev.of_node) {
+		dev_err(&spi->dev, "No device tree data available.\n");
+		return -EINVAL;
+	}

Should not this be folded in your previous patch?

drivers/gpio/gpio-74x164.c static int __devinit gen_74x164_probe(struct spi_device

Quoted 5 lines
drivers/gpio/gpio-74x164.c +1 -0
+
 	/*
 	 * bits_per_word cannot be configured in platform data
 	 */
@@ -104,7 +147,20 @@ static int __devinit gen_74x164_probe(struct spi_device 

*spi)

drivers/gpio/gpio-74x164.c static int __devinit gen_74x164_probe(struct spi_device *spi)

Quoted 8 lines
drivers/gpio/gpio-74x164.c +3 -1
 	chip->gpio_chip.direction_output = gen_74x164_direction_output;
 	chip->gpio_chip.get = gen_74x164_get_value;
 	chip->gpio_chip.set = gen_74x164_set_value;
-	chip->gpio_chip.ngpio = 8;
+
+	if (of_property_read_u32(spi->dev.of_node, "registers-number", &chip-
 registers)) {
+		dev_err(&spi->dev, "Missing registers-number property in the DT.

\n");

Quoted 22 lines
drivers/gpio/gpio-74x164.c +11 -0
+		ret = -EINVAL;
+		goto exit_destroy;
+	}
+
+	chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
+	chip->buffer = devm_kzalloc(&spi->dev, chip->gpio_chip.ngpio, GFP_KERNEL);
+	if (!chip->buffer) {
+		ret = -ENOMEM;
+		goto exit_destroy;
+	}
+
 	chip->gpio_chip.can_sleep = 1;
 	chip->gpio_chip.dev = &spi->dev;

chip->gpio_chip.owner = THIS_MODULE;

Signature · 7 lines
1.7.9.5


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#10 lore raw

PATCH 5/7 gpio: 74x164: Add support for the daisy-chaining

Quoted 6 lines · Florian Fainelli

drivers/gpio/gpio-74x164.c static int __devinit gen_74x164_probe(struct spi_device *spi) · line 119

Quoted 4 lines
drivers/gpio/gpio-74x164.c +4 -0
+     if (!spi->dev.of_node) {
+             dev_err(&spi->dev, "No device tree data available.\n");
+             return -EINVAL;
+     }

Should not this be folded in your previous patch?

True, but I've applied it, keep it here or split off as a separate fix.

Yours,
Linus Walleij

#11 lore raw

PATCH 5/7 gpio: 74x164: Add support for the daisy-chaining

In reply to Maxime Ripard
Quoted 10 lines · Maxime Ripard

The shift registers have an output pin that, when enabled, propagates the values of its internal register to the pins. If another value comes to the register while the output pin is disabled, this new value will makae the older shift into the next register in the chain.

This patch adds support for daisy-chaining the registers, using the regular SPI chip select mechanism to manage the output pin, and the registers-number dt property to set the number of chained registers.

I'm stalling 5 thru 7 waiting for Florians comments to be addressed.

Yours,
Linus Walleij

#12 lore raw

PATCH 5/7 gpio: 74x164: Add support for the daisy-chaining

Quoted 2 lines · Linus Walleij

I'm stalling 5 thru 7 waiting for Florians comments to be addressed.

I expect that patch #7 does not apply on your tree at all, so I will take it via mxs/dt branch to ease the process.

Signature · 2 lines
Regards,
Shawn
#13 lore raw

PATCH 5/7 gpio: 74x164: Add support for the daisy-chaining

Quoted 5 lines · Shawn Guo
Quoted 2 lines · Linus Walleij

I'm stalling 5 thru 7 waiting for Florians comments to be addressed.

I expect that patch #7 does not apply on your tree at all, so I will take it via mxs/dt branch to ease the process.

Just that one patch? Or do you mean you want to take all of them? I really would prefer not have to rebase the GPIO tree...

Yours,
Linus Walleij

#14 lore raw

PATCH 5/7 gpio: 74x164: Add support for the daisy-chaining

Quoted 10 lines · Linus Walleij
Quoted 5 lines · Shawn Guo
Quoted 2 lines · Linus Walleij

I'm stalling 5 thru 7 waiting for Florians comments to be addressed.

I expect that patch #7 does not apply on your tree at all, so I will take it via mxs/dt branch to ease the process.

Just that one patch? Or do you mean you want to take all of them? I really would prefer not have to rebase the GPIO tree...

Just that one.

Regards,
Shawn

#15 lore raw

PATCH v2 6/7 gpio: 74x164: dts: Add documentation for the dt binding

In reply to Maxime Ripard
---
 .../devicetree/bindings/gpio/gpio-74x164.txt       |   22 ++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-74x164.txt
Documentation/devicetree/bindings/gpio/gpio-74x164.txt new file +22 -0
new file mode 100644
index 0000000..cc26080
@@ -0,0 +1,22 @@
+* Generic 8-bits shift register GPIO driver
+
+Required properties:
+- compatible : Should be "fairchild,74hc595"
+- reg : chip select number
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells : Should be two.  The first cell is the pin number and
+  the second cell is used to specify the gpio polarity:
+      0 = active high
+      1 = active low
+- registers-number: Number of daisy-chained shift registers
+
+Example:
+
+gpio5: gpio5 at 0 {
+	compatible = "fairchild,74hc595";
+	reg = <0>;
+	gpio-controller;
+	#gpio-cells = <2>;
+	registers-number = <4>;
+	spi-max-frequency = <100000>;
+};
Signature · 1 line
1.7.9.5
#16 lore raw

PATCH v2 7/7 ARM: dts: cfa10049: Add the 74HC595 gpio expanders

In reply to Maxime Ripard
---
 arch/arm/boot/dts/imx28-cfa10049.dts |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/arm/boot/dts/imx28-cfa10049.dts +21 -0
index 1f7fa50..05c892e 100644
@@ -27,6 +27,8 @@
 					fsl,pinmux-ids = <
 						0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */
 						0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */
+						0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */
+						0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */
 					>;
 					fsl,drive-strength = <1>;
 					fsl,voltage = <1>;
@@ -39,6 +41,25 @@
 				pinctrl-names = "default";
 				pinctrl-0 = <&spi3_pins_cfa10049>;
 				status = "okay";
+
+				gpio5: gpio5 at 0 {
+					compatible = "fairchild,74hc595";
+					gpio-controller;
+					#gpio-cells = <2>;
+					reg = <0>;
+					registers-number = <2>;
+					spi-max-frequency = <100000>;
+				};
+
+				gpio6: gpio6 at 1 {
+					compatible = "fairchild,74hc595";
+					gpio-controller;
+					#gpio-cells = <2>;
+					reg = <1>;
+					registers-number = <4>;
+					spi-max-frequency = <100000>;
+				};
+
 			};
 		};
 
Signature · 1 line
1.7.9.5
#17 lore raw

PATCH 7/7 ARM: dts: cfa10049: Add the 74HC595 gpio expanders

Quoted 1 line · Maxime Ripard

Empty commit message is never a good start.

Quoted 9 lines
---
 arch/arm/boot/dts/imx28-cfa10049.dts |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/arm/boot/dts/imx28-cfa10049.dts +0 -0
index 1f7fa50..05c892e 100644

arch/arm/boot/dts/imx28-cfa10049.dts line 31

Quoted 5 lines
arch/arm/boot/dts/imx28-cfa10049.dts +2 -0
@@ -27,6 +27,8 @@
 					fsl,pinmux-ids = <
 						0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */
 						0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */
+						0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */
+						0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */

What are these two pins used for?

Regards,
Shawn

Quoted 32 lines
arch/arm/boot/dts/imx28-cfa10049.dts +19 -0
 					>;
 					fsl,drive-strength = <1>;
 					fsl,voltage = <1>;
@@ -39,6 +41,25 @@
 				pinctrl-names = "default";
 				pinctrl-0 = <&spi3_pins_cfa10049>;
 				status = "okay";
+
+				gpio5: gpio5 at 0 {
+					compatible = "fairchild,74hc595";
+					gpio-controller;
+					#gpio-cells = <2>;
+					reg = <0>;
+					registers-number = <2>;
+					spi-max-frequency = <100000>;
+				};
+
+				gpio6: gpio6 at 1 {
+					compatible = "fairchild,74hc595";
+					gpio-controller;
+					#gpio-cells = <2>;
+					reg = <1>;
+					registers-number = <4>;
+					spi-max-frequency = <100000>;
+				};
+
 			};
 		};
 
Signature · 1 line
1.7.9.5
#18 lore raw

PATCH v2 7/7 ARM: dts: cfa10049: Add the 74HC595 gpio expanders

Hi Shawn,

Le 10/09/2012 04:23, Shawn Guo a ?crit :

Quoted 5 lines · Maxime Ripard
Quoted 4 lines
---
 arch/arm/boot/dts/imx28-cfa10049.dts |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
Quoted 12 lines

arch/arm/boot/dts/imx28-cfa10049.dts line 31

Quoted 10 lines
arch/arm/boot/dts/imx28-cfa10049.dts +2 -0
index 1f7fa50..05c892e 100644
@@ -27,6 +27,8 @@
 					fsl,pinmux-ids = <
 						0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */
 						0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */
+						0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */
+						0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */

What are these two pins used for?

The SSP_D3, D4 and D5 are used as chip select 0, 1 and 2 by the SSP controller when it runs in the two SPI (motorola and Winbond) modes. Thus, here, I'm using them as chip selects.

Maxime

Signature · 4 lines
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com