Why Plan 9 C compilers don't have asm("")
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Quoted 1 line · Cort Dougan
I'm talking about _modern_ processors, not processors that dominate
the
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modern age. This isn't x86.
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Linus mentioned Alpha specifically. I don't see how any of the things he said were x86-centric in any way shape or form.
All of his examples are entirely accurate on sparc64 for example, and to even moreso his Alpha commentary can nearly directly be applied to the MIPS.
Calls suck ass, even on modern cpus. I've seen several hundreds of
Modern? How many stacks?
There's a couple of Forth engines out there that pay the usual for a call and get returns in zero time. Forth code, and Forth engine machine instructions, have about twice as many calls as Linux code, proportionately. Therefor, a return on some designs is one bit in every instruction. Every instruction is "...and maybe do a return in parallel." Forth engines don't have caches. They have on-chip stacks, or the Novix has separate busses to the stacks. Both stacks, return and data.
Forth chips aren't modern in the true-multi-user sense, but if an individual were to design such a beast they could get several of them, hundreds maybe, on FPGAs available now. Such things are coming, because a Forth chip IS something an individual can design.
Rick Hohensee
www.clienux.com
Quoted 4 lines · Rick Hohensee
Forth chips aren't modern in the true-multi-user sense, but if an individual were to design such a beast they could get several of them, hundreds maybe, on FPGAs available now. Such things are coming, because a Forth chip IS something an individual can design.
And I suppose this zero-cost call is also handling things like keeping an N stage deep pipeline full during this call right?
Later,
David S. Miller
[email protected]
Followup to: <[email protected]> By author: "David S. Miller" <[email protected]> In newsgroup: linux.dev.kernel
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Quoted 4 lines · Rick Hohensee
Forth chips aren't modern in the true-multi-user sense, but if an individual were to design such a beast they could get several of them, hundreds maybe, on FPGAs available now. Such things are coming, because a Forth chip IS something an individual can design.
And I suppose this zero-cost call is also handling things like keeping an N stage deep pipeline full during this call right?
Believe it or not, that's actually a fairly simple part of the whole machinery. All you need for that is to maintain a call/return stack in the front end of the pipe. That way, a return that is indeed a return can be speculated properly; obviously, if the speculation doesn't work out when you get the return address in the execution stage you suffer a branch mispredict penalty.
-hpa
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<[email protected]> at work, <[email protected]> in private! "Unix gives you enough rope to shoot yourself in the foot." http://www.zytor.com/~hpa/puzzle.txt
Quoted 3 lines · H. Peter Anvin
Believe it or not, that's actually a fairly simple part of the whole machinery. All you need for that is to maintain a call/return stack in the front end of the pipe.
I understand how RAS stacks work, I even mentioned them in another posting of this thread :-) It's the CALL _itself_ that I'm talking about.
Later,
David S. Miller
[email protected]