Skip to contentSkip to conversation

flush_cache_range

DISCUSSION Tom Appermont 2 participants 2 messages Sep 25, 2001 MIPS

lore
Share & tools
lore
#0 lore raw

Hi,

Can someone explain me why start and end parameters are ignored in r4k_flush_cache_range_d32i32() and cache range flushing operations for other platforms?

Tom

#1 lore raw
Quoted 3 lines · Tom Appermont

Can someone explain me why start and end parameters are ignored in r4k_flush_cache_range_d32i32() and cache range flushing operations for other platforms?

Afair the reason was that most invokations cover a range that is larger than the entire cache anyway so our implementation in practice doesn't cause any harm.

Ralf