PCI ops cleanups for 2.5.32-bk

Hi,

Here are the pci_ops cleanups that were discussed on lkml last week. It removes a lot of code from the arch specific implementation of pci_*_config* functions, and removes lots of code from the pci_hotplug core (yes, the pci_hotplug code is still broken, I'm working on that next...)

These patches includes fixups for almost all of the different architecture specific code. I have a number of patches that I will send to some of the arch maintainers directly, that are not included in this bk tree.

I would like to thank Matt Dobson and Hanna Linder for doing lots of this work.

This series also includes a driverfs pci pool patch from David Brownell (as long as we are making pci changes...)

Pull from: http://linuxusb.bkbits.net/pci-2.5

thanks,

greg k-h

 arch/alpha/kernel/core_apecs.c            |  102 ++++-------
 arch/alpha/kernel/core_cia.c              |  101 ++++-------
 arch/alpha/kernel/core_irongate.c         |   81 +--------
 arch/alpha/kernel/core_lca.c              |  100 ++++-------
 arch/alpha/kernel/core_polaris.c          |   79 +--------
 arch/alpha/kernel/core_t2.c               |  101 ++++-------
 arch/i386/pci/common.c                    |    3 
 arch/i386/pci/direct.c                    |  193 +++++-----------------
 arch/i386/pci/numa.c                      |   34 +++
 arch/i386/pci/pcbios.c                    |   85 +--------
 arch/ia64/kernel/pci.c                    |   80 +--------
 arch/ia64/sn/io/pci.c                     |  157 ++----------------
 arch/mips/ddb5074/pci.c                   |  219 +++++++++++--------------
 arch/mips/ddb5476/pci.c                   |  215 ++++++++++---------------
 arch/mips/ddb5xxx/ddb5477/pci_ops.c       |  253 ++++++++++++-----------------
 arch/mips/gt64120/common/pci.c            |  258 ++++++++++--------------------
 arch/mips/ite-boards/generic/it8172_pci.c |  133 ++++-----------
 arch/mips/mips-boards/generic/pci.c       |  119 +++----------
 arch/mips/sni/pci.c                       |  124 ++++++--------
 arch/sh/kernel/pci-dc.c                   |  105 +++++-------
 arch/sh/kernel/pci-sh7751.c               |  180 +++++++-------------
 arch/sh/kernel/pci_st40.c                 |  112 ++++---------
 arch/x86_64/pci/direct.c                  |  165 +++----------------
 drivers/hotplug/pci_hotplug_util.c        |  245 ----------------------------
 drivers/pci/access.c                      |   54 ++++--
 drivers/pci/pool.c                        |   76 ++++++++
 drivers/pci/probe.c                       |    1 
 include/asm-i386/pci.h                    |    2 
 include/asm-ia64/pci.h                    |    2 
 include/linux/pci.h                       |   50 ++++-
 30 files changed, 1138 insertions(+), 2291 deletions(-)

-----

[email protected], 2002-08-30 14:56:40-07:00, [email protected]
PCI: compile time fix for the pci pool patch.

 drivers/pci/pool.c |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)

------

[email protected], 2002-08-30 14:52:18-07:00, [email protected]
[PATCH] show pci_pool stats in driverfs]

This patch exposes basic allocation statistics for pci pools, very much like /proc/slabinfo but applying to DMA-consistent memory. A file "pools" is created in the driverfs directory for the relevant pci device when the first pool is created, and removed when the last pool is destroyed.

Please merge to 2.5.latest. If it matters, DaveM said it looks fine. It produces sane output for all the 2.5.30 USB host controller drivers.

 drivers/pci/pool.c  |   74 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/pci/probe.c |    1 
 include/linux/pci.h |    1 
 3 files changed, 76 insertions(+)

------

[email protected], 2002-08-30 14:34:21-07:00, [email protected]
[PATCH] Fixed NUMA-Q PCI patch

This patch fixes a bug in NUMA-Q PCI code where the kernel can't find PCI devices on any node other than the first.

 arch/i386/pci/numa.c |   34 ++++++++++++++++++++++++++--------
 1 files changed, 26 insertions(+), 8 deletions(-)

------

[email protected], 2002-08-30 14:30:06-07:00, [email protected]
[PATCH] PCI: sh pci_ops changes

sh pci ops changes

 arch/sh/kernel/pci-dc.c     |  105 ++++++++++---------------
 arch/sh/kernel/pci-sh7751.c |  180 +++++++++++++++-----------------------------
 arch/sh/kernel/pci_st40.c   |  112 ++++++++++-----------------
 3 files changed, 146 insertions(+), 251 deletions(-)

------

[email protected], 2002-08-30 14:29:38-07:00, [email protected]
[PATCH] PCI: mips pci_ops changes

mips pci ops changes

 arch/mips/ddb5074/pci.c                   |  219 +++++++++++--------------
 arch/mips/ddb5476/pci.c                   |  215 ++++++++++---------------
 arch/mips/ddb5xxx/ddb5477/pci_ops.c       |  253 ++++++++++++-----------------
 arch/mips/gt64120/common/pci.c            |  258 ++++++++++--------------------
 arch/mips/ite-boards/generic/it8172_pci.c |  133 ++++-----------
 arch/mips/mips-boards/generic/pci.c       |  119 +++----------
 arch/mips/sni/pci.c                       |  124 ++++++--------
 7 files changed, 511 insertions(+), 810 deletions(-)

------

[email protected], 2002-08-30 14:29:11-07:00, [email protected]
[PATCH] PCI: ia64 pci_ops changes

ia64 pci ops changes

 arch/ia64/kernel/pci.c |   80 +++---------------------
 arch/ia64/sn/io/pci.c  |  157 +++++--------------------------------------------
 include/asm-ia64/pci.h |    2 
 3 files changed, 28 insertions(+), 211 deletions(-)

------

[email protected], 2002-08-30 14:28:47-07:00, [email protected]
[PATCH] PCI: alpha pci_ops changes

pci_ops update for most of the alpha ports.

 arch/alpha/kernel/core_apecs.c    |  102 ++++++++++++++------------------------
 arch/alpha/kernel/core_cia.c      |  101 +++++++++++++++----------------------
 arch/alpha/kernel/core_irongate.c |   81 ++++--------------------------
 arch/alpha/kernel/core_lca.c      |  100 +++++++++++++++----------------------
 arch/alpha/kernel/core_polaris.c  |   79 ++++-------------------------
 arch/alpha/kernel/core_t2.c       |  101 ++++++++++++++-----------------------
 6 files changed, 184 insertions(+), 380 deletions(-)

------

[email protected], 2002-08-30 14:28:21-07:00, [email protected]
[PATCH] PCI: x86-64 pci_ops changes

x86-64 pci changes

 arch/x86_64/pci/direct.c |  165 +++++++++--------------------------------------
 1 files changed, 33 insertions(+), 132 deletions(-)

------

[email protected], 2002-08-30 14:27:56-07:00, [email protected]
[PATCH] PCI Hotplug: removed the pci_*_nodev functions

removed the pci_*_nodev functions, as the pci_bus_* functions should be used instead.

 drivers/hotplug/pci_hotplug_util.c |  245 -------------------------------------
 1 files changed, 245 deletions(-)

------

[email protected], 2002-08-30 14:27:34-07:00, [email protected]
[PATCH] PCI: add pci_bus_* functions to replace the pci_read_* and pci_write_* functions.

add pci_bus_* functions to replace the pci_read_* and pci_write_* functions.

 arch/i386/pci/direct.c |   28 ++++++++++++++--------------
 arch/i386/pci/pcbios.c |   12 ++++++------
 drivers/pci/access.c   |   22 ++++++++++++----------
 include/linux/pci.h    |   41 +++++++++++++++++++++++++++++++++--------
 4 files changed, 65 insertions(+), 38 deletions(-)

------

[email protected], 2002-08-30 14:27:12-07:00, [email protected]
[PATCH] PCI Cleanup

The patch removes the pci_confN_(read|write)_config_(byte|word|dword) mess and pares it down to pci_confN_(read|write). This change is reflected in the pci_ops structure, which only has read and write function pointers rather than the byte, word, and dword versions. These changes happen in the pci_conf(1|2) and pci_bios read and write calls.

This patch also removes the pci_config_(read|write) function pointers. People shouldn't be using these (I don't think) and should be using the pci_ops structure linked through the pci_dev structure. These end up calling the same functions that the pci_config_(read|write) pointers refer to anyway.

 arch/i386/pci/common.c |    3 
 arch/i386/pci/direct.c |  165 +++++++++----------------------------------------
 arch/i386/pci/pcbios.c |   73 ++-------------------
 drivers/pci/access.c   |   32 ++++++---
 include/asm-i386/pci.h |    2 
 include/linux/pci.h    |    8 --
 6 files changed, 68 insertions(+), 215 deletions(-)

------

And here are the different patches in this set of changesets...

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.542 -> 1.543

#	arch/i386/pci/pcbios.c	1.9     -> 1.10   
#	arch/i386/pci/direct.c	1.9     -> 1.10   
#	arch/i386/pci/common.c	1.32    -> 1.33   
#	include/asm-i386/pci.h	1.15    -> 1.16   

# include/linux/pci.h 1.35 -> 1.36
# drivers/pci/access.c 1.3 -> 1.4
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.543
# [PATCH] PCI Cleanup
#
# The patch removes the pci_confN_(read|write)_config_(byte|word|dword) mess and

# pares it down to pci_confN_(read|write).  This change is reflected in the
# pci_ops structure, which only has read and write function pointers rather than
# the byte, word, and dword versions.  These changes happen in the pci_conf(1|2)
# and pci_bios read and write calls.
# 
# This patch also removes the pci_config_(read|write) function pointers.  People
# shouldn't be using these (I don't think) and should be using the pci_ops
# structure linked through the pci_dev structure.  These end up calling the same
# functions that the pci_config_(read|write) pointers refer to anyway.
# --------------------------------------------
#
diff -Nru a/arch/i386/pci/common.c b/arch/i386/pci/common.c
--- a/arch/i386/pci/common.c	Fri Aug 30 15:00:39 2002
+++ b/arch/i386/pci/common.c	Fri Aug 30 15:00:39 2002
@@ -25,9 +25,6 @@
 struct pci_bus *pci_root_bus = NULL;
 struct pci_ops *pci_root_ops = NULL;

-int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value) = NULL; -int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value) = NULL; -
/*
* legacy, numa, and acpi all want to call pcibios_scan_root
* from their initcalls. This flag prevents that.

diff -Nru a/arch/i386/pci/direct.c b/arch/i386/pci/direct.c
@@ -13,7 +13,7 @@
 #define PCI_CONF1_ADDRESS(bus, dev, fn, reg) \
 	(0x80000000 | (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3))
 
-static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
+static int __pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
 {
 	unsigned long flags;
 

@@ -41,7 +41,7 @@
 	return 0;
 }
 
-static int pci_conf1_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
+static int __pci_conf1_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
 {
 	unsigned long flags;
 

@@ -69,75 +69,23 @@
 	return 0;
 }
 
-
 #undef PCI_CONF1_ADDRESS
 
-static int pci_conf1_read_config_byte(struct pci_dev *dev, int where, u8 *value)
+static int pci_conf1_read(struct pci_dev *dev, int where, int size, u32 *value)
 {
-	int result; 
-	u32 data;
-
-	if (!value) 
-		return -EINVAL;
-
-	result = pci_conf1_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 1, &data);
-
-	*value = (u8)data;
-
-	return result;
+	return __pci_conf1_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
+		PCI_FUNC(dev->devfn), where, size, value);
 }
 
-static int pci_conf1_read_config_word(struct pci_dev *dev, int where, u16 *value)
+static int pci_conf1_write(struct pci_dev *dev, int where, int size, u32 value)
 {
-	int result; 
-	u32 data;
-
-	if (!value) 
-		return -EINVAL;
-
-	result = pci_conf1_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 2, &data);
-
-	*value = (u16)data;
-
-	return result;
-}
-
-static int pci_conf1_read_config_dword(struct pci_dev *dev, int where, u32 *value)
-{
-	if (!value) 
-		return -EINVAL;
-
-	return pci_conf1_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 4, value);
-}
-
-static int pci_conf1_write_config_byte(struct pci_dev *dev, int where, u8 value)
-{
-	return pci_conf1_write(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 1, value);
-}
-
-static int pci_conf1_write_config_word(struct pci_dev *dev, int where, u16 value)
-{
-	return pci_conf1_write(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 2, value);
-}
-
-static int pci_conf1_write_config_dword(struct pci_dev *dev, int where, u32 value)
-{
-	return pci_conf1_write(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 4, value);
+	return __pci_conf1_write(0, dev->bus->number, PCI_SLOT(dev->devfn), 
+		PCI_FUNC(dev->devfn), where, size, value);
 }
 
 static struct pci_ops pci_direct_conf1 = {
-	pci_conf1_read_config_byte,
-	pci_conf1_read_config_word,
-	pci_conf1_read_config_dword,
-	pci_conf1_write_config_byte,
-	pci_conf1_write_config_word,
-	pci_conf1_write_config_dword
+	.read =		pci_conf1_read,
+	.write =	pci_conf1_write,
 };
 
 

@@ -147,7 +95,7 @@
 
 #define PCI_CONF2_ADDRESS(dev, reg)	(u16)(0xC000 | (dev << 8) | reg)
 
-static int pci_conf2_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
+static int __pci_conf2_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
 {
 	unsigned long flags;
 

@@ -181,7 +129,7 @@
 	return 0;
 }
 
-static int pci_conf2_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
+static int __pci_conf2_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
 {
 	unsigned long flags;
 

@@ -217,57 +165,21 @@
 
 #undef PCI_CONF2_ADDRESS
 
-static int pci_conf2_read_config_byte(struct pci_dev *dev, int where, u8 *value)
-{
-	int result; 
-	u32 data;
-	result = pci_conf2_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 1, &data);
-	*value = (u8)data;
-	return result;
-}
-
-static int pci_conf2_read_config_word(struct pci_dev *dev, int where, u16 *value)
-{
-	int result; 
-	u32 data;
-	result = pci_conf2_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 2, &data);
-	*value = (u16)data;
-	return result;
-}
-
-static int pci_conf2_read_config_dword(struct pci_dev *dev, int where, u32 *value)
-{
-	return pci_conf2_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 4, value);
-}
-
-static int pci_conf2_write_config_byte(struct pci_dev *dev, int where, u8 value)
+static int pci_conf2_read(struct pci_dev *dev, int where, int size, u32 *value)
 {
-	return pci_conf2_write(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 1, value);
+	return __pci_conf2_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
+		PCI_FUNC(dev->devfn), where, size, value);
 }
 
-static int pci_conf2_write_config_word(struct pci_dev *dev, int where, u16 value)
+static int pci_conf2_write(struct pci_dev *dev, int where, int size, u32 value)
 {
-	return pci_conf2_write(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 2, value);
-}
-
-static int pci_conf2_write_config_dword(struct pci_dev *dev, int where, u32 value)
-{
-	return pci_conf2_write(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, 4, value);
+	return __pci_conf2_write(0, dev->bus->number, PCI_SLOT(dev->devfn), 
+		PCI_FUNC(dev->devfn), where, size, value);
 }
 
 static struct pci_ops pci_direct_conf2 = {
-	pci_conf2_read_config_byte,
-	pci_conf2_read_config_word,
-	pci_conf2_read_config_dword,
-	pci_conf2_write_config_byte,
-	pci_conf2_write_config_word,
-	pci_conf2_write_config_dword
+	.read =		pci_conf2_read,
+	.write =	pci_conf2_write,
 };
 
 

@@ -283,7 +195,7 @@
  */
 static int __devinit pci_sanity_check(struct pci_ops *o)
 {
-	u16 x;
+	u32 x = 0;
 	struct pci_bus bus;		/* Fake bus and device */
 	struct pci_dev dev;
 

@@ -292,16 +204,16 @@
 	bus.number = 0;
 	dev.bus = &bus;
 	for(dev.devfn=0; dev.devfn < 0x100; dev.devfn++)
-		if ((!o->read_word(&dev, PCI_CLASS_DEVICE, &x) &&
+		if ((!o->read(&dev, PCI_CLASS_DEVICE, 2, &x) &&
 		     (x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)) ||
-		    (!o->read_word(&dev, PCI_VENDOR_ID, &x) &&
+		    (!o->read(&dev, PCI_VENDOR_ID, 2, &x) &&
 		     (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)))
 			return 1;
 	DBG("PCI: Sanity check failed\n");
 	return 0;
 }
 
-static struct pci_ops * __devinit pci_check_direct(void)
+static int __init pci_direct_init(void)
 {
 	unsigned int tmp;
 	unsigned long flags;

@@ -321,8 +233,10 @@
 			local_irq_restore(flags);
 			printk(KERN_INFO "PCI: Using configuration type 1\n");
 			if (!request_region(0xCF8, 8, "PCI conf1"))
-				return NULL;
-			return &pci_direct_conf1;
+				pci_root_ops = NULL;
+			else
+				pci_root_ops = &pci_direct_conf1;
+			return 0;
 		}
 		outl (tmp, 0xCF8);
 	}

@@ -339,28 +253,15 @@
 			local_irq_restore(flags);
 			printk(KERN_INFO "PCI: Using configuration type 2\n");
 			if (!request_region(0xCF8, 4, "PCI conf2"))
-				return NULL;
-			return &pci_direct_conf2;
+				pci_root_ops = NULL;
+			else
+				pci_root_ops = &pci_direct_conf2;
+			return 0;
 		}
 	}
 
 	local_irq_restore(flags);
-	return NULL;
-}
-
-static int __init pci_direct_init(void)
-{
-	if ((pci_probe & (PCI_PROBE_CONF1 | PCI_PROBE_CONF2)) 
-		&& (pci_root_ops = pci_check_direct())) {
-		if (pci_root_ops == &pci_direct_conf1) {
-			pci_config_read = pci_conf1_read;
-			pci_config_write = pci_conf1_write;
-		}
-		else {
-			pci_config_read = pci_conf2_read;
-			pci_config_write = pci_conf2_write;
-		}
-	}
+	pci_root_ops = NULL;
 	return 0;
 }
 

diff -Nru a/drivers/pci/access.c b/drivers/pci/access.c
@@ -19,24 +19,38 @@
 #define PCI_word_BAD (pos & 1)
 #define PCI_dword_BAD (pos & 3)
 
-#define PCI_OP(rw,size,type) \
-int pci_##rw##_config_##size (struct pci_dev *dev, int pos, type value) \
+#define PCI_OP_READ(size,type,len) \
+int pci_read_config_##size (struct pci_dev *dev, int pos, type *value) \
 {									\
 	int res;							\
 	unsigned long flags;						\
+	u32 data = 0;							\
 	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
 	spin_lock_irqsave(&pci_lock, flags);				\
-	res = dev->bus->ops->rw##_##size(dev, pos, value);		\
+	res = dev->bus->ops->read(dev, pos, len, &data);		\
+	*value = (type)data;						\
 	spin_unlock_irqrestore(&pci_lock, flags);			\
 	return res;							\
 }
 
-PCI_OP(read, byte, u8 *)
-PCI_OP(read, word, u16 *)
-PCI_OP(read, dword, u32 *)
-PCI_OP(write, byte, u8)
-PCI_OP(write, word, u16)
-PCI_OP(write, dword, u32)
+#define PCI_OP_WRITE(size,type,len) \
+int pci_write_config_##size (struct pci_dev *dev, int pos, type value) \
+{									\
+	int res;							\
+	unsigned long flags;						\
+	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
+	spin_lock_irqsave(&pci_lock, flags);				\
+	res = dev->bus->ops->write(dev, pos, len, value);		\
+	spin_unlock_irqrestore(&pci_lock, flags);			\
+	return res;							\
+}
+
+PCI_OP_READ(byte, u8, 1)
+PCI_OP_READ(word, u16, 2)
+PCI_OP_READ(dword, u32, 4)
+PCI_OP_WRITE(byte, u8, 1)
+PCI_OP_WRITE(word, u16, 2)
+PCI_OP_WRITE(dword, u32, 4)
 
 EXPORT_SYMBOL(pci_read_config_byte);
 EXPORT_SYMBOL(pci_read_config_word);

diff -Nru a/include/asm-i386/pci.h b/include/asm-i386/pci.h
@@ -22,8 +22,6 @@
 
 void pcibios_config_init(void);
 struct pci_bus * pcibios_scan_root(int bus);
-extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value);
-extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value);
 
 void pcibios_set_master(struct pci_dev *dev);
 void pcibios_penalize_isa_irq(int irq);

diff -Nru a/include/linux/pci.h b/include/linux/pci.h
@@ -456,12 +456,8 @@
 /* Low-level architecture-dependent routines */
 
 struct pci_ops {
-	int (*read_byte)(struct pci_dev *, int where, u8 *val);
-	int (*read_word)(struct pci_dev *, int where, u16 *val);
-	int (*read_dword)(struct pci_dev *, int where, u32 *val);
-	int (*write_byte)(struct pci_dev *, int where, u8 val);
-	int (*write_word)(struct pci_dev *, int where, u16 val);
-	int (*write_dword)(struct pci_dev *, int where, u32 val);
+	int (*read)(struct pci_dev *, int where, int size, u32 *val);
+	int (*write)(struct pci_dev *, int where, int size, u32 val);
 };
 
 struct pbus_set_ranges_data

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.543 -> 1.544
# arch/i386/pci/pcbios.c 1.10 -> 1.11
# arch/i386/pci/direct.c 1.10 -> 1.11
# include/linux/pci.h 1.36 -> 1.37
# drivers/pci/access.c 1.4 -> 1.5
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.544
# [PATCH] PCI: add pci_bus_* functions to replace the pci_read_* and pci_write_* functions. #

# add pci_bus_* functions to replace the pci_read_* and pci_write_* functions.
# --------------------------------------------
#
diff -Nru a/arch/i386/pci/direct.c b/arch/i386/pci/direct.c
--- a/arch/i386/pci/direct.c	Fri Aug 30 15:00:36 2002
+++ b/arch/i386/pci/direct.c	Fri Aug 30 15:00:36 2002
@@ -71,16 +71,16 @@

#undef PCI_CONF1_ADDRESS

-static int pci_conf1_read(struct pci_dev *dev, int where, int size, u32 *value) +static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
{
- return __pci_conf1_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, size, value);
+ return __pci_conf1_read(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

-static int pci_conf1_write(struct pci_dev *dev, int where, int size, u32 value) +static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
{
- return __pci_conf1_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, size, value);
+ return __pci_conf1_write(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

static struct pci_ops pci_direct_conf1 = {
@@ -165,16 +165,16 @@

#undef PCI_CONF2_ADDRESS

-static int pci_conf2_read(struct pci_dev *dev, int where, int size, u32 *value) +static int pci_conf2_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
{
- return __pci_conf2_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, size, value);
+ return __pci_conf2_read(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

-static int pci_conf2_write(struct pci_dev *dev, int where, int size, u32 value) +static int pci_conf2_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
{
- return __pci_conf2_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, size, value);
+ return __pci_conf2_write(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

static struct pci_ops pci_direct_conf2 = {
@@ -204,9 +204,9 @@
bus.number = 0;
dev.bus = &bus;
for(dev.devfn=0; dev.devfn < 0x100; dev.devfn++)
- if ((!o->read(&dev, PCI_CLASS_DEVICE, 2, &x) &&
+ if ((!o->read(&bus, dev.devfn, PCI_CLASS_DEVICE, 2, &x) &&
(x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)) ||
- (!o->read(&dev, PCI_VENDOR_ID, 2, &x) &&
+ (!o->read(&bus, dev.devfn, PCI_VENDOR_ID, 2, &x) &&
(x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)))
return 1;
DBG("PCI: Sanity check failed\n");

diff -Nru a/arch/i386/pci/pcbios.c b/arch/i386/pci/pcbios.c
@@ -295,16 +295,16 @@
 	return (int)((result & 0xff00) >> 8);
 }
 
-static int pci_bios_read(struct pci_dev *dev, int where, int size, u32 *value)
+static int pci_bios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
 {
-	return __pci_bios_read(0, dev->bus->number, PCI_SLOT(dev->devfn), 
-		PCI_FUNC(dev->devfn), where, size, value);
+	return __pci_bios_read(0, bus->number, PCI_SLOT(devfn), 
+		PCI_FUNC(devfn), where, size, value);
 }
 
-static int pci_bios_write(struct pci_dev *dev, int where, int size, u32 value)
+static int pci_bios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
 {
-	return __pci_bios_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
-		PCI_FUNC(dev->devfn), where, size, value);
+	return __pci_bios_write(0, bus->number, PCI_SLOT(devfn),
+		PCI_FUNC(devfn), where, size, value);
 }
 
 

diff -Nru a/drivers/pci/access.c b/drivers/pci/access.c
@@ -20,27 +20,29 @@
 #define PCI_dword_BAD (pos & 3)
 
 #define PCI_OP_READ(size,type,len) \
-int pci_read_config_##size (struct pci_dev *dev, int pos, type *value) \
+int pci_bus_read_config_##size \
+	(struct pci_bus *bus, unsigned int devfn, int pos, type *value)	\
 {									\
 	int res;							\
 	unsigned long flags;						\
 	u32 data = 0;							\
 	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
 	spin_lock_irqsave(&pci_lock, flags);				\
-	res = dev->bus->ops->read(dev, pos, len, &data);		\
+	res = bus->ops->read(bus, devfn, pos, len, &data);		\
 	*value = (type)data;						\
 	spin_unlock_irqrestore(&pci_lock, flags);			\
 	return res;							\
 }
 
 #define PCI_OP_WRITE(size,type,len) \
-int pci_write_config_##size (struct pci_dev *dev, int pos, type value) \
+int pci_bus_write_config_##size \
+	(struct pci_bus *bus, unsigned int devfn, int pos, type value)	\
 {									\
 	int res;							\
 	unsigned long flags;						\
 	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
 	spin_lock_irqsave(&pci_lock, flags);				\
-	res = dev->bus->ops->write(dev, pos, len, value);		\
+	res = bus->ops->write(bus, devfn, pos, len, value);		\
 	spin_unlock_irqrestore(&pci_lock, flags);			\
 	return res;							\
 }

@@ -52,10 +54,10 @@
 PCI_OP_WRITE(word, u16, 2)
 PCI_OP_WRITE(dword, u32, 4)
 
-EXPORT_SYMBOL(pci_read_config_byte);
-EXPORT_SYMBOL(pci_read_config_word);
-EXPORT_SYMBOL(pci_read_config_dword);
-EXPORT_SYMBOL(pci_write_config_byte);
-EXPORT_SYMBOL(pci_write_config_word);
-EXPORT_SYMBOL(pci_write_config_dword);
+EXPORT_SYMBOL(pci_bus_read_config_byte);
+EXPORT_SYMBOL(pci_bus_read_config_word);
+EXPORT_SYMBOL(pci_bus_read_config_dword);
+EXPORT_SYMBOL(pci_bus_write_config_byte);
+EXPORT_SYMBOL(pci_bus_write_config_word);
+EXPORT_SYMBOL(pci_bus_write_config_dword);
 EXPORT_SYMBOL(pci_lock);

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.544 -> 1.545
# drivers/hotplug/pci_hotplug_util.c 1.3 -> 1.4
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.545
# [PATCH] PCI Hotplug: removed the pci_*_nodev functions
#

# removed the pci_*_nodev functions, as the pci_bus_* functions should be used instead.
# --------------------------------------------
#
diff -Nru a/drivers/hotplug/pci_hotplug_util.c b/drivers/hotplug/pci_hotplug_util.c
--- a/drivers/hotplug/pci_hotplug_util.c	Fri Aug 30 15:00:33 2002
+++ b/drivers/hotplug/pci_hotplug_util.c	Fri Aug 30 15:00:33 2002
@@ -51,245 +51,6 @@
 static int debug;

-static int build_dev (struct pci_ops *ops, u8 bus, u8 slot, u8 function, struct pci_dev **pci_dev) -{
- struct pci_dev *my_dev;
- struct pci_bus *my_bus;
-
- /* Some validity checks. */
- if ((function > 7) ||

-	    (slot > 31) ||
-	    (pci_dev == NULL) ||
-	    (ops == NULL))

- return -ENODEV;
-
- my_dev = kmalloc (sizeof (struct pci_dev), GFP_KERNEL);
- if (!my_dev)
- return -ENOMEM;
- my_bus = kmalloc (sizeof (struct pci_bus), GFP_KERNEL);
- if (!my_bus) {
- kfree (my_dev);
- return -ENOMEM;
- }
- memset(my_dev, 0, sizeof(struct pci_dev));
- memset(my_bus, 0, sizeof(struct pci_bus));
-
- my_bus->number = bus;
- my_bus->ops = ops;
- my_dev->devfn = PCI_DEVFN(slot, function);
- my_dev->bus = my_bus;
- *pci_dev = my_dev;
- return 0;
-}
-
-/**
- * pci_read_config_byte_nodev - read a byte from a pci device
- * @ops: pointer to a &struct pci_ops that will be used to read from the pci device
- * @bus: the bus of the pci device to read from
- * @slot: the pci slot number of the pci device to read from
- * @function: the function of the pci device to read from
- * @where: the location on the pci address space to read from
- * @value: pointer to where to place the data read
- *
- * Like pci_read_config_byte() but works for pci devices that do not have a
- * pci_dev structure set up yet.
- * Returns 0 on success.
- */
-int pci_read_config_byte_nodev (struct pci_ops *ops, u8 bus, u8 slot, u8 function, int where, u8 *value) -{
- struct pci_dev *dev = NULL;
- int result;
-
- dbg("%p, %d, %d, %d, %d, %p\n", ops, bus, slot, function, where, value);
- dev = pci_find_slot(bus, PCI_DEVFN(slot, function));
- if (dev) {
- dbg("using native pci_dev\n");
- return pci_read_config_byte (dev, where, value);
- }
-
- result = build_dev (ops, bus, slot, function, &dev);
- if (result)
- return result;
- result = pci_read_config_byte(dev, where, value);
- kfree (dev->bus);
- kfree (dev);
- return result;
-}
-
-/**
- * pci_read_config_word_nodev - read a word from a pci device
- * @ops: pointer to a &struct pci_ops that will be used to read from the pci device
- * @bus: the bus of the pci device to read from
- * @slot: the pci slot number of the pci device to read from
- * @function: the function of the pci device to read from
- * @where: the location on the pci address space to read from
- * @value: pointer to where to place the data read
- *
- * Like pci_read_config_word() but works for pci devices that do not have a
- * pci_dev structure set up yet.
- * Returns 0 on success.
- */
-int pci_read_config_word_nodev (struct pci_ops *ops, u8 bus, u8 slot, u8 function, int where, u16 *value) -{
- struct pci_dev *dev = NULL;
- int result;
-
- dbg("%p, %d, %d, %d, %d, %p\n", ops, bus, slot, function, where, value);
- dev = pci_find_slot(bus, PCI_DEVFN(slot, function));
- if (dev) {
- dbg("using native pci_dev\n");
- return pci_read_config_word (dev, where, value);
- }
-
- result = build_dev (ops, bus, slot, function, &dev);
- if (result)
- return result;
- result = pci_read_config_word(dev, where, value);
- kfree (dev->bus);
- kfree (dev);
- return result;
-}
-
-/**
- * pci_read_config_dword_nodev - read a dword from a pci device
- * @ops: pointer to a &struct pci_ops that will be used to read from the pci
- * device
- * @bus: the bus of the pci device to read from
- * @slot: the pci slot number of the pci device to read from
- * @function: the function of the pci device to read from
- * @where: the location on the pci address space to read from
- * @value: pointer to where to place the data read
- *
- * Like pci_read_config_dword() but works for pci devices that do not have a
- * pci_dev structure set up yet.
- * Returns 0 on success.
- */
-int pci_read_config_dword_nodev (struct pci_ops *ops, u8 bus, u8 slot, u8 function, int where, u32 *value) -{
- struct pci_dev *dev = NULL;
- int result;
-
- dbg("%p, %d, %d, %d, %d, %p\n", ops, bus, slot, function, where, value);
- dev = pci_find_slot(bus, PCI_DEVFN(slot, function));
- if (dev) {
- dbg("using native pci_dev\n");
- return pci_read_config_dword (dev, where, value);
- }
-
- result = build_dev (ops, bus, slot, function, &dev);
- if (result)
- return result;
- result = pci_read_config_dword(dev, where, value);
- kfree (dev->bus);
- kfree (dev);
- return result;
-}
-
-/**
- * pci_write_config_byte_nodev - write a byte to a pci device
- * @ops: pointer to a &struct pci_ops that will be used to write to the pci
- * device
- * @bus: the bus of the pci device to write to
- * @slot: the pci slot number of the pci device to write to
- * @function: the function of the pci device to write to
- * @where: the location on the pci address space to write to
- * @value: the value to write to the pci device
- *
- * Like pci_write_config_byte() but works for pci devices that do not have a
- * pci_dev structure set up yet.
- * Returns 0 on success.
- */
-int pci_write_config_byte_nodev (struct pci_ops *ops, u8 bus, u8 slot, u8 function, int where, u8 value) -{
- struct pci_dev *dev = NULL;
- int result;
-
- dbg("%p, %d, %d, %d, %d, %d\n", ops, bus, slot, function, where, value);
- dev = pci_find_slot(bus, PCI_DEVFN(slot, function));
- if (dev) {
- dbg("using native pci_dev\n");
- return pci_write_config_byte (dev, where, value);
- }
-
- result = build_dev (ops, bus, slot, function, &dev);
- if (result)
- return result;
- result = pci_write_config_byte(dev, where, value);
- kfree (dev->bus);
- kfree (dev);
- return result;
-}
-
-/**
- * pci_write_config_word_nodev - write a word to a pci device
- * @ops: pointer to a &struct pci_ops that will be used to write to the pci
- * device
- * @bus: the bus of the pci device to write to
- * @slot: the pci slot number of the pci device to write to
- * @function: the function of the pci device to write to
- * @where: the location on the pci address space to write to
- * @value: the value to write to the pci device
- *
- * Like pci_write_config_word() but works for pci devices that do not have a
- * pci_dev structure set up yet.
- * Returns 0 on success.
- */
-int pci_write_config_word_nodev (struct pci_ops *ops, u8 bus, u8 slot, u8 function, int where, u16 value) -{
- struct pci_dev *dev = NULL;
- int result;
-
- dbg("%p, %d, %d, %d, %d, %d\n", ops, bus, slot, function, where, value);
- dev = pci_find_slot(bus, PCI_DEVFN(slot, function));
- if (dev) {
- dbg("using native pci_dev\n");
- return pci_write_config_word (dev, where, value);
- }
-
- result = build_dev (ops, bus, slot, function, &dev);
- if (result)
- return result;
- result = pci_write_config_word(dev, where, value);
- kfree (dev->bus);
- kfree (dev);
- return result;
-}
-
-/**
- * pci_write_config_dword_nodev - write a dword to a pci device
- * @ops: pointer to a &struct pci_ops that will be used to write to the pci
- * device
- * @bus: the bus of the pci device to write to
- * @slot: the pci slot number of the pci device to write to
- * @function: the function of the pci device to write to
- * @where: the location on the pci address space to write to
- * @value: the value to write to the pci device
- *
- * Like pci_write_config_dword() but works for pci devices that do not have a
- * pci_dev structure set up yet.
- * Returns 0 on success.
- */
-int pci_write_config_dword_nodev (struct pci_ops *ops, u8 bus, u8 slot, u8 function, int where, u32 value) -{
- struct pci_dev *dev = NULL;
- int result;
-
- dbg("%p, %d, %d, %d, %d, %d\n", ops, bus, slot, function, where, value);
- dev = pci_find_slot(bus, PCI_DEVFN(slot, function));
- if (dev) {
- dbg("using native pci_dev\n");
- return pci_write_config_dword (dev, where, value);
- }
-
- result = build_dev (ops, bus, slot, function, &dev);
- if (result)
- return result;
- result = pci_write_config_dword(dev, where, value);
- kfree (dev->bus);
- kfree (dev);
- return result;
-}
-
/*
* This is code that scans the pci buses.
* Every bus and every function is presented to a custom
@@ -394,10 +155,4 @@

EXPORT_SYMBOL(pci_visit_dev);
-EXPORT_SYMBOL(pci_read_config_byte_nodev);
-EXPORT_SYMBOL(pci_read_config_word_nodev);
-EXPORT_SYMBOL(pci_read_config_dword_nodev);
-EXPORT_SYMBOL(pci_write_config_byte_nodev);
-EXPORT_SYMBOL(pci_write_config_word_nodev);
-EXPORT_SYMBOL(pci_write_config_dword_nodev);

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.545 -> 1.546
# arch/x86_64/pci/direct.c 1.2 -> 1.3
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.546
# [PATCH] PCI: x86-64 pci_ops changes
#

# x86-64 pci changes
# --------------------------------------------
#
diff -Nru a/arch/x86_64/pci/direct.c b/arch/x86_64/pci/direct.c
--- a/arch/x86_64/pci/direct.c	Fri Aug 30 15:00:30 2002
+++ b/arch/x86_64/pci/direct.c	Fri Aug 30 15:00:30 2002
@@ -13,7 +13,7 @@
 #define PCI_CONF1_ADDRESS(bus, dev, fn, reg) \
 	(0x80000000 | (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3))

-static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) +static int __pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
{
unsigned long flags;

@@ -41,7 +41,7 @@
return 0;
}

-static int pci_conf1_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) +static int __pci_conf1_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
{
unsigned long flags;

@@ -69,75 +69,23 @@
return 0;
}

-
#undef PCI_CONF1_ADDRESS

-static int pci_conf1_read_config_byte(struct pci_dev *dev, int where, u8 *value) +static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
{
- int result;
- u32 data;
-
- if (!value)
- return -EINVAL;
-
- result = pci_conf1_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 1, &data);
-
- *value = (u8)data;
-
- return result;
+ return __pci_conf1_read(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

-static int pci_conf1_read_config_word(struct pci_dev *dev, int where, u16 *value) +static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
{
- int result;
- u32 data;
-
- if (!value)
- return -EINVAL;
-
- result = pci_conf1_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 2, &data);
-
- *value = (u16)data;
-
- return result;
-}
-
-static int pci_conf1_read_config_dword(struct pci_dev *dev, int where, u32 *value) -{
- if (!value)
- return -EINVAL;
-
- return pci_conf1_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 4, value);
-}
-
-static int pci_conf1_write_config_byte(struct pci_dev *dev, int where, u8 value)
-{
- return pci_conf1_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 1, value);
-}
-
-static int pci_conf1_write_config_word(struct pci_dev *dev, int where, u16 value) -{
- return pci_conf1_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 2, value);
-}
-
-static int pci_conf1_write_config_dword(struct pci_dev *dev, int where, u32 value) -{
- return pci_conf1_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 4, value);
+ return __pci_conf1_write(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

static struct pci_ops pci_direct_conf1 = {
- pci_conf1_read_config_byte,
- pci_conf1_read_config_word,
- pci_conf1_read_config_dword,
- pci_conf1_write_config_byte,
- pci_conf1_write_config_word,
- pci_conf1_write_config_dword
+ .read = pci_conf1_read,
+ .write = pci_conf1_write,
};

@@ -147,7 +95,7 @@

#define PCI_CONF2_ADDRESS(dev, reg) (u16)(0xC000 | (dev << 8) | reg)

-static int pci_conf2_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) +static int __pci_conf2_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
{
unsigned long flags;

@@ -181,7 +129,7 @@
return 0;
}

-static int pci_conf2_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) +static int __pci_conf2_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
{
unsigned long flags;

@@ -217,57 +165,21 @@

#undef PCI_CONF2_ADDRESS

-static int pci_conf2_read_config_byte(struct pci_dev *dev, int where, u8 *value)
-{
- int result;
- u32 data;
- result = pci_conf2_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 1, &data);
- *value = (u8)data;
- return result;
-}
-
-static int pci_conf2_read_config_word(struct pci_dev *dev, int where, u16 *value) -{
- int result;
- u32 data;
- result = pci_conf2_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 2, &data);
- *value = (u16)data;
- return result;
-}
-
-static int pci_conf2_read_config_dword(struct pci_dev *dev, int where, u32 *value) -{
- return pci_conf2_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 4, value);
-}
-
-static int pci_conf2_write_config_byte(struct pci_dev *dev, int where, u8 value) +static int pci_conf2_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
{
- return pci_conf2_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 1, value);
+ return __pci_conf2_read(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

-static int pci_conf2_write_config_word(struct pci_dev *dev, int where, u16 value) +static int pci_conf2_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
{
- return pci_conf2_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 2, value);
-}
-
-static int pci_conf2_write_config_dword(struct pci_dev *dev, int where, u32 value) -{
- return pci_conf2_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 4, value);
+ return __pci_conf2_write(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

static struct pci_ops pci_direct_conf2 = {
- pci_conf2_read_config_byte,
- pci_conf2_read_config_word,
- pci_conf2_read_config_dword,
- pci_conf2_write_config_byte,
- pci_conf2_write_config_word,
- pci_conf2_write_config_dword
+ .read = pci_conf2_read,
+ .write = pci_conf2_write,
};

@@ -283,7 +195,7 @@
*/
static int __devinit pci_sanity_check(struct pci_ops *o) {
- u16 x;
+ u32 x = 0;
struct pci_bus bus; /* Fake bus and device */
struct pci_dev dev;

@@ -292,16 +204,16 @@
bus.number = 0;
dev.bus = &bus;
for(dev.devfn=0; dev.devfn < 0x100; dev.devfn++)
- if ((!o->read_word(&dev, PCI_CLASS_DEVICE, &x) &&
+ if ((!o->read(&bus, dev.devfn, PCI_CLASS_DEVICE, 2, &x) &&
(x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)) ||
- (!o->read_word(&dev, PCI_VENDOR_ID, &x) &&
+ (!o->read(&bus, dev.devfn, PCI_VENDOR_ID, 2, &x) &&
(x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)))
return 1;
DBG("PCI: Sanity check failed\n");
return 0;
}

-static struct pci_ops * __devinit pci_check_direct(void)
+static int __init pci_direct_init(void)
{
unsigned int tmp;
unsigned long flags;
@@ -321,8 +233,10 @@
local_irq_restore(flags); printk(KERN_INFO "PCI: Using configuration type 1\n"); if (!request_region(0xCF8, 8, "PCI conf1"))
- return NULL;
- return &pci_direct_conf1;
+ pci_root_ops = NULL;
+ else
+ pci_root_ops = &pci_direct_conf1;
+ return 0;
}
outl (tmp, 0xCF8);
}
@@ -339,28 +253,15 @@
local_irq_restore(flags); printk(KERN_INFO "PCI: Using configuration type 2\n"); if (!request_region(0xCF8, 4, "PCI conf2"))
- return NULL;
- return &pci_direct_conf2;
+ pci_root_ops = NULL;
+ else
+ pci_root_ops = &pci_direct_conf2;
+ return 0;
}
}

local_irq_restore(flags);
- return NULL;
-}
-
-static int __init pci_direct_init(void)
-{
- if ((pci_probe & (PCI_PROBE_CONF1 | PCI_PROBE_CONF2))
- && (pci_root_ops = pci_check_direct())) {
- if (pci_root_ops == &pci_direct_conf1) {
- pci_config_read = pci_conf1_read;
- pci_config_write = pci_conf1_write;
- }
- else {
- pci_config_read = pci_conf2_read;
- pci_config_write = pci_conf2_write;
- }
- }
+ pci_root_ops = NULL;
return 0;
}

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.546 -> 1.547
# arch/alpha/kernel/core_t2.c 1.3 -> 1.4
# arch/alpha/kernel/core_irongate.c 1.6 -> 1.7
# arch/alpha/kernel/core_polaris.c 1.2 -> 1.3
# arch/alpha/kernel/core_apecs.c 1.3 -> 1.4
# arch/alpha/kernel/core_lca.c 1.3 -> 1.4
# arch/alpha/kernel/core_cia.c 1.8 -> 1.9
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.547
# [PATCH] PCI: alpha pci_ops changes
#

# pci_ops update for most of the alpha ports.
# --------------------------------------------
#
diff -Nru a/arch/alpha/kernel/core_apecs.c b/arch/alpha/kernel/core_apecs.c
--- a/arch/alpha/kernel/core_apecs.c	Fri Aug 30 15:00:27 2002
+++ b/arch/alpha/kernel/core_apecs.c	Fri Aug 30 15:00:27 2002
@@ -90,12 +90,11 @@
  */

static int
-mk_conf_addr(struct pci_dev *dev, int where, unsigned long *pci_addr,
- unsigned char *type1)
+mk_conf_addr(struct pci_bus *bus_dev, unsigned int device_fn, int where,
+ unsigned long *pci_addr, unsigned char *type1)
{
unsigned long addr;
- u8 bus = dev->bus->number;
- u8 device_fn = dev->devfn;
+ u8 bus = bus_dev->number;

DBGC(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x,"
" pci_addr=0x%p, type1=0x%p)\n",
@@ -273,87 +272,66 @@
}

static int
-apecs_read_config_byte(struct pci_dev *dev, int where, u8 *value) +apecs_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
+ u8 *value)
{
unsigned long addr, pci_addr;
unsigned char type1;
+ long mask;
+ int shift;

- if (mk_conf_addr(dev, where, &pci_addr, &type1))
+ if (mk_conf_addr(bus, devfn, where, &pci_addr, &type1))
return PCIBIOS_DEVICE_NOT_FOUND;

- addr = (pci_addr << 5) + 0x00 + APECS_CONF;
- *value = conf_read(addr, type1) >> ((where & 3) * 8);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-apecs_read_config_word(struct pci_dev *dev, int where, u16 *value) -{
- unsigned long addr, pci_addr;
- unsigned char type1;
-
- if (mk_conf_addr(dev, where, &pci_addr, &type1))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- addr = (pci_addr << 5) + 0x08 + APECS_CONF;
- *value = conf_read(addr, type1) >> ((where & 3) * 8);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-apecs_read_config_dword(struct pci_dev *dev, int where, u32 *value) -{
- unsigned long addr, pci_addr;
- unsigned char type1;
-
- if (mk_conf_addr(dev, where, &pci_addr, &type1))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- addr = (pci_addr << 5) + 0x18 + APECS_CONF;
- *value = conf_read(addr, type1);
+ switch (size) {
+ case 1:
+ mask = 0x00;
+ shift = (where & 3) * 8;
+ break;
+ case 2:
+ mask = 0x08;
+ shift = (where & 3) * 8;
+ break;
+ case 4:
+ mask = 0x18;
+ shift = 0;
+ break;
+ }
+ addr = (pci_addr << 5) + mask + APECS_CONF;
+ *value = conf_read(addr, type1) >> (shift);
return PCIBIOS_SUCCESSFUL;
}

static int
-apecs_write_config(struct pci_dev *dev, int where, u32 value, long mask) +apecs_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
{
unsigned long addr, pci_addr;
unsigned char type1;
+ long mask;

- if (mk_conf_addr(dev, where, &pci_addr, &type1))
+ if (mk_conf_addr(bus, devfn, where, &pci_addr, &type1))
return PCIBIOS_DEVICE_NOT_FOUND;

+ switch (size) {
+ case 1:
+ mask = 0x00;
+ break;
+ case 2:
+ mask = 0x08;
+ break;
+ case 4:
+ mask = 0x18;
+ break;
+ }
addr = (pci_addr << 5) + mask + APECS_CONF; conf_write(addr, value << ((where & 3) * 8), type1); return PCIBIOS_SUCCESSFUL;
}

-static int
-apecs_write_config_byte(struct pci_dev *dev, int where, u8 value) -{
- return apecs_write_config(dev, where, value, 0x00);
-}
-
-static int
-apecs_write_config_word(struct pci_dev *dev, int where, u16 value) -{
- return apecs_write_config(dev, where, value, 0x08);
-}
-
-static int
-apecs_write_config_dword(struct pci_dev *dev, int where, u32 value) -{
- return apecs_write_config(dev, where, value, 0x18);
-}
-
struct pci_ops apecs_pci_ops =
{
- read_byte: apecs_read_config_byte,
- read_word: apecs_read_config_word,
- read_dword: apecs_read_config_dword,
- write_byte: apecs_write_config_byte,
- write_word: apecs_write_config_word,
- write_dword: apecs_write_config_dword
+ .read = apecs_read_config,
+ .write = apecs_write_config,
};

void

diff -Nru a/arch/alpha/kernel/core_cia.c b/arch/alpha/kernel/core_cia.c
@@ -89,11 +89,10 @@
  */
 
 static int
-mk_conf_addr(struct pci_dev *dev, int where, unsigned long *pci_addr,
-	     unsigned char *type1)
+mk_conf_addr(struct pci_bus *bus_dev, unsigned int device_fn, int where,
+	     unsigned long *pci_addr, unsigned char *type1)
 {
-	u8 bus = dev->bus->number;
-	u8 device_fn = dev->devfn;
+	u8 bus = bus_dev->number;
 
 	*type1 = (bus != 0);
 	*pci_addr = (bus << 16) | (device_fn << 8) | where;

@@ -208,88 +207,70 @@
 	DBGC(("done\n"));
 }
 
-static int
-cia_read_config_byte(struct pci_dev *dev, int where, u8 *value)
-{
-	unsigned long addr, pci_addr;
-	unsigned char type1;
-
-	if (mk_conf_addr(dev, where, &pci_addr, &type1))
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	addr = (pci_addr << 5) + 0x00 + CIA_CONF;
-	*value = conf_read(addr, type1) >> ((where & 3) * 8);
-	return PCIBIOS_SUCCESSFUL;
-}
-
 static int 
-cia_read_config_word(struct pci_dev *dev, int where, u16 *value)
+cia_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
+		u32 *value)
 {
 	unsigned long addr, pci_addr;
+	long mask;
 	unsigned char type1;
+	int shift;
 
-	if (mk_conf_addr(dev, where, &pci_addr, &type1))
+	if (mk_conf_addr(bus, devfn, where, &pci_addr, &type1))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	addr = (pci_addr << 5) + 0x08 + CIA_CONF;
-	*value = conf_read(addr, type1) >> ((where & 3) * 8);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int 
-cia_read_config_dword(struct pci_dev *dev, int where, u32 *value)
-{
-	unsigned long addr, pci_addr;
-	unsigned char type1;
-
-	if (mk_conf_addr(dev, where, &pci_addr, &type1))
-		return PCIBIOS_DEVICE_NOT_FOUND;
+	switch (size) {
+	case 1:
+		mask = 0x00;
+		shift = (where & 3) * 8;
+		break;
+	case 2:
+		mask = 0x08;
+		shift = (where & 3) * 8;
+		break;
+	case 4:
+		mase = 0x18;
+		shift = 0;
+		break;
+	}
 
 	addr = (pci_addr << 5) + 0x18 + CIA_CONF;
-	*value = conf_read(addr, type1);
+	*value = conf_read(addr, type1) >> (shift);
 	return PCIBIOS_SUCCESSFUL;
 }
 
 static int 
-cia_write_config(struct pci_dev *dev, int where, u32 value, long mask)
+cia_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
+		 u32 value)
 {
 	unsigned long addr, pci_addr;
+	long mask;
 	unsigned char type1;
 
-	if (mk_conf_addr(dev, where, &pci_addr, &type1))
+	if (mk_conf_addr(bus, devfn, where, &pci_addr, &type1))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
+	switch (size) {
+	case 1:
+		mask = 0x00;
+		break;
+	case 2:
+		mask = 0x08;
+		break;
+	case 4:
+		mase = 0x18;
+		break;
+	}
+
 	addr = (pci_addr << 5) + mask + CIA_CONF;
 	conf_write(addr, value << ((where & 3) * 8), type1);
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static int
-cia_write_config_byte(struct pci_dev *dev, int where, u8 value)
-{
-	return cia_write_config(dev, where, value, 0x00);
-}
-
-static int 
-cia_write_config_word(struct pci_dev *dev, int where, u16 value)
-{
-	return cia_write_config(dev, where, value, 0x08);
-}
-
-static int 
-cia_write_config_dword(struct pci_dev *dev, int where, u32 value)
-{
-	return cia_write_config(dev, where, value, 0x18);
-}
-
 struct pci_ops cia_pci_ops = 
 {
-	read_byte:	cia_read_config_byte,
-	read_word:	cia_read_config_word,
-	read_dword:	cia_read_config_dword,
-	write_byte:	cia_write_config_byte,
-	write_word:	cia_write_config_word,
-	write_dword:	cia_write_config_dword
+	.read = 	cia_read_config,
+	.write =	cia_write_config,
 };
 
 /*

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.547 -> 1.548
# arch/ia64/sn/io/pci.c 1.3 -> 1.4
# arch/ia64/kernel/pci.c 1.14 -> 1.15
# include/asm-ia64/pci.h 1.10 -> 1.11
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.548
# [PATCH] PCI: ia64 pci_ops changes
#

# ia64 pci ops changes
# --------------------------------------------
#
diff -Nru a/arch/ia64/kernel/pci.c b/arch/ia64/kernel/pci.c
--- a/arch/ia64/kernel/pci.c	Fri Aug 30 15:00:24 2002
+++ b/arch/ia64/kernel/pci.c	Fri Aug 30 15:00:24 2002
@@ -46,9 +46,6 @@

struct pci_ops *pci_root_ops;

-int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value); -int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value); -

/*
* Low-level SAL-based PCI configuration access functions. Note that SAL
@@ -60,7 +57,7 @@
((u64)(bus << 16) | (u64)(dev << 11) | (u64)(fn << 8) | (u64)(reg))

static int
-pci_sal_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) +__pci_sal_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
{
int result = 0;
u64 data = 0;
@@ -76,7 +73,7 @@
}

static int
-pci_sal_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) +__pci_sal_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
{
if ((bus > 255) || (dev > 31) || (fn > 7) || (reg > 255))
return -EINVAL;
@@ -86,77 +83,22 @@

static int
-pci_sal_read_config_byte (struct pci_dev *dev, int where, u8 *value)
-{
- int result = 0;
- u32 data = 0;
-
- if (!value)
- return -EINVAL;
-
- result = pci_sal_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 1, &data);
-
- *value = (u8) data;
-
- return result;
-}
-
-static int
-pci_sal_read_config_word (struct pci_dev *dev, int where, u16 *value)
-{
- int result = 0;
- u32 data = 0;
-
- if (!value)
- return -EINVAL;
-
- result = pci_sal_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 2, &data);
-
- *value = (u16) data;
-
- return result;
-}
-
-static int
-pci_sal_read_config_dword (struct pci_dev *dev, int where, u32 *value)
-{
- if (!value)
- return -EINVAL;
-
- return pci_sal_read(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 4, value);
-}
-
-static int
-pci_sal_write_config_byte (struct pci_dev *dev, int where, u8 value)
-{
- return pci_sal_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 1, value);
-}
-
-static int
-pci_sal_write_config_word (struct pci_dev *dev, int where, u16 value) +pci_sal_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
{
- return pci_sal_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 2, value);
+ return __pci_sal_read(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

static int
-pci_sal_write_config_dword (struct pci_dev *dev, int where, u32 value) +pci_sal_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
{
- return pci_sal_write(0, dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), where, 4, value);
+ return __pci_sal_write(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
}

struct pci_ops pci_sal_ops = {
- pci_sal_read_config_byte,
- pci_sal_read_config_word,
- pci_sal_read_config_dword,
- pci_sal_write_config_byte,
- pci_sal_write_config_word,
- pci_sal_write_config_dword
+ .read = pci_sal_read,
+ .write = pci_sal_write,
};

@@ -193,8 +135,6 @@
printk("PCI: Using SAL to access configuration space\n");

pci_root_ops = &pci_sal_ops;
- pci_config_read = pci_sal_read;
- pci_config_write = pci_sal_write;

return;
}

diff -Nru a/arch/ia64/sn/io/pci.c b/arch/ia64/sn/io/pci.c
@@ -44,22 +44,21 @@
 extern devfs_handle_t devfn_to_vertex(unsigned char bus, unsigned char devfn);
 
 /*
- * snia64_read_config_byte - Read a byte from the config area of the device.
+ * snia64_read - Read from the config area of the device.
  */
-static int snia64_read_config_byte (struct pci_dev *dev,
-                                   int where, unsigned char *val)
+static int snia64_read (struct pci_bus *bus, unsigned char devfn,
+                                   int where, int size, unsigned char *val)
 {
 	unsigned long res = 0;
-	unsigned size = 1;
 	devfs_handle_t device_vertex;
 
-	if ( (dev == (struct pci_dev *)0) || (val == (unsigned char *)0) ) {
+	if ( (bus == NULL) || (val == (unsigned char *)0) ) {
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
-	device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn);
+	device_vertex = devfn_to_vertex(bus->number, devfn);
 	if (!device_vertex) {
 		DBG("%s : nonexistent device: bus= 0x%x  slot= 0x%x  func= 0x%x\n", 
-		__FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
+		__FUNCTION__, bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
 		return(-1);
 	}
 	res = pciio_config_get(device_vertex, (unsigned) where, size);

@@ -68,160 +67,40 @@
 }
 
 /*
- * snia64_read_config_word - Read 2 bytes from the config area of the device.
+ * snia64_write - Writes to the config area of the device.
  */
-static int snia64_read_config_word (struct pci_dev *dev,
-                                   int where, unsigned short *val)
+static int snia64_write (struct pci_bus *bus, unsigned char devfn,
+                                    int where, int size, unsigned char val)
 {
-	unsigned long res = 0;
-	unsigned size = 2; /* 2 bytes */
-	devfs_handle_t device_vertex;
-
-	if ( (dev == (struct pci_dev *)0) || (val == (unsigned short *)0) ) {
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	}
-	device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn);
-	if (!device_vertex) {
-		DBG("%s : nonexistent device: bus= 0x%x  slot= 0x%x  func= 0x%x\n", 
-		__FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
-		return(-1);
-	}
-	res = pciio_config_get(device_vertex, (unsigned) where, size);
-	*val = (unsigned short) res;
-	return PCIBIOS_SUCCESSFUL;
-}
-
-/*
- * snia64_read_config_dword - Read 4 bytes from the config area of the device.
- */
-static int snia64_read_config_dword (struct pci_dev *dev,
-                                    int where, unsigned int *val)
-{
-	unsigned long res = 0;
-	unsigned size = 4; /* 4 bytes */
 	devfs_handle_t device_vertex;
 
-	if (where & 3) {
-		return PCIBIOS_BAD_REGISTER_NUMBER;
-	}
-	if ( (dev == (struct pci_dev *)0) || (val == (unsigned int *)0) ) {
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	}
-
-	device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn);
-	if (!device_vertex) {
-		DBG("%s : nonexistent device: bus= 0x%x  slot= 0x%x  func= 0x%x\n", 
-		__FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
-		return(-1);
-	}
-	res = pciio_config_get(device_vertex, (unsigned) where, size);
-	*val = (unsigned int) res;
-	return PCIBIOS_SUCCESSFUL;
-}
-
-/*
- * snia64_write_config_byte - Writes 1 byte to the config area of the device.
- */
-static int snia64_write_config_byte (struct pci_dev *dev,
-                                    int where, unsigned char val)
-{
-	devfs_handle_t device_vertex;
-
-	if ( dev == (struct pci_dev *)0 ) {
+	if ( bus == NULL) {
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
 	/* 
 	 * if it's an IOC3 then we bail out, we special
 	 * case them with pci_fixup_ioc3
 	 */
-	if (dev->vendor == PCI_VENDOR_ID_SGI && 
+	/* Starting 2.5.32 struct pci_dev is not passed down */
+	/*if (dev->vendor == PCI_VENDOR_ID_SGI && 
 	    dev->device == PCI_DEVICE_ID_SGI_IOC3 )
 		return PCIBIOS_SUCCESSFUL;
+	*/
 
-	device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn);
-	if (!device_vertex) {
-		DBG("%s : nonexistent device: bus= 0x%x  slot= 0x%x  func= 0x%x\n", 
-		__FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
-		return(-1);
-	}
-	pciio_config_set( device_vertex, (unsigned)where, 1, (uint64_t) val);
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-/*
- * snia64_write_config_word - Writes 2 bytes to the config area of the device.
- */
-static int snia64_write_config_word (struct pci_dev *dev,
-                                    int where, unsigned short val)
-{
-	devfs_handle_t device_vertex = NULL;
-
-	if (where & 1) {
-		return PCIBIOS_BAD_REGISTER_NUMBER;
-	}
-	if ( dev == (struct pci_dev *)0 ) {
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	}
-	/* 
-	 * if it's an IOC3 then we bail out, we special
-	 * case them with pci_fixup_ioc3
-	 */
-	if (dev->vendor == PCI_VENDOR_ID_SGI && 
-	    dev->device == PCI_DEVICE_ID_SGI_IOC3)
-		return PCIBIOS_SUCCESSFUL;
-
-	device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn);
-	if (!device_vertex) {
-		DBG("%s : nonexistent device: bus= 0x%x  slot= 0x%x  func= 0x%x\n", 
-		__FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
-		return(-1);
-	}
-	pciio_config_set( device_vertex, (unsigned)where, 2, (uint64_t) val);
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-/*
- * snia64_write_config_dword - Writes 4 bytes to the config area of the device.
- */
-static int snia64_write_config_dword (struct pci_dev *dev,
-                                     int where, unsigned int val)
-{
-	devfs_handle_t device_vertex;
-
-	if (where & 3) {
-		return PCIBIOS_BAD_REGISTER_NUMBER;
-	}
-	if ( dev == (struct pci_dev *)0 ) {
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	}
-	/* 
-	 * if it's an IOC3 then we bail out, we special
-	 * case them with pci_fixup_ioc3
-	 */
-	if (dev->vendor == PCI_VENDOR_ID_SGI && 
-	    dev->device == PCI_DEVICE_ID_SGI_IOC3)
-		return PCIBIOS_SUCCESSFUL;
-
-	device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn);
+	device_vertex = devfn_to_vertex(bus->number, devfn);
 	if (!device_vertex) {
 		DBG("%s : nonexistent device: bus= 0x%x  slot= 0x%x  func= 0x%x\n", 
-		__FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
+		__FUNCTION__, bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
 		return(-1);
 	}
-	pciio_config_set( device_vertex, (unsigned)where, 4, (uint64_t) val);
+	pciio_config_set( device_vertex, (unsigned)where, size, (uint64_t) val);
 
 	return PCIBIOS_SUCCESSFUL;
 }
 
 static struct pci_ops snia64_pci_ops = {
-	snia64_read_config_byte,
-	snia64_read_config_word,
-	snia64_read_config_dword,
-	snia64_write_config_byte,
-	snia64_write_config_word,
-	snia64_write_config_dword
+	.read =		snia64_read,
+	.write = 	snia64_write,
 };
 
 /*

diff -Nru a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h
@@ -22,8 +22,6 @@
 
 void pcibios_config_init(void);
 struct pci_bus * pcibios_scan_root(int bus);
-extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value);
-extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value);
 
 struct pci_dev;
 

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.548 -> 1.549
# arch/mips/ddb5xxx/ddb5477/pci_ops.c 1.1 -> 1.2
# arch/mips/ddb5476/pci.c 1.3 -> 1.4
# arch/mips/mips-boards/generic/pci.c 1.3 -> 1.4
# arch/mips/ddb5074/pci.c 1.4 -> 1.5
# arch/mips/gt64120/common/pci.c 1.3 -> 1.4
# arch/mips/sni/pci.c 1.4 -> 1.5
# arch/mips/ite-boards/generic/it8172_pci.c 1.3 -> 1.4
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.549
# [PATCH] PCI: mips pci_ops changes
#

# mips pci ops changes
# --------------------------------------------
#
diff -Nru a/arch/mips/ddb5074/pci.c b/arch/mips/ddb5074/pci.c
--- a/arch/mips/ddb5074/pci.c	Fri Aug 30 15:00:21 2002
+++ b/arch/mips/ddb5074/pci.c	Fri Aug 30 15:00:21 2002
@@ -43,137 +43,118 @@
 }

-static int nile4_pci_read_config_dword(struct pci_dev *dev,
- int where, u32 * val)
+static int nile4_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, u32 * val)
{
- int slot_num, func_num;
- u32 base;
+ int status, slot_num, func_num;
+ u32 result, base;

- /*
- * For starters let's do configuration cycle 0 only (one bus only)
- */
- if (dev->bus->number)
- return PCIBIOS_FUNC_NOT_SUPPORTED;
-
- slot_num = PCI_SLOT(dev->devfn);
- func_num = PCI_FUNC(dev->devfn);
- if (slot_num == 5) {
- /*
- * This is Nile 4 and it will crash if we access it like other
- * devices
- */
- *val = nile4_in32(NILE4_PCI_BASE + where);
- return PCIBIOS_SUCCESSFUL;
+ switch (size) {
+ case 4:
+ /*
+ * For starters let's do configuration cycle 0 only
+ * (one bus only)
+ */
+ if (bus->number)
+ return PCIBIOS_FUNC_NOT_SUPPORTED;
+
+ slot_num = PCI_SLOT(devfn);
+ func_num = PCI_FUNC(devfn);
+ if (slot_num == 5) {
+ /*
+ * This is Nile 4 and it will crash if we access it
+ * like other devices
+ */
+ *val = nile4_in32(NILE4_PCI_BASE + where);
+ return PCIBIOS_SUCCESSFUL;
+ }
+ base = nile4_pre_pci_access0(slot_num);
+ *val = *((volatile u32 *) (base + (func_num << 8) +
+ (where & 0xfc)));
+ nile4_post_pci_access0();
+ return PCIBIOS_SUCCESSFUL;
+
+ case 2:
+ status = nile4_pci_read(bus, devfn, where, 4, &result);
+ if (status != PCIBIOS_SUCCESSFUL)
+ return status;
+ if (where & 2)
+ result >>= 16;
+ *val = (u16)(result & 0xffff);
+ break;
+ case 1:
+ status = nile4_pci_read(bus, devfn, where, 4, &result);
+ if (status != PCIBIOS_SUCCESSFUL)
+ return status;
+ if (where & 1)
+ result >>= 8;
+ if (where & 2)
+ result >>= 16;
+ *val = (u8)(result & 0xff);
+ break;
}
- base = nile4_pre_pci_access0(slot_num);
- *val =
- *((volatile u32 *) (base + (func_num << 8) + (where & 0xfc)));
- nile4_post_pci_access0();
return PCIBIOS_SUCCESSFUL;
}

-static int nile4_pci_write_config_dword(struct pci_dev *dev, int where,
- u32 val)
-{
- int slot_num, func_num;
- u32 base;
-
- /*
- * For starters let's do configuration cycle 0 only (one bus only)
- */
- if (dev->bus->number)
- return PCIBIOS_FUNC_NOT_SUPPORTED;
-
- slot_num = PCI_SLOT(dev->devfn);
- func_num = PCI_FUNC(dev->devfn);
- if (slot_num == 5) {
- /*
- * This is Nile 4 and it will crash if we access it like other
- * devices
- */
- nile4_out32(NILE4_PCI_BASE + where, val);
- return PCIBIOS_SUCCESSFUL;
- }
- base = nile4_pre_pci_access0(slot_num);
- *((volatile u32 *) (base + (func_num << 8) + (where & 0xfc))) =
- val;
- nile4_post_pci_access0();
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int nile4_pci_read_config_word(struct pci_dev *dev, int where,
- u16 * val)
-{
- int status;
- u32 result;
-
- status = nile4_pci_read_config_dword(dev, where, &result);
- if (status != PCIBIOS_SUCCESSFUL)
- return status;
- if (where & 2)
- result >>= 16;
- *val = result & 0xffff;
- return PCIBIOS_SUCCESSFUL;
-}

-static int nile4_pci_read_config_byte(struct pci_dev *dev, int where,
- u8 * val)
+static int nile4_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, u32 val)
{
- int status;
- u32 result;
+ int status, slot_num, func_num, shift = 0;
+ u32 result, base;

- status = nile4_pci_read_config_dword(dev, where, &result);
- if (status != PCIBIOS_SUCCESSFUL)
- return status;
- if (where & 1)
- result >>= 8;
- if (where & 2)
- result >>= 16;
- *val = result & 0xff;
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int nile4_pci_write_config_word(struct pci_dev *dev, int where,
- u16 val)
-{
- int status, shift = 0;
- u32 result;
-
- status = nile4_pci_read_config_dword(dev, where, &result);
- if (status != PCIBIOS_SUCCESSFUL)
- return status;
- if (where & 2)
- shift += 16;
- result &= ~(0xffff << shift);
- result |= val << shift;
- return nile4_pci_write_config_dword(dev, where, result);
-}
-
-static int nile4_pci_write_config_byte(struct pci_dev *dev, int where,
- u8 val)
-{
- int status, shift = 0;
- u32 result;
-
- status = nile4_pci_read_config_dword(dev, where, &result);
- if (status != PCIBIOS_SUCCESSFUL)
- return status;
- if (where & 2)
- shift += 16;
- if (where & 1)
- shift += 8;
- result &= ~(0xff << shift);
- result |= val << shift;
- return nile4_pci_write_config_dword(dev, where, result);
+ switch (size) {
+ case 4:
+ /*
+ * For starters let's do configuration cycle 0 only
+ * (one bus only)
+ */
+ if (bus->number)
+ return PCIBIOS_FUNC_NOT_SUPPORTED;
+
+ slot_num = PCI_SLOT(devfn);
+ func_num = PCI_FUNC(devfn);
+ if (slot_num == 5) {
+ /*
+ * This is Nile 4 and it will crash if we access
+ * it like other devices
+ */
+ nile4_out32(NILE4_PCI_BASE + where, val);
+ return PCIBIOS_SUCCESSFUL;
+ }
+ base = nile4_pre_pci_access0(slot_num);
+ *((volatile u32 *) (base + (func_num << 8) +
+ (where & 0xfc))) = val;
+ nile4_post_pci_access0();
+ return PCIBIOS_SUCCESSFUL;
+
+ case 2:
+ status = nile4_pci_read(bus, devfn, where, 4, &result);
+ if (status != PCIBIOS_SUCCESSFUL)
+ return status;
+ if (where & 2)
+ shift += 16;
+ result &= ~(0xffff << shift);
+ result |= (u16)(val << shift);
+ break;
+ case 1:
+ status = nile4_pci_read(bus, devfn, where, 4, &result);
+ if (status != PCIBIOS_SUCCESSFUL)
+ return status;
+ if (where & 2)
+ shift += 16;
+ if (where & 1)
+ shift += 8;
+ result &= ~(0xff << shift);
+ result |= (u8)(val << shift);
+ break;
+ }
+ return nile4_pci_write(bus, devfn, where, 4, result);
}

struct pci_ops nile4_pci_ops = {
- nile4_pci_read_config_byte,
- nile4_pci_read_config_word,
- nile4_pci_read_config_dword,
- nile4_pci_write_config_byte,
- nile4_pci_write_config_word,
- nile4_pci_write_config_dword
+ .read = nile4_pci_read,
+ .write = nile4_pci_write,
};

struct {

diff -Nru a/arch/mips/ddb5476/pci.c b/arch/mips/ddb5476/pci.c
@@ -51,145 +51,106 @@
 	nile4_set_pmr(NILE4_PCIINIT1, NILE4_PCICMD_MEM, 0x08000000);
 }
 
-
-static int nile4_pci_read_config_dword(struct pci_dev *dev,
-				       int where, u32 * val)
+static int nile4_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
+			 int size, u32 * val)
 {
-	int slot_num, func_num;
-	u32 base;
-	u32 addr;
-
-	/*
-	 *  Do we need to generate type 1 configure transaction?
-	 */
-	if (dev->bus->number) {
-		/* FIXME - not working yet */
-		return PCIBIOS_FUNC_NOT_SUPPORTED;
-
-		/*
-		 * the largest type 1 configuration addr is 16M, < 256M
-		 * config space
-		 */
-		slot_num = 0;
-		addr =
-		    (dev->bus->number << 16) | (dev->devfn <
-						8) | where | 1;
-	} else {
-		slot_num = PCI_SLOT(dev->devfn);
-		func_num = PCI_FUNC(dev->devfn);
-		addr = (func_num << 8) + where;
-	}
+	int status, slot_num, func_num;
+	u32 result, base, addr;
 
-	base = nile4_pre_pci_access0(slot_num);
-	*val = *(volatile u32 *) (base + addr);
-	nile4_post_pci_access0();
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int nile4_pci_write_config_dword(struct pci_dev *dev, int where,
-					u32 val)
-{
-	int slot_num, func_num;
-	u32 base;
-	u32 addr;
-
-	/*
-	 *  Do we need to generate type 1 configure transaction?
-	 */
-	if (dev->bus->number) {
-		/* FIXME - not working yet */
-		return PCIBIOS_FUNC_NOT_SUPPORTED;
-
-		/* the largest type 1 configuration addr is 16M, < 256M config space */
-		slot_num = 0;
-		addr =
-		    (dev->bus->number << 16) | (dev->devfn <
-						8) | where | 1;
-	} else {
-		slot_num = PCI_SLOT(dev->devfn);
-		func_num = PCI_FUNC(dev->devfn);
-		addr = (func_num << 8) + where;
+	if(size == 4) {
+		/* Do we need to generate type 1 configure transaction? */
+		if (bus->number) {
+			/* FIXME - not working yet */
+			return PCIBIOS_FUNC_NOT_SUPPORTED;
+			/*
+			 * the largest type 1 configuration addr is 16M, 
+			 * < 256M config space 
+			 */
+			slot_num = 0;
+			addr = (bus->number << 16) | (devfn < 8) | where | 1;
+		} else {
+			slot_num = PCI_SLOT(devfn);
+			func_num = PCI_FUNC(devfn);
+			addr = (func_num << 8) + where;
+		}
+		base = nile4_pre_pci_access0(slot_num);
+		*val = *(volatile u32 *) (base + addr);
+		nile4_post_pci_access0();
+		return PCIBIOS_SUCCESSFUL;
 	}
 
-	base = nile4_pre_pci_access0(slot_num);
-	*(volatile u32 *) (base + addr) = val;
-	nile4_post_pci_access0();
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int nile4_pci_read_config_word(struct pci_dev *dev, int where,
-				      u16 * val)
-{
-	int status;
-	u32 result;
-
-	status = nile4_pci_read_config_dword(dev, where & ~3, &result);
-	if (status != PCIBIOS_SUCCESSFUL)
-		return status;
-	if (where & 2)
-		result >>= 16;
-	*val = result & 0xffff;
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int nile4_pci_read_config_byte(struct pci_dev *dev, int where,
-				      u8 * val)
-{
-	int status;
-	u32 result;
-
-	status = nile4_pci_read_config_dword(dev, where & ~3, &result);
+	status = nile4_pci_read(bus, devfn, where & ~3, 4, &result);
 	if (status != PCIBIOS_SUCCESSFUL)
 		return status;
-	if (where & 1)
-		result >>= 8;
-	if (where & 2)
-		result >>= 16;
-	*val = result & 0xff;
+	switch (size) {
+		case 1:
+			if (where & 1)
+				result >>= 8;
+			if (where & 2)
+				result >>= 16;
+			*val = (u8)(result & 0xff);
+			break;
+		case 2:
+			if (where & 2)
+				result >>= 16;
+			*val = (u16)(result & 0xffff);
+			break;
+	}
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static int nile4_pci_write_config_word(struct pci_dev *dev, int where,
-				       u16 val)
+static int nile4_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
+			  int size, u32 val)
 {
-	int status, shift = 0;
-	u32 result;
+	int status, slot_num, func_num, shift = 0;
+	u32 result, base, addr;
 
-	status = nile4_pci_read_config_dword(dev, where & ~3, &result);
+	status = nile4_pci_read(bus, devfn, where & ~3, 4, &result);
 	if (status != PCIBIOS_SUCCESSFUL)
 		return status;
-	if (where & 2)
-		shift += 16;
-	result &= ~(0xffff << shift);
-	result |= val << shift;
-	return nile4_pci_write_config_dword(dev, where & ~3, result);
-}
-
-static int nile4_pci_write_config_byte(struct pci_dev *dev, int where,
-				       u8 val)
-{
-	int status, shift = 0;
-	u32 result;
-
-	status = nile4_pci_read_config_dword(dev, where & ~3, &result);
-	if (status != PCIBIOS_SUCCESSFUL)
-		return status;
-	if (where & 2)
-		shift += 16;
-	if (where & 1)
-		shift += 8;
-	result &= ~(0xff << shift);
-	result |= val << shift;
-	return nile4_pci_write_config_dword(dev, where & ~3, result);
+	switch (size) {
+		case 1:
+			if (where & 2)
+				shift += 16;
+			if (where & 1)
+				shift += 8;
+			result &= ~(0xff << shift);
+			result |= val << shift;
+			break;
+		case 2:
+			if (where & 2)
+				shift += 16;
+			result &= ~(0xffff << shift);
+			result |= val << shift;
+			break;
+		case 4:
+			/* Do we need to generate type 1 configure transaction? */
+			if (bus->number) {
+				/* FIXME - not working yet */
+				return PCIBIOS_FUNC_NOT_SUPPORTED;
+
+				/* the largest type 1 configuration addr is 16M, 
+				 * < 256M config space */
+				slot_num = 0;
+				addr = (bus->number << 16) | (devfn < 8) | 
+					where | 1;
+			} else {
+				slot_num = PCI_SLOT(devfn);
+				func_num = PCI_FUNC(devfn);
+				addr = (func_num << 8) + where;
+			}
+
+			base = nile4_pre_pci_access0(slot_num);
+			*(volatile u32 *) (base + addr) = val;
+			nile4_post_pci_access0();
+			return PCIBIOS_SUCCESSFUL;
+	}
+	return nile4_pci_write(bus, devfn, where & ~3, 4, result);
 }
 
 struct pci_ops nile4_pci_ops = {
-	nile4_pci_read_config_byte,
-	nile4_pci_read_config_word,
-	nile4_pci_read_config_dword,
-	nile4_pci_write_config_byte,
-	nile4_pci_write_config_word,
-	nile4_pci_write_config_dword
+	.read = 	nile4_pci_read,
+	.write = 	nile4_pci_write,
 };
 
 struct {

@@ -274,13 +235,13 @@
 
 			pci_pmu = dev;	/* for LEDs D2 and D3 */
 			/* Program the lines for LEDs D2 and D3 to output */
-			nile4_pci_read_config_byte(dev, 0x7d, &t8);
+			nile4_pci_read(dev->bus, dev->devfn, 0x7d, 1, &t8);
 			t8 |= 0xc0;
-			nile4_pci_write_config_byte(dev, 0x7d, t8);
+			nile4_pci_write(dev->bus, dev->devfn, 0x7d, 1, t8);
 			/* Turn LEDs D2 and D3 off */
-			nile4_pci_read_config_byte(dev, 0x7e, &t8);
+			nile4_pci_read(dev->bus, dev->devfn, 0x7e, 1, &t8);
 			t8 |= 0xc0;
-			nile4_pci_write_config_byte(dev, 0x7e, t8);
+			nile4_pci_write(dev->bus, dev->devfn, 0x7e, 1, t8);
 		} else if (dev->vendor == PCI_VENDOR_ID_AL &&
 			   dev->device == 0x5229) {
 			int i;

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.549 -> 1.550
# arch/sh/kernel/pci-dc.c 1.2 -> 1.3
# arch/sh/kernel/pci-sh7751.c 1.3 -> 1.4
# arch/sh/kernel/pci_st40.c 1.4 -> 1.5
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.550
# [PATCH] PCI: sh pci_ops changes
#

# sh pci ops changes
# --------------------------------------------
#
diff -Nru a/arch/sh/kernel/pci-dc.c b/arch/sh/kernel/pci-dc.c
--- a/arch/sh/kernel/pci-dc.c	Fri Aug 30 15:00:18 2002
+++ b/arch/sh/kernel/pci-dc.c	Fri Aug 30 15:00:18 2002
@@ -31,76 +31,57 @@
 	{0, 0, 0, NULL}
 };

-#define BBA_SELECTED(dev) (dev->bus->number==0 && dev->devfn==0) +#define BBA_SELECTED(bus,devfn) (bus->number==0 && devfn==0)

-static int gapspci_read_config_byte(struct pci_dev *dev, int where,
- u8 * val)
+static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val)
{
- if (BBA_SELECTED(dev))
- *val = inb(GAPSPCI_BBA_CONFIG+where);
- else
- *val = 0xff;
-
+ switch (size) {
+ case 1:
+ if (BBA_SELECTED(bus, devfn))
+ *val = (u8)inb(GAPSPCI_BBA_CONFIG+where);
+ else
+ *val = (u8)0xff;
+ break;
+ case 2:
+ if (BBA_SELECTED(bus, devfn))
+ *val = (u16)inw(GAPSPCI_BBA_CONFIG+where);
+ else
+ *val = (u16)0xffff;
+ break;
+ case 4:
+ if (BBA_SELECTED(bus, devfn))
+ *val = inl(GAPSPCI_BBA_CONFIG+where);
+ else
+ *val = 0xffffffff;
+ break;
+ }
return PCIBIOS_SUCCESSFUL;
}

-static int gapspci_read_config_word(struct pci_dev *dev, int where,
- u16 * val)
-{
- if (BBA_SELECTED(dev))
- *val = inw(GAPSPCI_BBA_CONFIG+where);
- else
- *val = 0xffff;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int gapspci_read_config_dword(struct pci_dev *dev, int where,
- u32 * val)
-{
- if (BBA_SELECTED(dev))
- *val = inl(GAPSPCI_BBA_CONFIG+where);
- else
- *val = 0xffffffff;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int gapspci_write_config_byte(struct pci_dev *dev, int where,
- u8 val)
-{
- if (BBA_SELECTED(dev))
- outb(val, GAPSPCI_BBA_CONFIG+where);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-
-static int gapspci_write_config_word(struct pci_dev *dev, int where,
- u16 val)
-{
- if (BBA_SELECTED(dev))
- outw(val, GAPSPCI_BBA_CONFIG+where);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int gapspci_write_config_dword(struct pci_dev *dev, int where,
- u32 val)
+static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
{
- if (BBA_SELECTED(dev))
- outl(val, GAPSPCI_BBA_CONFIG+where);
-
- return PCIBIOS_SUCCESSFUL;
+ if (BBA_SELECTED(bus, devfn)) {
+ switch (size) {
+ case 1:
+ if (BBA_SELECTED(bus, devfn))
+ outb((u8)val, GAPSPCI_BBA_CONFIG+where);
+ break;
+ case 2:
+ if (BBA_SELECTED(bus, devfn))
+ outw((u16)val, GAPSPCI_BBA_CONFIG+where);
+ break;
+ case 4:
+ if (BBA_SELECTED(bus, devfn))
+ outl(val, GAPSPCI_BBA_CONFIG+where);
+ break;
+ }
+ }
+ return PCIBIOS_SUCCESSFUL;
}

static struct pci_ops pci_config_ops = {

-        gapspci_read_config_byte,
-        gapspci_read_config_word,
-        gapspci_read_config_dword,
-        gapspci_write_config_byte,
-        gapspci_write_config_word,
-        gapspci_write_config_dword

+ .read = gapspci_read,
+ .write = gapspci_write,
};

@@ -143,7 +124,7 @@

for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) {
dev = pci_dev_b(ln);
- if (!BBA_SELECTED(dev)) continue;
+ if (!BBA_SELECTED(bus, dev->devfn)) continue;

printk("PCI: MMIO fixup to %s\n", dev->name); dev->resource[1].start=0x01001700;

diff -Nru a/arch/sh/kernel/pci-sh7751.c b/arch/sh/kernel/pci-sh7751.c
@@ -41,14 +41,14 @@
 #ifdef CONFIG_PCI_DIRECT
 
 
-#define CONFIG_CMD(dev, where) (0x80000000 | (dev->bus->number << 16) | (dev->devfn << 8) | (where & ~3))
+#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
 
 #define PCI_REG(reg) (SH7751_PCIREG_BASE+reg)
 
 /*
  * Functions for accessing PCI configuration space with type 1 accesses
  */
-static int pci_conf1_read_config_byte(struct pci_dev *dev, int where, u8 *value)
+static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
 {
 	u32 word;
 	unsigned long flags;

@@ -57,144 +57,88 @@
      * so we must do byte alignment by hand 
      */
 	save_and_cli(flags);
-	outl(CONFIG_CMD(dev,where), PCI_REG(SH7751_PCIPAR));
+	outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR));
 	word = inl(PCI_REG(SH7751_PCIPDR));
 	restore_flags(flags);
-	switch (where & 0x3) {
-	    case 3:
-		    *value = (u8)(word >> 24);
-			break;
-		case 2:
-		    *value = (u8)(word >> 16);
-			break;
-		case 1:
-		    *value = (u8)(word >> 8);
-			break;
-		default:
-		    *value = (u8)word;
-			break;
-    }
-	PCIDBG(4,"pci_conf1_read_config_byte@0x%08x=0x%x\n",
-	     CONFIG_CMD(dev,where),*value);
-	return PCIBIOS_SUCCESSFUL;
-}
 
-static int pci_conf1_read_config_word(struct pci_dev *dev, int where, u16 *value)
-{
-	u32 word;
-	unsigned long flags;
-
-    /* PCIPDR may only be accessed as 32 bit words, 
-     * so we must do word alignment by hand 
-     */
-	save_and_cli(flags);
-	outl(CONFIG_CMD(dev,where), PCI_REG(SH7751_PCIPAR));
-	word = inl(PCI_REG(SH7751_PCIPDR));
-	restore_flags(flags);
-	switch (where & 0x3) {
-	    case 3:
-		    // This should never happen...
-			printk(KERN_ERR "PCI BIOS: read_config_word: Illegal u16 alignment");
-	        return PCIBIOS_BAD_REGISTER_NUMBER;
-		case 2:
-		    *value = (u16)(word >> 16);
-			break;
+	switch (size) {
 		case 1:
-		    *value = (u16)(word >> 8);
-			break;
-		default:
-		    *value = (u16)word;
+			switch (where & 0x3) {
+				case 3:
+					*value = (u8)(word >> 24);
+					break;
+				case 2:
+					*value = (u8)(word >> 16);
+					break;
+				case 1:
+					*value = (u8)(word >> 8);
+					break;
+				default:
+					*value = (u8)word;
+					break;
+			}
+		case 2:
+			switch (where & 0x3) {
+				case 3: /*This should never happen.*/
+					printk(KERN_ERR "PCI BIOS: read_config: Illegal u16 alignment");
+					return PCIBIOS_BAD_REGISTER_NUMBER;
+				case 2:
+					*value = (u16)(word >> 16);
+					break;
+				case 1:
+					*value = (u16)(word >> 8);
+					break;
+				default:
+					*value = (u16)word;
+					break;
+			}
+		case 4:
+			*value = word;
 			break;
-    }
-	PCIDBG(4,"pci_conf1_read_config_word@0x%08x=0x%x\n",
-	     CONFIG_CMD(dev,where),*value);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_conf1_read_config_dword(struct pci_dev *dev, int where, u32 *value)
-{
-	unsigned long flags;
-	
-	save_and_cli(flags);
-	outl(CONFIG_CMD(dev,where), PCI_REG(SH7751_PCIPAR));
-	*value = inl(PCI_REG(SH7751_PCIPDR));
-	restore_flags(flags);
-	PCIDBG(4,"pci_conf1_read_config_dword@0x%08x=0x%x\n",
-	     CONFIG_CMD(dev,where),*value);
+	}
+	PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value); 
 	return PCIBIOS_SUCCESSFUL;    
 }
 
-static int pci_conf1_write_config_byte(struct pci_dev *dev, int where, u8 value)
+/* 
+ * Since SH7751 only does 32bit access we'll have to do a read,mask,write operation.  
+ * We'll allow an odd byte offset, though it should be illegal.
+ */ 
+static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
 {
-	u32 word;
-	u32 shift = (where & 3) * 8;
-	u32 mask = ((1 << 8) - 1) << shift;  // create the byte mask
+	u32 word,mask;
 	unsigned long flags;
-
-    /* Since SH7751 only does 32bit access we'll have to do a
-     * read,mask,write operation
-     */ 
-	save_and_cli(flags);
-	outl(CONFIG_CMD(dev,where), PCI_REG(SH7751_PCIPAR));
-	word = inl(PCI_REG(SH7751_PCIPDR)) ;
-	word &= ~mask;
-	word |= value << shift;
- 
-	outl(word, PCI_REG(SH7751_PCIPDR));
-	restore_flags(flags);
-	PCIDBG(4,"pci_conf1_write_config_byte@0x%08x=0x%x\n",
-	     CONFIG_CMD(dev,where),word);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_conf1_write_config_word(struct pci_dev *dev, int where, u16 value)
-{
-	u32 word;
 	u32 shift = (where & 3) * 8;
-	u32 mask = ((1 << 16) - 1) << shift;  // create the word mask
-	unsigned long flags;
 
-    /* Since SH7751 only does 32bit access we'll have to do a
-     * read,mask,write operation.  We'll allow an odd byte offset,
-	 * though it should be illegal.
-     */ 
-	if (shift == 24)
-	    return PCIBIOS_BAD_REGISTER_NUMBER;
-	save_and_cli(flags);
-	outl(CONFIG_CMD(dev,where), PCI_REG(SH7751_PCIPAR));
+	if(size == 1) {
+		mask = ((1 << 8) - 1) << shift;  // create the byte mask
+	} else if(size == 2){
+		if(shift == 24)
+			return PCIBIOS_BAD_REGISTER_NUMBER;           
+		mask = ((1 << 16) - 1) << shift;  // create the word mask
+	}
+	save_and_cli(flags);
+	outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR));
+	if(size == 4){
+		outl(value, PCI_REG(SH7751_PCIPDR));
+		restore_flags(flags);
+		PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
+		return PCIBIOS_SUCCESSFUL;
+	}
 	word = inl(PCI_REG(SH7751_PCIPDR)) ;
 	word &= ~mask;
 	word |= value << shift;
- 
-	outl(value, PCI_REG(SH7751_PCIPDR));
-	restore_flags(flags);
-	PCIDBG(4,"pci_conf1_write_config_word@0x%08x=0x%x\n",
-	     CONFIG_CMD(dev,where),word);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_conf1_write_config_dword(struct pci_dev *dev, int where, u32 value)
-{
-	unsigned long flags;
-
-	save_and_cli(flags);
-	outl(CONFIG_CMD(dev,where), PCI_REG(SH7751_PCIPAR));
-	outl(value, PCI_REG(SH7751_PCIPDR));
+	outl(word, PCI_REG(SH7751_PCIPDR));
 	restore_flags(flags);
-	PCIDBG(4,"pci_conf1_write_config_dword@0x%08x=0x%x\n",
-	     CONFIG_CMD(dev,where),value);
+	PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
 	return PCIBIOS_SUCCESSFUL;
 }
 
 #undef CONFIG_CMD
 
 static struct pci_ops pci_direct_conf1 = {
-	pci_conf1_read_config_byte,
-	pci_conf1_read_config_word,
-	pci_conf1_read_config_dword,
-	pci_conf1_write_config_byte,
-	pci_conf1_write_config_word,
-	pci_conf1_write_config_dword
+	.read =		pci_conf1_read,
+	.write = 	pci_conf1_write,
 };
 
 struct pci_ops * __init pci_check_direct(void)

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.550 -> 1.551
# arch/i386/pci/numa.c 1.8 -> 1.9
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.551
# [PATCH] Fixed NUMA-Q PCI patch
#
# This patch fixes a bug in NUMA-Q PCI code where the kernel can't find PCI

# devices on any node other than the first.
# --------------------------------------------
#
diff -Nru a/arch/i386/pci/numa.c b/arch/i386/pci/numa.c
--- a/arch/i386/pci/numa.c	Fri Aug 30 15:00:15 2002
+++ b/arch/i386/pci/numa.c	Fri Aug 30 15:00:15 2002
@@ -1,19 +1,19 @@
 /*
  * numa.c - Low-level PCI access for NUMA-Q machines
  */
+
 #include <linux/pci.h>
 #include <linux/init.h>
-
 #include "pci.h"

#define BUS2QUAD(global) (mp_bus_id_to_node[global])
#define BUS2LOCAL(global) (mp_bus_id_to_local[global]) #define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])

-#define PCI_CONF1_ADDRESS(bus, dev, fn, reg) \
+#define PCI_CONF1_MQ_ADDRESS(bus, dev, fn, reg) \
(0x80000000 | (BUS2LOCAL(bus) << 16) | (dev << 11) | (fn << 8) | (reg & ~3))

-static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) +static int __pci_conf1_mq_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
{
unsigned long flags;

@@ -22,7 +22,7 @@

spin_lock_irqsave(&pci_config_lock, flags);

- outl_quad(PCI_CONF1_ADDRESS(bus, dev, fn, reg), 0xCF8, BUS2QUAD(bus));
+ outl_quad(PCI_CONF1_MQ_ADDRESS(bus, dev, fn, reg), 0xCF8, BUS2QUAD(bus));

switch (len) {
case 1:
@@ -41,7 +41,7 @@
return 0;
}

-static int pci_conf1_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) +static int __pci_conf1_mq_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
{
unsigned long flags;

@@ -50,7 +50,7 @@

spin_lock_irqsave(&pci_config_lock, flags);

- outl_quad(PCI_CONF1_ADDRESS(bus, dev, fn, reg), 0xCF8, BUS2QUAD(bus));
+ outl_quad(PCI_CONF1_MQ_ADDRESS(bus, dev, fn, reg), 0xCF8, BUS2QUAD(bus));

switch (len) {
case 1:
@@ -69,6 +69,25 @@
return 0;
}

+#undef PCI_CONF1_MQ_ADDRESS
+
+static int pci_conf1_mq_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) +{
+ return __pci_conf1_mq_read(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
+}
+
+static int pci_conf1_mq_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) +{
+ return __pci_conf1_mq_write(0, bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where, size, value);
+}
+
+static struct pci_ops pci_direct_conf1_mq = {
+ read: pci_conf1_mq_read,
+ write: pci_conf1_mq_write
+};
+

static void __devinit pci_fixup_i450nx(struct pci_dev *d) {
@@ -102,8 +121,7 @@
{
int quad;

- pci_config_read = pci_conf1_read;
- pci_config_write = pci_conf1_write;
+ pci_root_ops = &pci_direct_conf1_mq;

if (pcibios_scanned++)
return 0;

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:

#	           ChangeSet	1.551   -> 1.552  
#	 drivers/pci/probe.c	1.8     -> 1.9    
#	 include/linux/pci.h	1.37    -> 1.38   
#	  drivers/pci/pool.c	1.5     -> 1.6    

#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.552
# [PATCH] show pci_pool stats in driverfs]
#
# This patch exposes basic allocation statistics for pci pools,

# very much like /proc/slabinfo but applying to DMA-consistent
# memory.  A file "pools" is created in the driverfs directory
# for the relevant pci device when the first pool is created, and
# removed when the last pool is destroyed.
# 
# Please merge to 2.5.latest.  If it matters, DaveM said it
# looks fine.  It produces sane output for all the 2.5.30
# USB host controller drivers.
# --------------------------------------------
#
diff -Nru a/drivers/pci/pool.c b/drivers/pci/pool.c
--- a/drivers/pci/pool.c	Fri Aug 30 15:00:12 2002
+++ b/drivers/pci/pool.c	Fri Aug 30 15:00:12 2002
@@ -17,18 +17,70 @@
 	size_t			allocation;
 	char			name [32];
 	wait_queue_head_t	waitq;
+	struct list_head	pools;
 };

struct pci_page { /* cacheable header for 'allocation' bytes */
struct list_head page_list;
void *vaddr;
dma_addr_t dma;
+ unsigned in_use;
unsigned long bitmap [0];
};

#define POOL_TIMEOUT_JIFFIES ((100 /* msec */ * HZ) / 1000)
#define POOL_POISON_BYTE 0xa7

+static spinlock_t pools_lock = SPIN_LOCK_UNLOCKED;
+
+static ssize_t
+show_pools (struct device *dev, char *buf, size_t count, loff_t off) +{
+ struct pci_dev *pdev;
+ unsigned long flags;
+ unsigned temp, size;
+ char *next;
+ struct list_head *i, *j;
+
+ if (off != 0)
+ return 0;
+
+ pdev = container_of (dev, struct pci_dev, dev);
+ next = buf;
+ size = count;
+
+ temp = snprintf (next, size, "poolinfo - 0.1\n");
+ size -= temp;
+ next += temp;
+
+ spin_lock_irqsave (&pools_lock, flags);
+ list_for_each (i, &pdev->pools) {
+ struct pci_pool *pool;
+ unsigned pages = 0, blocks = 0;
+
+ pool = list_entry (i, struct pci_pool, pools);
+
+ list_for_each (j, &pool->page_list) {
+ struct pci_page *page;
+
+ page = list_entry (j, struct pci_page, page_list);
+ pages++;
+ blocks += page->in_use;
+ }
+
+ /* per-pool info, no real statistics yet */
+ temp = snprintf (next, size, "%-16s %4u %4u %4u %2u\n",
+ pool->name,
+ blocks, pages * pool->blocks_per_page,
+ pool->size, pages);
+ size -= temp;
+ next += temp;
+ }
+ spin_unlock_irqrestore (&pools_lock, flags);
+
+ return count - size;
+}
+static DEVICE_ATTR (pools, "pools", S_IRUGO, show_pools, NULL);

/**
* pci_pool_create - Creates a pool of pci consistent memory blocks, for dma.
@@ -56,6 +108,7 @@
size_t size, size_t align, size_t allocation, int mem_flags)
{
struct pci_pool *retval;
+ unsigned long flags;

if (align == 0)
align = 1;
@@ -84,6 +137,17 @@
retval->name [sizeof retval->name - 1] = 0;

retval->dev = pdev;
+
+ if (pdev) {
+ spin_lock_irqsave (&pools_lock, flags);
+ /* note: not currently insisting "name" be unique */
+ if (list_empty (&pdev->pools))
+ device_create_file (&pdev->dev, &dev_attr_pools);
+ list_add (&retval->pools, &pdev->pools);
+ spin_unlock_irqrestore (&pools_lock, flags);
+ } else
+ INIT_LIST_HEAD (&retval->pools);
+
INIT_LIST_HEAD (&retval->page_list);
spin_lock_init (&retval->lock);
retval->size = size;
@@ -117,6 +181,7 @@
memset (page->vaddr, POOL_POISON_BYTE, pool->allocation);
#endif
list_add (&page->page_list, &pool->page_list);
+ page->in_use = 0;
} else {
kfree (page);
page = 0;
@@ -177,6 +242,13 @@
} else
pool_free_page (pool, page);
}
+
+ spin_lock (&pools_lock);
+ list_del (&pool->pools);
+ if (pool->dev && list_empty (&pool->dev->pools))
+ device_remove_file (&pool->dev->dev, &dev_attr_pools);
+ spin_unlock (&pools_lock);
+
spin_unlock_irqrestore (&pool->lock, flags);
kfree (pool);
}
@@ -243,6 +315,7 @@
clear_bit (0, &page->bitmap [0]);
offset = 0;
ready:
+ page->in_use++;
retval = offset + page->vaddr;
*handle = offset + page->dma;
done:
@@ -318,6 +391,7 @@
#endif

spin_lock_irqsave (&pool->lock, flags);
+ page->in_use--;
set_bit (block, &page->bitmap [map]);
if (waitqueue_active (&pool->waitq))
wake_up (&pool->waitq);

diff -Nru a/drivers/pci/probe.c b/drivers/pci/probe.c
@@ -364,6 +364,7 @@
 
 	sprintf(dev->slot_name, "%02x:%02x.%d", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
 	sprintf(dev->name, "PCI device %04x:%04x", dev->vendor, dev->device);
+	INIT_LIST_HEAD(&dev->pools);
 	
 	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
 	class >>= 8;				    /* upper 3 bytes */

diff -Nru a/include/linux/pci.h b/include/linux/pci.h
@@ -359,6 +359,7 @@
 					   0xffffffff.  You only need to change
 					   this if your device has broken DMA
 					   or supports 64-bit transfers.  */
+	struct list_head pools;		/* pci_pools tied to this device */
 
 	u32             current_state;  /* Current operating state. In ACPI-speak,
 					   this is D0-D3, D0 being fully functional,

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.552 -> 1.553
# drivers/pci/pool.c 1.6 -> 1.7
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 02/08/30 [email protected] 1.553
# PCI: compile time fix for the pci pool patch.
# --------------------------------------------
#

diff -Nru a/drivers/pci/pool.c b/drivers/pci/pool.c
@@ -80,7 +80,7 @@
 
 	return count - size;
 }
-static DEVICE_ATTR (pools, "pools", S_IRUGO, show_pools, NULL);
+static DEVICE_ATTR (pools, S_IRUGO, show_pools, NULL);
 
 /**
  * pci_pool_create - Creates a pool of pci consistent memory blocks, for dma.

Here's the arm fixup. I didn't try to change the iop310-pci.c file, as it looked trickier than I wanted to attempt (it is using dev->sysdata, which isn't available anymore.)

thanks,

greg k-h

diff -Nru a/arch/arm/kernel/plx90x0.c b/arch/arm/kernel/plx90x0.c
@@ -34,9 +34,9 @@
 #define PLX_SET_CONFIG							\
 	{ unsigned long flags;						\
 	local_irq_save(flags);						\
-	__raw_writel((1<<31 | (dev->bus->number << 16)			\
-		| (dev->devfn << 8) | (where & ~3)			\
-		| ((dev->bus->number == 0)?0:1)), PLX_BASE + 0xac);	\
+	__raw_writel((1<<31 | (bus->number << 16)			\
+		| (devfn << 8) | (where & ~3)				\
+		| ((bus->number == 0)?0:1)), PLX_BASE + 0xac);		\
 
 #define PLX_CONFIG_WRITE(size)						\
 	PLX_SET_CONFIG							\

@@ -58,47 +58,47 @@
 
 /* Configuration space access routines */
 
-static int
-plx90x0_read_config_byte (struct pci_dev *dev,
-			  int where, u8 *value)
-{
-	PLX_CONFIG_READ(b)
-}
-
-static int
-plx90x0_read_config_word (struct pci_dev *dev,
-			  int where, u16 *value)
-{
-	PLX_CONFIG_READ(w)
-}
-
-static int 
-plx90x0_read_config_dword (struct pci_dev *dev,
-			   int where, u32 *value)
-{
-	PLX_CONFIG_READ(l)
-}
-
 static int 
-plx90x0_write_config_byte (struct pci_dev *dev,
-			   int where, u8 value)
+plx90x0_read_config (struct pci_bus *bus, unsigned int devfn, int where,
+		     int where, int size, u32 *value)
 {
-	PLX_CONFIG_WRITE(b)
+	switch (size) {
+	case 1:
+		PLX_CONFIG_READ(b)
+		break;
+	case 2:
+		PLX_CONFIG_READ(w)
+		break;
+	case 4:
+		PLX_CONFIG_READ(l)
+		break;
+	}
+	return PCIBIOS_SUCCESSFUL;
 }
 
 static int 
-plx90x0_write_config_word (struct pci_dev *dev,
-			   int where, u16 value)
+plx90x0_write_config (struct pci_bus *bus, unsigned int devfn, int where,
+		      int where, int size, u32 value)
 {
-	PLX_CONFIG_WRITE(w)
+	switch (size) {
+	case 1:
+		PLX_CONFIG_WRITE(b)
+		break;
+	case 2:
+		PLX_CONFIG_WRITE(w)
+		break;
+	case 4:
+		PLX_CONFIG_WRITE(l)
+		break;
+	}
+	return PCIBIOS_SUCCESSFUL;
 }
 
-static int 
-plx90x0_write_config_dword (struct pci_dev *dev,
-			    int where, u32 value)
+static struct pci_ops plx90x0_ops = 
 {
-	PLX_CONFIG_WRITE(l)
-}
+	.read =		plx90x0_read_config,
+	.write =	plx90x0_write_config,
+};
 
 static void 
 plx_syserr_handler(int irq, void *handle, struct pt_regs *regs)

@@ -107,17 +107,6 @@
 	       readw(PLX_BASE + 6), regs->ARM_pc);
 	__raw_writew(0xf000, PLX_BASE + 6);
 }
-
-static struct pci_ops 
-plx90x0_ops = 
-{
-	plx90x0_read_config_byte,
-	plx90x0_read_config_word,
-	plx90x0_read_config_dword,
-	plx90x0_write_config_byte,
-	plx90x0_write_config_word,
-	plx90x0_write_config_dword,
-};
 
 /*
  * Initialise the PCI system.

Here's the patch for sparc64. David, please apply to your tree.

thanks,

greg k-h

diff -Nru a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
@@ -258,56 +258,25 @@
 		 PCI_SLOT(devfn) > 8));
 }
 
-static int __sabre_read_byte(struct pci_dev *dev, int where, u8 *value)
+static int __sabre_read(struct pci_bus *bus_dev, unsigned int devfn,
+			int where, int size, u32 *value)
 {
-	struct pci_pbm_info *pbm = pci_bus2pbm[dev->bus->number];
-	unsigned char bus = dev->bus->number;
-	unsigned int devfn = dev->devfn;
-	u8 *addr;
-
-	*value = 0xff;
-	addr = sabre_pci_config_mkaddr(pbm, bus, devfn, where);
-	if (!addr)
-		return PCIBIOS_SUCCESSFUL;
-
-	if (__sabre_out_of_range(pbm, bus, devfn))
-		return PCIBIOS_SUCCESSFUL;
-	pci_config_read8(addr, value);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int __sabre_read_word(struct pci_dev *dev, int where, u16 *value)
-{
-	struct pci_pbm_info *pbm = pci_bus2pbm[dev->bus->number];
-	unsigned char bus = dev->bus->number;
-	unsigned int devfn = dev->devfn;
-	u16 *addr;
-
-	*value = 0xffff;
-	addr = sabre_pci_config_mkaddr(pbm, bus, devfn, where);
-	if (!addr)
-		return PCIBIOS_SUCCESSFUL;
-
-	if (__sabre_out_of_range(pbm, bus, devfn))
-		return PCIBIOS_SUCCESSFUL;
+	struct pci_pbm_info *pbm = pci_bus2pbm[bus_dev->number];
+	unsigned char bus = bus_dev->number;
+	u32 *addr;
 
-	if (where & 0x01) {
-		printk("pcibios_read_config_word: misaligned reg [%x]\n",
-		       where);
-		return PCIBIOS_SUCCESSFUL;
+	switch (size) {
+	case 1:
+		*value = 0xff;
+		break;
+	case 2:
+		*value = 0xffff;
+		break;
+	case 4:
+		*value = 0xffffffff;
+		break;
 	}
-	pci_config_read16(addr, value);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int __sabre_read_dword(struct pci_dev *dev, int where, u32 *value)
-{
-	struct pci_pbm_info *pbm = pci_bus2pbm[dev->bus->number];
-	unsigned char bus = dev->bus->number;
-	unsigned int devfn = dev->devfn;
-	u32 *addr;
 
-	*value = 0xffffffff;
 	addr = sabre_pci_config_mkaddr(pbm, bus, devfn, where);
 	if (!addr)
 		return PCIBIOS_SUCCESSFUL;

@@ -315,86 +284,97 @@
 	if (__sabre_out_of_range(pbm, bus, devfn))
 		return PCIBIOS_SUCCESSFUL;
 
-	if (where & 0x03) {
-		printk("pcibios_read_config_dword: misaligned reg [%x]\n",
-		       where);
-		return PCIBIOS_SUCCESSFUL;
-	}
-	pci_config_read32(addr, value);
-	return PCIBIOS_SUCCESSFUL;
-}
+	switch (size) {
+	case 1:
+		pci_config_read8(addr, value);
+		break;
 
-static int sabre_read_byte(struct pci_dev *dev, int where, u8 *value)
-{
-	if (dev->bus->number)
-		return __sabre_read_byte(dev, where, value);
+	case 2:
+		if (where & 0x01) {
+			printk("pci_read_config_word: misaligned reg [%x]\n",
+			       where);
+			return PCIBIOS_SUCCESSFUL;
+		}
+		pci_config_read16(addr, value);
+		break;
 
-	if (sabre_out_of_range(dev->devfn)) {
-		*value = 0xff;
-		return PCIBIOS_SUCCESSFUL;
+	case 4:
+		if (where & 0x03) {
+			printk("pci_read_config_dword: misaligned reg [%x]\n",
+			       where);
+			return PCIBIOS_SUCCESSFUL;
+		}
+		pci_config_read32(addr, value);
+		break;
 	}
 
-	if (where < 8) {
-		u16 tmp;
-
-		__sabre_read_word(dev, where & ~1, &tmp);
-		if (where & 1)
-			*value = tmp >> 8;
-		else
-			*value = tmp & 0xff;
-		return PCIBIOS_SUCCESSFUL;
-	} else
-		return __sabre_read_byte(dev, where, value);
+	return PCIBIOS_SUCCESSFUL;
 }
 
-static int sabre_read_word(struct pci_dev *dev, int where, u16 *value)
+static int sabre_read(struct pci_bus *bus, unsigned int devfn,
+		      int where, int size, u32 *value)
 {
-	if (dev->bus->number)
-		return __sabre_read_word(dev, where, value);
+	if (bus->number)
+		return __sabre_read(bus, devfn, where, size, value);
 
-	if (sabre_out_of_range(dev->devfn)) {
-		*value = 0xffff;
+	if (sabre_out_of_range(devfn)) {
+		switch (size) {
+		case 1:
+			*value = 0xff;
+			break;
+		case 2:
+			*value = 0xffff;
+			break;
+		case 4:
+			*value = 0xffffffff;
+			break;
+		}
 		return PCIBIOS_SUCCESSFUL;
 	}
 
-	if (where < 8)
-		return __sabre_read_word(dev, where, value);
-	else {
-		u8 tmp;
+	switch (size) {
+	case 1:
+		if (where < 8) {
+			u16 tmp;
+
+			__sabre_read(bus, devfn, where & ~1, 2, &tmp);
+			if (where & 1)
+				*value = tmp >> 8;
+			else
+				*value = tmp & 0xff;
+		} else
+			return __sabre_read(bus, devfn, where, 1, value);
+		break;
+
+	case 2:
+		if (where < 8)
+			return __sabre_read(bus, devfn, where, 2, value);
+		else {
+			u8 tmp;
+
+			__sabre_read(bus, devfn, where, 1, &tmp);
+			*value = tmp;
+			__sabre_read(bus, devfn, where + 1, 1, &tmp);
+			*value |= tmp << 8;
+		}
+		break;
 
-		__sabre_read_byte(dev, where, &tmp);
+	case 4:
+		sabre_read(bus, devfn, where, 2, &tmp);
 		*value = tmp;
-		__sabre_read_byte(dev, where + 1, &tmp);
-		*value |= tmp << 8;
-		return PCIBIOS_SUCCESSFUL;
+		sabre_read(bus, devfn, where + 2, 2, &tmp);
+		*value |= tmp << 16;
+		break;
 	}
-}
-
-static int sabre_read_dword(struct pci_dev *dev, int where, u32 *value)
-{
-	u16 tmp;
-
-	if (dev->bus->number)
-		return __sabre_read_dword(dev, where, value);
-
-	if (sabre_out_of_range(dev->devfn)) {
-		*value = 0xffffffff;
-		return PCIBIOS_SUCCESSFUL;
-	}
-
-	sabre_read_word(dev, where, &tmp);
-	*value = tmp;
-	sabre_read_word(dev, where + 2, &tmp);
-	*value |= tmp << 16;
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static int __sabre_write_byte(struct pci_dev *dev, int where, u8 value)
+static int __sabre_write(struct pci_bus *bus_dev, unsigned int devfn,
+			 int where, int size, u32 value)
 {
-	struct pci_pbm_info *pbm = pci_bus2pbm[dev->bus->number];
-	unsigned char bus = dev->bus->number;
-	unsigned int devfn = dev->devfn;
-	u8 *addr;
+	struct pci_pbm_info *pbm = pci_bus2pbm[bus_dev->number];
+	unsigned char bus = bus_dev->number;
+	u32 *addr;
 
 	addr = sabre_pci_config_mkaddr(pbm, bus, devfn, where);
 	if (!addr)

@@ -402,117 +382,79 @@
 
 	if (__sabre_out_of_range(pbm, bus, devfn))
 		return PCIBIOS_SUCCESSFUL;
-	pci_config_write8(addr, value);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int __sabre_write_word(struct pci_dev *dev, int where, u16 value)
-{
-	struct pci_pbm_info *pbm = pci_bus2pbm[dev->bus->number];
-	unsigned char bus = dev->bus->number;
-	unsigned int devfn = dev->devfn;
-	u16 *addr;
-
-	addr = sabre_pci_config_mkaddr(pbm, bus, devfn, where);
-	if (!addr)
-		return PCIBIOS_SUCCESSFUL;
 
-	if (__sabre_out_of_range(pbm, bus, devfn))
-		return PCIBIOS_SUCCESSFUL;
+	switch (size) {
+	case 1:
+		pci_config_write8(addr, (u8 *)value);
+		break;
+
+	case 2:
+		if (where & 0x01) {
+			printk("pci_write_config_word: misaligned reg [%x]\n",
+			       where);
+			return PCIBIOS_SUCCESSFUL;
+		}
+		pci_config_write16(addr, (u16 *)value);
+		break;
 
-	if (where & 0x01) {
-		printk("pcibios_write_config_word: misaligned reg [%x]\n",
-		       where);
-		return PCIBIOS_SUCCESSFUL;
+	case 4:
+		if (where & 0x03) {
+			printk("pci_write_config_dword: misaligned reg [%x]\n",
+			       where);
+			return PCIBIOS_SUCCESSFUL;
+		}
+		pci_config_write32(addr, value);
+		break;
 	}
-	pci_config_write16(addr, value);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int __sabre_write_dword(struct pci_dev *dev, int where, u32 value)
-{
-	struct pci_pbm_info *pbm = pci_bus2pbm[dev->bus->number];
-	unsigned char bus = dev->bus->number;
-	unsigned int devfn = dev->devfn;
-	u32 *addr;
 
-	addr = sabre_pci_config_mkaddr(pbm, bus, devfn, where);
-	if (!addr)
-		return PCIBIOS_SUCCESSFUL;
-
-	if (__sabre_out_of_range(pbm, bus, devfn))
-		return PCIBIOS_SUCCESSFUL;
-
-	if (where & 0x03) {
-		printk("pcibios_write_config_dword: misaligned reg [%x]\n",
-		       where);
-		return PCIBIOS_SUCCESSFUL;
-	}
-	pci_config_write32(addr, value);
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static int sabre_write_byte(struct pci_dev *dev, int where, u8 value)
+static int sabre_write(struct pci_bus *bus, unsigned int devfn,
+		       int where, int size, u32 value)
 {
-	if (dev->bus->number)
-		return __sabre_write_byte(dev, where, value);
+	if (bus->number)
+		return __sabre_write(bus, devfn, where, size, value);
 
-	if (sabre_out_of_range(dev->devfn))
+	if (sabre_out_of_range(devfn))
 		return PCIBIOS_SUCCESSFUL;
 
-	if (where < 8) {
-		u16 tmp;
+	switch (size) {
+	case 1:
+		if (where < 8) {
+			u16 tmp;
 
-		__sabre_read_word(dev, where & ~1, &tmp);
-		if (where & 1) {
-			value &= 0x00ff;
-			value |= tmp << 8;
-		} else {
-			value &= 0xff00;
-			value |= tmp;
-		}
-		return __sabre_write_word(dev, where & ~1, tmp);
-	} else
-		return __sabre_write_byte(dev, where, value);
-}
-
-static int sabre_write_word(struct pci_dev *dev, int where, u16 value)
-{
-	if (dev->bus->number)
-		return __sabre_write_word(dev, where, value);
-
-	if (sabre_out_of_range(dev->devfn))
-		return PCIBIOS_SUCCESSFUL;
-
-	if (where < 8)
-		return __sabre_write_word(dev, where, value);
-	else {
-		__sabre_write_byte(dev, where, value & 0xff);
-		__sabre_write_byte(dev, where + 1, value >> 8);
-		return PCIBIOS_SUCCESSFUL;
+			__sabre_read(bus, devfn, where & ~1, 2, &tmp);
+			if (where & 1) {
+				value &= 0x00ff;
+				value |= tmp << 8;
+			} else {
+				value &= 0xff00;
+				value |= tmp;
+			}
+			return __sabre_write(bus, devfn, where & ~1, 2, tmp);
+		} else
+			return __sabre_write(bus, devfn, where, 1, value);
+		break;
+	case 2:
+		if (where < 8)
+			return __sabre_write(bus, devfn, where, 2, value);
+		else {
+			__sabre_write(dev, devfn, where, 1, value & 0xff);
+			__sabre_write(bus, devfn, where + 1, 1, value >> 8);
+		}
+		break;
+	case 4:
+		sabre_write(bus, devfn, where, 2, value & 0xffff);
+		sabre_write(dev, devfn, where + 2, 2, value >> 16);
+		break;
 	}
-}
-
-static int sabre_write_dword(struct pci_dev *dev, int where, u32 value)
-{
-	if (dev->bus->number)
-		return __sabre_write_dword(dev, where, value);
-
-	if (sabre_out_of_range(dev->devfn))
-		return PCIBIOS_SUCCESSFUL;
-
-	sabre_write_word(dev, where, value & 0xffff);
-	sabre_write_word(dev, where + 2, value >> 16);
 	return PCIBIOS_SUCCESSFUL;
 }
 
 static struct pci_ops sabre_ops = {
-	sabre_read_byte,
-	sabre_read_word,
-	sabre_read_dword,
-	sabre_write_byte,
-	sabre_write_word,
-	sabre_write_dword
+	.read =		sabre_read,
+	.write =	sabre_write,
 };
 
 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)

And here's the patch for sparc. I am guessing that it should go to you too.

thanks,

greg k-h

diff -Nru a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
@@ -196,36 +196,34 @@
 static int pcic_read_config_dword(struct pci_dev *dev, int where, u32 *value);
 static int pcic_write_config_dword(struct pci_dev *dev, int where, u32 value);
 
-static int pcic_read_config_byte(struct pci_dev *dev, int where, u8 *value)
+static int pcic_read_config(struct pci_bus *bus, unsigned int devfn,
+			    int where, int size, u32 *value)
 {
 	unsigned int v;
+	unsigned char busnum = bus->number;
+	struct linux_pcic *pcic;
+	unsigned long flags;
+	/* unsigned char where; */
 
-	pcic_read_config_dword(dev, where&~3, &v);
-	*value = 0xff & (v >> (8*(where & 3)));
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcic_read_config_word(struct pci_dev *dev, int where, u16 *value)
-{
-	unsigned int v;
-	if (where&1) return PCIBIOS_BAD_REGISTER_NUMBER;
-
-	pcic_read_config_dword(dev, where&~3, &v);
-	*value = 0xffff & (v >> (8*(where & 3)));
-	return PCIBIOS_SUCCESSFUL;
-}
+	switch (size) {
+	case 1:
+		pcic_read_config(bus, devfn, where&~3, 4, &v);
+		*value = 0xff & (v >> (8*(where & 3)));
+		return PCIBIOS_SUCCESSFUL;
+		break;
 
-static int pcic_read_config_dword(struct pci_dev *dev, int where, u32 *value)
-{
-	unsigned char bus = dev->bus->number;
-	unsigned char device_fn = dev->devfn;
-	/* unsigned char where; */
+	case 2:
+		if (where&1) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	struct linux_pcic *pcic;
-	unsigned long flags;
+		pcic_read_config(bus, devfn, where&~3, 4, &v);
+		*value = 0xffff & (v >> (8*(where & 3)));
+		return PCIBIOS_SUCCESSFUL;
+		break;
+	}
 
+	/* size == 4, i.e. dword */
 	if (where&3) return PCIBIOS_BAD_REGISTER_NUMBER;
-	if (bus != 0) return PCIBIOS_DEVICE_NOT_FOUND;
+	if (busnum != 0) return PCIBIOS_DEVICE_NOT_FOUND;
 	pcic = &pcic0;
 
 	save_and_cli(flags);

@@ -233,7 +231,7 @@
 	pcic_speculative = 1;
 	pcic_trapped = 0;
 #endif
-	writel(CONFIG_CMD(bus,device_fn,where), pcic->pcic_config_space_addr);
+	writel(CONFIG_CMD(busnum,devfn,where), pcic->pcic_config_space_addr);
 #if 0 /* does not fail here */
 	nop();
 	if (pcic_trapped) {

@@ -257,52 +255,46 @@
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static int pcic_write_config_byte(struct pci_dev *dev, int where, u8 value)
-{
-	unsigned int v;
-
-	pcic_read_config_dword(dev, where&~3, &v);
-        v = (v & ~(0xff << (8*(where&3)))) |
-            ((0xff&(unsigned)value) << (8*(where&3)));
-	return pcic_write_config_dword(dev, where&~3, v);
-}
-
-static int pcic_write_config_word(struct pci_dev *dev, int where, u16 value)
+static int pcic_write_config(struct pci_bus *bus, unsigned int devfn,
+			     int where, int size, u32 value)
 {
 	unsigned int v;
-
-	if (where&1) return PCIBIOS_BAD_REGISTER_NUMBER;
-	pcic_read_config_dword(dev, where&~3, &v);
-	v = (v & ~(0xffff << (8*(where&3)))) |
-	    ((0xffff&(unsigned)value) << (8*(where&3)));
-	return pcic_write_config_dword(dev, where&~3, v);
-}
-
-static int pcic_write_config_dword(struct pci_dev *dev, int where, u32 value)
-{
-	unsigned char bus = dev->bus->number;
-	unsigned char devfn = dev->devfn;
+	unsigned char busnum = bus->number;
 	struct linux_pcic *pcic;
 	unsigned long flags;
 
+	switch (size) {
+	case 1:
+		pcic_read_config(bus, devfn, where&~3, 4, &v);
+	        v = (v & ~(0xff << (8*(where&3)))) |
+	            ((0xff&(unsigned)value) << (8*(where&3)));
+		return pcic_write_config(bus, devfn, where&~3, 4, v);
+		break;
+
+	case 2:
+		if (where&1) return PCIBIOS_BAD_REGISTER_NUMBER;
+		pcic_read_config(bus, devfn, where&~3, 4, &v);
+		v = (v & ~(0xffff << (8*(where&3)))) |
+		    ((0xffff&(unsigned)value) << (8*(where&3)));
+		return pcic_write_config(bus, devfn, where&~3, 4, v);
+		break;
+	}
+
+	/* size == 4, i.e. dword */
 	if (where&3) return PCIBIOS_BAD_REGISTER_NUMBER;
-	if (bus != 0) return PCIBIOS_DEVICE_NOT_FOUND;
+	if (busnum != 0) return PCIBIOS_DEVICE_NOT_FOUND;
 	pcic = &pcic0;
 
 	save_and_cli(flags);
-	writel(CONFIG_CMD(bus,devfn,where), pcic->pcic_config_space_addr);
+	writel(CONFIG_CMD(busnum,devfn,where), pcic->pcic_config_space_addr);
 	writel(value, pcic->pcic_config_space_data + (where&4));
 	restore_flags(flags);
 	return PCIBIOS_SUCCESSFUL;
 }
 
 static struct pci_ops pcic_ops = {
-	pcic_read_config_byte,
-	pcic_read_config_word,
-	pcic_read_config_dword,
-	pcic_write_config_byte,
-	pcic_write_config_word,
-	pcic_write_config_dword,
+	.read =		pcic_read_config,
+	.write =	pcic_write_config,
 };
 
 /*

From: Greg KH <[email protected]>
Date: Fri, 30 Aug 2002 15:28:57 -0700

And here's the patch for sparc. I am guessing that it should go to you too.

Yeah, doesn't hurt :-)

From: Greg KH <[email protected]>
Date: Fri, 30 Aug 2002 15:26:43 -0700

Here's the patch for sparc64. David, please apply to your tree.

As soon as the pci_ops cleanup hits Linus's tree, I certainly will, thanks a lot Greg.