PC-9800 architecture (CORE only)
RFC PATCH 1/1 PC-9800 architecture (CORE only)
This is a part of big patchset for support PC-9800 architecture, one of i386 sub architectures.
Core part cleanup has done. (But device drivers are still working.) Many "#if" are killed by using "mach-xxx" framework.
If someone pick up this, we are very happy.
Comments are always welcome. Please tell me.
Beat regards
Osamu Tomita [email protected]
patch:
arch/i386/Makefile +15 -3
@@ -46,8 +46,14 @@ ifdef CONFIG_VISWS MACHINE := mach-visws else +ifdef CONFIG_PC9800 +MACHINE := mach-pc9800 +else +ifndef MACHINE MACHINE := mach-generic endif +endif +endif HEAD := arch/i386/kernel/head.o arch/i386/kernel/init_task.o
@@ -63,15 +69,20 @@ CFLAGS += -Iarch/i386/$(MACHINE) AFLAGS += -Iarch/i386/$(MACHINE) -makeboot = $(call descend,arch/i386/boot,$(1)) +ifndef CONFIG_PC9800 +ARCHDIR=arch/i386/boot +else +ARCHDIR=arch/i386/boot98 +endif +makeboot = $(call descend,$(ARCHDIR),$(1)) .PHONY: zImage bzImage compressed zlilo bzlilo zdisk bzdisk install \ clean archclean archmrproper all: bzImage -BOOTIMAGE=arch/i386/boot/bzImage -zImage zlilo zdisk: BOOTIMAGE=arch/i386/boot/zImage +BOOTIMAGE=$(ARCHDIR)/bzImage +zImage zlilo zdisk: BOOTIMAGE=$(ARCHDIR)/zImage zImage bzImage: vmlinux +@$(call makeboot,$(BOOTIMAGE))
@@ -89,5 +100,6 @@ archclean: $(MAKE) -rR -f scripts/Makefile.clean obj=arch/i386/boot + $(MAKE) -rR -f scripts/Makefile.clean obj=arch/i386/boot98 archmrproper:
arch/i386/config.in +18 -1
@@ -271,6 +271,7 @@ mainmenu_option next_comment comment 'Bus options (PCI, PCMCIA, EISA, MCA, ISA)' +bool 'NEC PC-9801/PC-9821 support' CONFIG_PC9800 # Visual Workstation support is utterly broken. # If you want to see it working mail an VW540 to [email protected] 8) #bool 'SGI Visual Workstation support' CONFIG_VISWS
@@ -303,9 +304,13 @@ source drivers/pci/Config.in bool 'ISA support' CONFIG_ISA +if [ "$CONFIG_PC9800" != "y" ]; then dep_bool 'EISA support' CONFIG_EISA $CONFIG_ISA +else + define_bool CONFIG_EISA n +fi -if [ "$CONFIG_VISWS" != "y" ]; then +if [ "$CONFIG_VISWS" != "y" -a "$CONFIG_PC9800" != "y" ]; then bool 'MCA support' CONFIG_MCA else define_bool CONFIG_MCA n
@@ -425,11 +430,20 @@ if [ "$CONFIG_VT" = "y" ]; then mainmenu_option next_comment comment 'Console drivers' + if [ "$CONFIG_PC9800" = "y" ]; then + bool 'PC-9800 GDC text console' CONFIG_GDC_CONSOLE + dep_bool ' Enable 32-bit access to text video RAM' CONFIG_GDC_32BITACCESS $CONFIG_GDC_CONSOLE + else bool 'VGA text console' CONFIG_VGA_CONSOLE bool 'Video mode selection support' CONFIG_VIDEO_SELECT if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then tristate 'MDA text console (dual-headed) (EXPERIMENTAL)' CONFIG_MDA_CONSOLE + fi + fi + if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + if [ "$CONFIG_PC9800" != "y" -o "$CONFIG_GDC_CONSOLE" = "y" ]; then source drivers/video/Config.in + fi fi endmenu fi
@@ -466,6 +480,9 @@ bool ' Highmem debugging' CONFIG_DEBUG_HIGHMEM fi bool ' Load all symbols for debugging/kksymoops' CONFIG_KALLSYMS + if [ "$CONFIG_PC9800" = "y" ]; then + bool ' Save kernel messages into UCG-RAM' CONFIG_PC9800_UCGLOG + fi fi if [ "$CONFIG_X86_LOCAL_APIC" = "y" ]; then
arch/i386/kernel/Makefile +4 -0
@@ -10,6 +10,10 @@ ptrace.o i8259.o ioport.o ldt.o setup.o time.o sys_i386.o \ pci-dma.o i386_ksyms.o i387.o bluesmoke.o dmi_scan.o \ bootflag.o +ifeq ($(CONFIG_PC9800),y) +export-objs += pc9800_debug.o +obj-$(CONFIG_PC9800) += pc9800_debug.o +endif obj-y += cpu/ obj-y += timers/
arch/i386/kernel/cpu/proc.c +1 -1
@@ -76,7 +76,7 @@seq_printf (m,"cache size\t: %d KB\n" , c->x86_cache_size);/* We use exception 16 if we have hardware math and we've either seen it or the CPU claims it is internal */ - fpu_exception = c->hard_math && (ignore_irq13 || cpu_has_fpu); + fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu);seq_printf (m,"fdiv_bug\t: %s\n" "hlt_bug\t\t: %s\n" "f00f_bug\t: %s\n"
arch/i386/kernel/i8259.c +55 -45
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arch/i386/kernel/pc9800_debug.c +362 -0
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arch/i386/kernel/reboot.c +2 -16
@@ -8,6 +8,7 @@#include <linux/interrupt.h> #include <linux/mc146818rtc.h> #include <asm/uaccess.h> +#include "mach_reboot.h" /* * Power off function, if any
@@ -125,15 +126,6 @@ 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ }; -static inline void kb_wait (void ) -{ -int i; - -for (i=0 ; i<0x10000 ; i++) -if ((inb_p (0x64 ) &0x02 ) ==0 ) -break ; -} -/* * Switch to real mode and then execute the code * specified by the code and length parameters.
@@ -264,13 +256,7 @@/* rebooting needs to touch the page at absolute addr 0 */ *((unsigned short *)__va (0x472 )) = reboot_mode;for (;;) { -int i; -for (i=0 ; i<100 ; i++) { -kb_wait (); -udelay (50 ); -outb (0xfe ,0x64 );/* pulse reset low */ -udelay (50 ); - } +mach_reboot ();/* That didn't work - force a triple fault.. */ __asm__ __volatile__("lidt %0" : :"m" (no_idt)); __asm__ __volatile__("int3" );
arch/i386/kernel/setup.c +8 -95
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arch/i386/kernel/time.c +17 -98
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arch/i386/kernel/timers/timer_pit.c +15 -7
@@ -13,6 +13,7 @@extern spinlock_t i8259A_lock;extern spinlock_t i8253_lock;#include "do_timer.h" +#include "io_ports.h" static int init_pit (void ) {
@@ -61,7 +62,8 @@ {int count; -static int count_p =LATCH ;/* for the first call after boot */ +static int count_p; +static int is_1st_boot =1 ;/* for the first call after boot */ static unsigned long jiffies_p =0 ;/*
@@ -69,12 +71,18 @@*/ unsigned long jiffies_t; +/* for support LATCH is not constant */ +if (is_1st_boot) { + is_1st_boot =0 ; + count_p =LATCH ; + } +/* gets recalled with irq locally disabled */ spin_lock (&i8253_lock);/* timer count may underflow right here */ -outb_p (0x00 ,0x43 );/* latch the count ASAP */ +outb_p (0x00 ,PIT_MODE );/* latch the count ASAP */ - count =inb_p (0x40 );/* read the latched count */ + count =inb_p (PIT_CH0 );/* read the latched count */ /* * We do this guaranteed double memory access instead of a _p
@@ -82,13 +90,13 @@*/ jiffies_t = jiffies; - count |=inb_p (0x40 ) <<8 ; + count |=inb_p (PIT_CH0 ) <<8 ;/* VIA686a test code... reset the latch if count > max + 1 */ if (count >LATCH ) { -outb_p (0x34 ,0x43 ); -outb_p (LATCH &0xff ,0x40 ); -outb (LATCH >>8 ,0x40 ); +outb_p (0x34 ,PIT_MODE ); +outb_p (LATCH &0xff ,PIT_CH0 ); +outb (LATCH >>8 ,PIT_CH0 ); count =LATCH -1 ; }
arch/i386/kernel/timers/timer_tsc.c +6 -82
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arch/i386/kernel/traps.c +10 -11
@@ -49,6 +49,8 @@#include <linux/irq.h> #include <linux/module.h> +#include "mach_traps.h" + asmlinkage int system_call(void); asmlinkage void lcall7(void); asmlinkage void lcall27(void);
@@ -449,11 +451,10 @@printk ("You probably have a hardware problem with your RAM chips\n" );/* Clear and disable the memory parity error line. */ - reason = (reason &0xf ) |4 ; -outb (reason,0x61 ); +clear_mem_error (reason); } -static void io_check_error (unsigned char reason,struct pt_regs * regs) +static inline void io_check_error (unsigned char reason,struct pt_regs * regs) {unsigned long i;
@@ -487,8 +488,9 @@static void default_do_nmi (struct pt_regs * regs) { -unsigned char reason =inb (0x61 ); +unsigned char reason; + reason =get_nmi_reason ();if (!(reason &0xc0 )) {#if CONFIG_X86_LOCAL_APIC /*
@@ -506,15 +508,12 @@if (reason &0x80 )mem_parity_error (reason, regs);if (reason &0x40 ) -io_check_error (reason, regs); +HANDLE_REASON_0X40 (reason, regs);/* * Reassert NMI in case it became active meanwhile * as it's edge-triggered. */ -outb (0x8f ,0x70 ); -inb (0x71 );/* dummy */ -outb (0x0f ,0x70 ); -inb (0x71 );/* dummy */ +reassert_nmi (); }static int dummy_nmi_callback (struct pt_regs * regs,int cpu)
@@ -697,7 +696,7 @@ asmlinkage void do_coprocessor_error(struct pt_regs * regs, long error_code) { - ignore_irq13 =1 ; + ignore_fpu_irq =1 ;math_error ((void *)regs->eip); }
@@ -754,7 +753,7 @@ {if (cpu_has_xmm) {/* Handle SIMD FPU exceptions on PIII+ processors. */ - ignore_irq13 =1 ; + ignore_fpu_irq =1 ;simd_math_error ((void *)regs->eip); }else {/*
arch/i386/kernel/vm86.c +17 -4
@@ -30,6 +30,7 @@* */ +#include <linux/config.h> #include <linux/errno.h> #include <linux/sched.h> #include <linux/kernel.h>
@@ -732,10 +733,22 @@free_vm86_irq (i); } +#ifndef CONFIG_PC9800 +# define ILLEGAL_IRQ (irq) ((irq) < 3 || (irq) > 15) +# define FIRST_VM86_IRQ 3 +#else +/* +* On PC-9800, slave PIC is wired master PIC's IR7, +* so that we don't allow vm86 to grab IRQ7. +*/ +# define ILLEGAL_IRQ (irq) ((irq) < 2 || (irq) == 7 || (irq) > 15) +# define FIRST_VM86_IRQ 2 +#endif +static inline void handle_irq_zombies (void ) {int i; -for (i=3 ; i<16 ; i++) { +for (i=FIRST_VM86_IRQ ; i<16 ; i++) {if (vm86_irqs[i].tsk) {if (task_valid (vm86_irqs[i].tsk))continue ;free_vm86_irq (i);
@@ -748,7 +761,7 @@int bit;unsigned long flags; -if ( (irqnumber<3 ) || (irqnumber>15 ) )return 0 ; +if (ILLEGAL_IRQ (irqnumber))return 0 ;if (vm86_irqs[irqnumber].tsk != current)return 0 ;spin_lock_irqsave (&irqbits_lock, flags); bit = irqbits & (1 << irqnumber);
@@ -774,7 +787,7 @@handle_irq_zombies ();if (!capable (CAP_SYS_ADMIN ))return -EPERM ;if (!((1 << sig) &ALLOWED_SIGS ))return -EPERM ; -if ( (irq<3 ) || (irq>15 ) )return -EPERM ; +if (ILLEGAL_IRQ (irq))return -EPERM ;if (vm86_irqs[irq].tsk)return -EPERM ; ret =request_irq (irq, &irq_handler,0 ,VM86_IRQNAME ,0 );if (ret)return ret;
@@ -784,7 +797,7 @@ }case VM86_FREE_IRQ : {handle_irq_zombies (); -if ( (irqnumber<3 ) || (irqnumber>15 ) )return -EPERM ; +if (ILLEGAL_IRQ (irqnumber))return -EPERM ;if (!vm86_irqs[irqnumber].tsk)return 0 ;if (vm86_irqs[irqnumber].tsk != current)return -EPERM ;free_vm86_irq (irqnumber);
arch/i386/mach-generic/calibrate_tsc.h +88 -0
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arch/i386/mach-generic/io_ports.h +30 -0
@@ -0,0 +1,30 @@ +/* +* arch/i386/mach-generic/io_ports.h +* +* Machine specific IO port address definition for generic. +* Written by Osamu Tomita <[email protected]> +*/ +#ifndef _MACH_IO_PORTS_H +#define _MACH_IO_PORTS_H + +/* i8253A PIT registers */ +#define PIT_MODE 0x43 +#define PIT_CH0 0x40 +#define PIT_CH2 0x42 + +/* i8259A PIC registers */ +#define PIC_MASTER_CMD 0x20 +#define PIC_MASTER_IMR 0x21 +#define PIC_MASTER_ISR PIC_MASTER_CMD +#define PIC_MASTER_POLL PIC_MASTER_ISR +#define PIC_MASTER_OCW3 PIC_MASTER_ISR +#define PIC_SLAVE_CMD 0xa0 +#define PIC_SLAVE_IMR 0xa1 + +/* i8259A PIC related value */ +#define PIC_CASCADE_IR 2 +#define MASTER_ICW4_DEFAULT 0x01 +#define SLAVE_ICW4_DEFAULT 0x01 +#define PIC_ICW4_AEOI 2 + +#endif /* !_MACH_IO_PORTS_H */
arch/i386/mach-generic/mach_reboot.h +30 -0
@@ -0,0 +1,30 @@ +/* +* arch/i386/mach-generic/mach_reboot.h +* +* Machine specific reboot functions for generic. +* Split out from reboot.c by Osamu Tomita <[email protected]> +*/ +#ifndef _MACH_REBOOT_H +#define _MACH_REBOOT_H + +static inline void kb_wait (void ) +{ +int i; + +for (i =0 ; i <0x10000 ; i++) +if ((inb_p (0x64 ) &0x02 ) ==0 ) +break ; +} + +static inline void mach_reboot (void ) +{ +int i; +for (i =0 ; i <100 ; i++) { +kb_wait (); +udelay (50 ); +outb (0xfe ,0x64 );/* pulse reset low */ +udelay (50 ); + } +} + +#endif /* !_MACH_REBOOT_H */
arch/i386/mach-generic/mach_resources.h +113 -0
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arch/i386/mach-generic/mach_time.h +122 -0
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arch/i386/mach-generic/mach_traps.h +31 -0
@@ -0,0 +1,31 @@ +/* +* arch/i386/mach-generic/mach_traps.h +* +* Machine specific NMI handling for generic. +* Split out from traps.c by Osamu Tomita <[email protected]> +*/ +#ifndef _MACH_TRAPS_H +#define _MACH_TRAPS_H + +#define HANDLE_REASON_0X40 (reason, regs) io_check_error(reason, regs) + +static inline void clear_mem_error (unsigned char reason) +{ + reason = (reason &0xf ) |4 ; +outb (reason,0x61 ); +} + +static inline unsigned char get_nmi_reason (void ) +{ +return inb (0x61 ); +} + +static inline void reassert_nmi (void ) +{ +outb (0x8f ,0x70 ); +inb (0x71 );/* dummy */ +outb (0x0f ,0x70 ); +inb (0x71 );/* dummy */ +} + +#endif /* !_MACH_TRAPS_H */
arch/i386/mach-pc9800/Makefile +15 -0
@@ -0,0 +1,15 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +# Note 2! The CFLAGS definitions are now in the main makefile... + +EXTRA_CFLAGS += -I../kernel +export-objs := + +obj-y := setup.o + +include $(TOPDIR)/Rules.make
arch/i386/mach-pc9800/calibrate_tsc.h +73 -0
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arch/i386/mach-pc9800/do_timer.h +80 -0
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arch/i386/mach-pc9800/entry_arch.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/entry_arch.h"
arch/i386/mach-pc9800/io_ports.h +30 -0
@@ -0,0 +1,30 @@ +/* +* arch/i386/mach-pc9800/io_ports.h +* +* Machine specific IO port address definition for PC-9800. +* Written by Osamu Tomita <[email protected]> +*/ +#ifndef _MACH_IO_PORTS_H +#define _MACH_IO_PORTS_H + +/* i8253A PIT registers */ +#define PIT_MODE 0x77 +#define PIT_CH0 0x71 +#define PIT_CH2 0x75 + +/* i8259A PIC registers */ +#define PIC_MASTER_CMD 0x00 +#define PIC_MASTER_IMR 0x02 +#define PIC_MASTER_ISR PIC_MASTER_CMD +#define PIC_MASTER_POLL PIC_MASTER_ISR +#define PIC_MASTER_OCW3 PIC_MASTER_ISR +#define PIC_SLAVE_CMD 0x08 +#define PIC_SLAVE_IMR 0x0a + +/* i8259A PIC related values */ +#define PIC_CASCADE_IR 7 +#define MASTER_ICW4_DEFAULT 0x1d +#define SLAVE_ICW4_DEFAULT 0x09 +#define PIC_ICW4_AEOI 0x02 + +#endif /* !_MACH_IO_PORTS_H */
arch/i386/mach-pc9800/irq_vectors.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/irq_vectors.h"
arch/i386/mach-pc9800/mach_apic.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_apic.h"
arch/i386/mach-pc9800/mach_reboot.h +21 -0
@@ -0,0 +1,21 @@ +/* +* arch/i386/mach-pc9800/mach_reboot.h +* +* Machine specific reboot functions for PC-9800. +* Written by Osamu Tomita <[email protected]> +*/ +#ifndef _MACH_REBOOT_H +#define _MACH_REBOOT_H + +#ifdef CMOS_WRITE +#undef CMOS_WRITE +#define CMOS_WRITE (a,b) do{}while(0) +#endif + +static inline void mach_reboot (void ) +{ +outb (0 ,0xf0 );/* signal CPU reset */ +mdelay (1 ); +} + +#endif /* !_MACH_REBOOT_H */
arch/i386/mach-pc9800/mach_resources.h +106 -0
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arch/i386/mach-pc9800/mach_time.h +136 -0
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arch/i386/mach-pc9800/mach_traps.h +29 -0
@@ -0,0 +1,29 @@ +/* +* arch/i386/mach-pc9800/mach_traps.h +* +* Machine specific NMI handling for PC-9800. +* Written by Osamu Tomita <[email protected]> +*/ +#ifndef _MACH_TRAPS_H +#define _MACH_TRAPS_H + +#define HANDLE_REASON_0X40 (reason, regs) mem_parity_error(reason, regs) + +static inline void clear_mem_error (unsigned char reason) +{ +outb (0x08 ,0x37 ); +outb (0x09 ,0x37 ); +} + +static inline unsigned char get_nmi_reason (void ) +{ +return inb (0x33 ) <<5 ; +} + +static inline void reassert_nmi (void ) +{ +outb (0x09 ,0x50 );/* disable NMI once */ +outb (0x09 ,0x52 );/* re-enable it */ +} + +#endif /* !_MACH_TRAPS_H */
arch/i386/mach-pc9800/setup.c +113 -0
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arch/i386/mach-pc9800/setup_arch_post.h +29 -0
@@ -0,0 +1,29 @@ +/** +* machine_specific_memory_setup - Hook for machine specific memory setup. +* +* Description: +* This is included late in kernel/setup.c so that it can make +* use of all of the static functions. +**/ + +static inline char *__init machine_specific_memory_setup (void ) +{ +char *who; +unsigned long low_mem_size, lower_high, higher_high; + + + who ="BIOS (common area)" ; + + low_mem_size = ((*(unsigned char *)__va (PC9800SCA_BIOS_FLAG ) &7 ) +1 ) <<17 ; +add_memory_region (0 , low_mem_size,1 ); + lower_high = (__u32) *(__u8 *)bus_to_virt (PC9800SCA_EXPMMSZ ) <<17 ; + higher_high = (__u32) *(__u16 *)bus_to_virt (PC9800SCA_MMSZ16M ) <<20 ; +if (lower_high !=0x00f00000UL ) { +add_memory_region (HIGH_MEMORY , lower_high,1 ); +add_memory_region (0x01000000UL , higher_high,1 ); + } +else +add_memory_region (HIGH_MEMORY , lower_high + higher_high,1 ); + +return who; +}
arch/i386/mach-pc9800/setup_arch_pre.h +36 -0
@@ -0,0 +1,36 @@ +/* Hook to call BIOS initialisation function */ + +/* no action for generic */ + +#define ARCH_SETUP arch_setup_pc9800(); + +#include <linux/timex.h> +#include <asm/io.h> +#include <asm/pc9800.h> +#include <asm/pc9800_sca.h> + +int CLOCK_TICK_RATE ; +unsigned long tick_usec;/* ACTHZ period (usec) */ +unsigned long tick_nsec;/* USER_HZ period (nsec) */ +unsigned char pc9800_misc_flags; +/* (bit 0) 1:High Address Video ram exists 0:otherwise */ + +#ifdef CONFIG_SMP +#define MPC_TABLE_SIZE 512 +#define MPC_TABLE ((char *) (PARAM+0x400)) +char mpc_table[MPC_TABLE_SIZE ]; +#endif + +static inline void arch_setup_pc9800 (void ) +{ +CLOCK_TICK_RATE =PC9800_8MHz_P () ?1996800 :2457600 ; +printk (KERN_DEBUG "CLOCK_TICK_RATE = %d\n" ,CLOCK_TICK_RATE ); + tick_usec =TICK_USEC ;/* ACTHZ period (usec) */ + tick_nsec =TICK_NSEC (TICK_USEC );/* USER_HZ period (nsec) */ + + pc9800_misc_flags =PC9800_MISC_FLAGS ; +#ifdef CONFIG_SMP +if ((*(u32 *)(MPC_TABLE )) ==0x504d4350 ) +memcpy (mpc_table,MPC_TABLE , *(u16 *)(MPC_TABLE +4 )); +#endif /* CONFIG_SMP */ +}
arch/i386/mach-pc9800/smpboot_hooks.h +33 -0
@@ -0,0 +1,33 @@ +/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws +* which needs to alter them. */ + +static inline void smpboot_clear_io_apic_irqs (void ) +{ + io_apic_irqs =0 ; +} + +static inline void smpboot_setup_warm_reset_vector (void ) +{ +/* +* Install writable page 0 entry to set BIOS data area. +*/ +local_flush_tlb (); + +/* +* Paranoid: Set warm reset code and vector here back +* to default values. +*/ +outb (0x0f ,0x37 );/* SHUT0 = 1 */ + + *((volatile long *)phys_to_virt (0x404 )) =0 ; +} + +static inline void smpboot_setup_io_apic (void ) +{ +/* +* Here we can be sure that there is an IO-APIC in the system. Let's +* go and set it up: +*/ +if (!skip_ioapic_setup && nr_ioapics) +setup_IO_APIC (); +}
arch/i386/mach-summit/calibrate_tsc.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/calibrate_tsc.h"
arch/i386/mach-summit/io_ports.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/io_ports.h"
arch/i386/mach-summit/mach_reboot.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_reboot.h"
arch/i386/mach-summit/mach_resources.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_resources.h"
arch/i386/mach-summit/mach_time.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_time.h"
arch/i386/mach-summit/mach_traps.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_traps.h"
arch/i386/mach-visws/calibrate_tsc.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/calibrate_tsc.h"
arch/i386/mach-visws/io_ports.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/io_ports.h"
arch/i386/mach-visws/mach_reboot.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_reboot.h"
arch/i386/mach-visws/mach_resources.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_resources.h"
arch/i386/mach-visws/mach_time.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_time.h"
arch/i386/mach-visws/mach_traps.h +1 -0
@@ -0,0 +1 @@ +#include "../mach-generic/mach_traps.h"
Quoted 6 lines · Osamu Tomita
This is a part of big patchset for support PC-9800 architecture, one of i386 sub architectures.
Core part cleanup has done. (But device drivers are still working.) Many "#if" are killed by using "mach-xxx" framework.
If someone pick up this, we are very happy.
Comments are always welcome. Please tell me.
Ok, you asked for it :))
arch/i386/kernel/i8259.c line 416
Quoted 8 lines
arch/i386/kernel/i8259.c +5
-1if (boot_cpu_data.hard_math && !cpu_has_fpu) -setup_irq (13 , &irq13); +#ifndef CONFIG_PC9800 +setup_irq (13 , &fpu_irq); +#else +setup_irq (8 , &fpu_irq); +#endif }
May be this should be done this way (with FPU_IRQ_NUMBER hidden in the arch specific header):
- setup_irq(13, &irq13);
+ setup_irq(FPU_IRQ_NUMBER, &fpu_irq);
Quoted 1 line
diff -urN
linux/arch/i386/kernel/pc9800_debug.clinux98/arch/i386/kernel/pc9800_debug.c
Why this file is not in mach-pc9800 directory ?
And what is IORESOURCE98_SPARSE flag in mach-pc9800/mach_resources.h file ?
Signature · 2 lines
Andrey Panin | Embedded systems software developer [email protected] | PGP key: wwwkeys.eu.pgp.net
Thanks for comment.
Quoted 24 lines · Andrey Panin
Quoted 1 line · Osamu Tomita
This is a part of big patchset for support PC-9800 architecture, one
of i386
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sub architectures.
Core part cleanup has done. (But device drivers are still working.) Many "#if" are killed by using "mach-xxx" framework.
If someone pick up this, we are very happy.
Comments are always welcome. Please tell me.Ok, you asked for it :))
arch/i386/kernel/i8259.c line 416
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if (boot_cpu_data.hard_math && !cpu_has_fpu)arch/i386/kernel/i8259.c +5
-1-setup_irq (13 , &irq13); +#ifndef CONFIG_PC9800 +setup_irq (13 , &fpu_irq); +#else +setup_irq (8 , &fpu_irq); +#endif }May be this should be done this way (with
FPU_IRQ_NUMBERhidden in the arch specific header):
Review
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(quoted diff) +1
-1- setup_irq(13, &irq13); + setup_irq(FPU_IRQ_NUMBER, &fpu_irq);
Thanks. I'll rewrite this way.
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diff -urN
linux/arch/i386/kernel/pc9800_debug.c
linux98/arch/i386/kernel/pc9800_debug.cWhy this file is not in mach-pc9800 directory ?
This module provides new feature.
We can write debugging messages to PC-9800's NVRAM.
I don't know PC's CMOS can be used for this purpose, or not. But, if other subarchtecture has usable space in NVRAM,
I assume scenario as follows.
rewrite some codes in pc9800_debug.c and put them mach-xxx directory, then split out codes for PC-9800 and move them into mach-pc9800 direcory.
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And what is
IORESOURCE98_SPARSEflag inmach-pc9800/mach_resources.hfile ?
IORESOURCE98_SPARSE flag means odd or even only addressing. We modify check_region(), request_region() and release_region(). If length parameter has negative value, addressing is sparse. For example,
request_region(0x100, -5, "xxx"); gets 0x100, 0x102 and 0x104.
Regards
Osamu Tomita [email protected]
Quoted 5 lines · Osamu Tomita
IORESOURCE98_SPARSEflag means odd or even only addressing. We modifycheck_region(),request_region()andrelease_region(). If length parameter has negative value, addressing is sparse. For example,
request_region(0x100, -5, "xxx"); gets0x100,0x102and0x104.
Does PC-9800 ever have devices on 0x100/2/4/8 overlapping another device on 0x101/103/105 ?
Quoted 10 lines · Alan Cox
Quoted 5 lines · Osamu Tomita
IORESOURCE98_SPARSEflag means odd or even only addressing. We modifycheck_region(),request_region()andrelease_region(). If length parameter has negative value, addressing is sparse. For example,
request_region(0x100, -5, "xxx"); gets0x100,0x102and0x104.Does PC-9800 ever have devices on 0x100/2/4/8 overlapping another device on 0x101/103/105 ?
Yes.
Here is io resource definition for PC-9800. (extract from patch)
struct resource standard_io_resources[] = {
{ "pic1", 0x00, 0x02, IORESOURCE_BUSY | IORESOURCE98_SPARSE},
{ "dma", 0x01, 0x2d, IORESOURCE_BUSY | IORESOURCE98_SPARSE },
{ "pic2", 0x08, 0x0a, IORESOURCE_BUSY | IORESOURCE98_SPARSE },
{ "calender clock", 0x20, 0x22, IORESOURCE98_SPARSE },PIC1 uses 0x00 and 0x02.
DMA controler uses 0x01, 0x03, 0x05,....0x2d.
PIC2 uses 0x08 and 0x0a.
RTC uses 0x20 and 0x22.
They are overlapping.
Regards
Osamu Tomita
Quoted 18 lines · Osamu Tomita
Quoted 10 lines · Alan Cox
Quoted 5 lines · Osamu Tomita
IORESOURCE98_SPARSEflag means odd or even only addressing. We modifycheck_region(),request_region()andrelease_region(). If length parameter has negative value, addressing is sparse. For example,
request_region(0x100, -5, "xxx"); gets0x100,0x102and0x104.Does PC-9800 ever have devices on 0x100/2/4/8 overlapping another device on 0x101/103/105 ?
Yes.
Here is io resource definition for PC-9800. (extract from patch)struct resource standard_io_resources[] = { { "pic1", 0x00, 0x02, IORESOURCE_BUSY | IORESOURCE98_SPARSE}, { "dma", 0x01, 0x2d, IORESOURCE_BUSY | IORESOURCE98_SPARSE }, { "pic2", 0x08, 0x0a, IORESOURCE_BUSY | IORESOURCE98_SPARSE }, { "calender clock", 0x20, 0x22, IORESOURCE98_SPARSE },
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PIC1 uses
0x00and0x02.
DMA controler uses0x01,0x03, 0x05,....0x2d.
PIC2 uses0x08and0x0a.
RTC uses0x20and0x22.
They are overlapping.
For system resources you simply could allocate 0x00-0x2f and be done without the sparse flag, but if there are any other devices that have overlapping resources, which need separate drivers (IDE, sound, network, ...) then the sparse ioresource flag is indeed needed. Is it so?
Signature · 2 lines
Vojtech Pavlik SuSE Labs
Quoted 4 lines · Vojtech Pavlik
For system resources you simply could allocate 0x00-0x2f and be done without the sparse flag, but if there are any other devices that have overlapping resources, which need separate drivers (IDE, sound, network, ...) then the sparse ioresource flag is indeed needed. Is it so?
Possibly although this is not an entirely unique problem. The other way would be (post 2.6) to add a mask. That will also let us properly handle the PCI/ISA partial decode for example.
Quoted 9 lines · Alan Cox
Quoted 4 lines · Vojtech Pavlik
For system resources you simply could allocate 0x00-0x2f and be done without the sparse flag, but if there are any other devices that have overlapping resources, which need separate drivers (IDE, sound, network, ...) then the sparse ioresource flag is indeed needed. Is it so?
Possibly although this is not an entirely unique problem. The other way would be (post 2.6) to add a mask. That will also let us properly handle the PCI/ISA partial decode for example.
Indeed.
Signature · 2 lines
Vojtech Pavlik SuSE Labs
A message that is not in the archive (sent off-list or not yet received): [email protected]
Thanks for comment.
Quoted 5 lines · Ingo Oeser
Quoted 2 lines · Osamu Tomita
This is a part of big patchset for support PC-9800 architecture, one of i386 sub architectures.
I'm courious, what the PC-9800 architecture is.
Please visit our web page. We put summary information there.
http://www.kmc.gr.jp/proj/linux98/index-english.html
PC-9800 has support hardware for japanese language, so in 80's many people use PC-9800 to run "Word processor" applications. Recently, PC-9800 is mostly used as network client in enterprise, goverment or school.
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Core part cleanup has done. (But device drivers are still working.) Many "#if" are killed by using "mach-xxx" framework.
If someone pick up this, we are very happy.
Comments are always welcome. Please tell me.This patch is a good spring cleanup of
arch/i386. You nicely replace many "magic hex values" with defines. That makes it very readable for other arch maintainers and even for the i386 maintainers.Good work!
Thanks, But other components need much more cleanup, sigh...
Best regards
Osamu Tomita [email protected]