cpci patch for kernel 2.4.19 bug
From: "Yang, Harold" <[email protected]>
Quoted 10 lines
Hi, Scott & Greg:
I have applied the cpci patch for kernel 2.4.19, and test it thoroughly on ZT5084 platform. Two bugs are found:
1. In my ZT5084, the driver can't correctly detect the cPCI Hot Swap bridge device. Two DEC21154 exist on ZT5084, however, only one is the right bridge. The driver can't distinguish them correctly.
I just got a couple of ZT5541 peripheral master boards and can finally see what happens when an enumerable board is plugged into a ZT5084 chassis using a ZT5550 system master board.
As of yet I have only tried a 2.5.54 kernel, but I see the same problems along with some other wacky behavior that I am trying to isolate.
Now about the multiple DEC21154 devices ==> on my ZT5550 that is in system master mode, the first DEC21154 device is a bridge for the slots to the left of the system slots, and the second DEC21154 is a bridge for the right of the system slots.
So if I boot the system master (I'll talk about problems with hotswaping in another email) with a peripheral board plugged into one of the slots on the right of the master using the current 2.5.54 kernel then I run into problems the first time cpci_hotplug_core.c::check_slots() runs because it only looks at the first bus when trying to find the card that caused the #ENUM.
The following patch will register each of the cpci busses instead of just the first one detected.
NOTE: I'm a little worried that the right way to do this is to
properly initialize the RSS bits, or at least see how the chassis is configured via the RSS bits to determine which cpci bus to register. The ZT5084 doesn't have near as many configurations as newer designs like the ZT5088.
===== cpcihp_zt5550.c 1.1 vs edited =====
cpcihp_zt5550.c renamed from drivers/hotplug/cpcihp_zt5550.c +9 -12
@@ -191,6 +191,7 @@ const struct pci_device_id *ent) {int status; +struct pci_dev *tmp =0 ; status =zt5550_hc_config (pdev);if (status !=0 ) {
@@ -220,20 +221,16 @@ }dbg ("registered controller" ); -/* Look for first device matching cPCI bus's bridge vendor and device IDs */ -if (!(bus0_dev =pci_find_device (PCI_VENDOR_ID_DEC , -PCI_DEVICE_ID_DEC_21154 ,NULL ))) { - status = -ENODEV ; - goto init_register_error; - } - bus0 = bus0_dev->subordinate; +while (tmp =pci_find_device (PCI_VENDOR_ID_DEC , +PCI_DEVICE_ID_DEC_21154 , tmp)) { +if (cpci_hp_register_bus (tmp->subordinate,0x0a ,0x0f )) { +err ("could not register cPCI hotplug bus #%i" , + tmp->subordinate); +continue ; + } - status =cpci_hp_register_bus (bus0,0x0a ,0x0f ); -if (status !=0 ) { -err ("could not register cPCI hotplug bus" ); - goto init_register_error; +dbg ("registered bus #%i" , tmp->subordinate); } -dbg ("registered bus" ); status =cpci_hp_start ();if (status !=0 ) {
Quoted 17 lines · Rusty Lynch
From: "Yang, Harold" <[email protected]>
Quoted 10 lines
Hi, Scott & Greg:
I have applied the cpci patch for kernel 2.4.19, and test it thoroughly on ZT5084 platform. Two bugs are found:
1. In my ZT5084, the driver can't correctly detect the cPCI Hot Swap bridge device. Two DEC21154 exist on ZT5084, however, only one is the right bridge. The driver can't distinguish them correctly.
I just got a couple of ZT5541 peripheral master boards and can finally see what happens when an enumerable board is plugged into a ZT5084 chassis using a ZT5550 system master board.
Quoted 8 lines
As of yet I have only tried a 2.5.54 kernel, but I see the same problems along with some other wacky behavior that I am trying to isolate.
Now about the multiple DEC21154 devices ==> on my ZT5550 that is in system master mode, the first DEC21154 device is a bridge for the slots to the left of the system slots, and the second DEC21154 is a bridge for the right of the system slots.
Okay, that's what I originally wanted to determine from the lspci output I requested when Harold mentioned this problem at the end of November.
Quoted 7 lines
So if I boot the system master (I'll talk about problems with hotswaping in another email) with a peripheral board plugged into one of the slots on the right of the master using the current 2.5.54 kernel then I run into problems the first time
cpci_hotplug_core.c::check_slots()runs because it only looks at the first bus when trying to find the card that caused the #ENUM.
I assume by problems you mean that the cPCI event thread gets shut down (which is what I'd expect), or do you mean something more severe?
Quoted 2 lines
The following patch will register each of the cpci busses instead of just the first one detected.
Your patch is better than Harold's hack, but I'm probably going to try and think of some other alternative, as the while loop idea doesn't handle the possibility of someone having a 21154 bridge on a PMC card or actually as a bridge on a cPCI card. The original code doesn't really handle that possiblity either, so I'll need to cook up something better anyway.
Quoted 5 lines
NOTE: I'm a little worried that the right way to do this is to
properly initialize the RSS bits, or at least see how the chassis is configured via the RSS bits to determine which cpci bus to register. The ZT5084 doesn't have near as many configurations as newer designs like the ZT5088.
[snip]
I will investigate reading the active bus(es) out of the HC, as I've gotten the documentation for the HC from Performance Tech, I was just too busy before Christmas to dig into it then. I'll try and have something that attempts to handle your ZT5084 chassis done in a few days.
Scott
Signature · 4 lines
Scott Murray SOMA Networks, Inc. Toronto, Ontario e-mail: [email protected]
From: "Scott Murray" <[email protected]>
Quoted 23 lines · Rusty Lynch
Quoted 22 lines
From: "Yang, Harold" <[email protected]>
Quoted 10 lines
Hi, Scott & Greg:
I have applied the cpci patch for kernel 2.4.19, and test it thoroughly on ZT5084 platform. Two bugs are found:
1. In my ZT5084, the driver can't correctly detect the cPCI Hot Swap bridge device. Two DEC21154 exist on ZT5084, however, only one is the right bridge. The driver can't distinguish them correctly.
I just got a couple of ZT5541 peripheral master boards and can finally see what happens when an enumerable board is plugged into a ZT5084 chassis using a ZT5550 system master board.
As of yet I have only tried a 2.5.54 kernel, but I see the same problems along with some other wacky behavior that I am trying to isolate.
Quoted 9 lines
Quoted 4 lines
Now about the multiple DEC21154 devices ==> on my ZT5550 that is in system master mode, the first DEC21154 device is a bridge for the slots to the left of the system slots, and the second DEC21154 is a bridge for the right of the system slots.
Okay, that's what I originally wanted to determine from the lspci output I requested when Harold mentioned this problem at the end of November.
I am attaching output for:
1. lspci -vvv
2. cat /proc/ioports
3. cat /proc/iomem
For a ZT5550 running as system master in the second system slot of a ZT5084 chassis that has two ZT5541 (peripherial master) boards plugged in (one to the left of the sytem slots and the other to the right of the system slots.)
Quoted 8 lines
Quoted 7 lines
So if I boot the system master (I'll talk about problems with hotswaping in another email) with a peripheral board plugged into one of the slots on the right of the master using the current 2.5.54 kernel then I run into problems the first time
cpci_hotplug_core.c::check_slots()runs because it only looks at the first bus when trying to find the card that caused the #ENUM.
Quoted 4 lines
I assume by problems you mean that the cPCI event thread gets shut down (which is what I'd expect), or do you mean something more severe?
The event thread shutsdown with the
"cannot find ENUM# source, shutting down" error message. That's all.
Quoted 17 lines
Quoted 2 lines
The following patch will register each of the cpci busses instead of just the first one detected.
Your patch is better than Harold's hack, but I'm probably going to try and think of some other alternative, as the while loop idea doesn't handle the possibility of someone having a 21154 bridge on a PMC card or actually as a bridge on a cPCI card. The original code doesn't really handle that possiblity either, so I'll need to cook up something better anyway.
Quoted 5 lines
NOTE: I'm a little worried that the right way to do this is to
properly initialize the RSS bits, or at least see how the chassis is configured via the RSS bits to determine which cpci bus to register. The ZT5084 doesn't have near as many configurations as newer designs like the ZT5088.[snip]
Quoted 7 lines
I will investigate reading the active bus(es) out of the HC, as I've gotten the documentation for the HC from Performance Tech, I was just too busy before Christmas to dig into it then. I'll try and have something that attempts to handle your ZT5084 chassis done in a few days.
Scott
00:00.0 Host bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 03)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
Latency: 64
Region 0: Memory at f8000000 (32-bit, prefetchable) [size=64M]
Capabilities: <available only to root>
00:01.0 PCI bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 03) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 128 Bus: primary=00, secondary=01, subordinate=01, sec-latency=64 I/O behind bridge: 0000f000-00000fff Memory behind bridge: f5000000-f5ffffff Prefetchable memory behind bridge: fff00000-000fffff BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B+
00:05.0 Ethernet controller: Digital Equipment Corporation DECchip 21142/43 (rev 41)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 165 (5000ns min, 10000ns max), cache line size 08
Interrupt: pin A routed to IRQ 11
Region 0: I/O ports at 1080 [size=128]
Region 1: Memory at f4001000 (32-bit, non-prefetchable) [size=1K]
Expansion ROM at <unassigned> [disabled] [size=256K]
00:06.0 Ethernet controller: Digital Equipment Corporation DECchip 21142/43 (rev 41)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 165 (5000ns min, 10000ns max), cache line size 08
Interrupt: pin A routed to IRQ 10
Region 0: I/O ports at 1400 [size=128]
Region 1: Memory at f4001400 (32-bit, non-prefetchable) [size=1K]
Expansion ROM at <unassigned> [disabled] [size=256K]
00:07.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 02)
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0
00:07.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) (prog-if 80 [Master])
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64 Region 4: I/O ports at 14a0 [size=16]
00:07.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01) (prog-if 00 [UHCI])
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64
Interrupt: pin D routed to IRQ 9
Region 4: I/O ports at 1060 [size=32]
00:07.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02)
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin ? routed to IRQ 9
00:08.0 PCI bridge: Digital Equipment Corporation DECchip 21154 (rev 05) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64, cache line size 08
Bus: primary=00, secondary=02, subordinate=02, sec-latency=68
I/O behind bridge: 00002000-00002fff
Memory behind bridge: f6000000-f61fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: <available only to root>
00:0b.0 Class ff00: Ziatech Corporation: Unknown device 5550 (rev 03)
Subsystem: Ziatech Corporation: Unknown device 5550
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 9
Region 0: I/O ports at 1480 [size=32]
Region 1: Memory at f4000000 (32-bit, non-prefetchable) [size=4K]
00:0c.0 PCI bridge: Digital Equipment Corporation DECchip 21154 (rev 05) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64, cache line size 08
Bus: primary=00, secondary=03, subordinate=03, sec-latency=68
I/O behind bridge: 00003000-00003fff
Memory behind bridge: f6200000-f63fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: <available only to root>
01:00.0 VGA compatible controller: Chips and Technologies F69000 HiQVideo (rev 64) (prog-if 00 [VGA])
Subsystem: Chips and Technologies F69000 HiQVideo
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR+ FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 11
Region 0: Memory at f5000000 (32-bit, non-prefetchable) [size=16M]
Expansion ROM at <unassigned> [disabled] [size=256K]
02:0d.0 Bridge: Digital Equipment Corporation DECchip 21554 (rev 01)
Subsystem: Ziatech Corporation: Unknown device 5541
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B+
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64, cache line size 08
Interrupt: pin A routed to IRQ 11
Region 0: Memory at f6101000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at 2400 [size=256]
Region 2: I/O ports at 2000 [size=256]
Region 3: Memory at f6000000 (32-bit, non-prefetchable) [size=1M]
Region 4: Memory at f6100000 (32-bit, non-prefetchable) [size=4K]
Capabilities: <available only to root>
03:0a.0 Bridge: Digital Equipment Corporation DECchip 21554 (rev 01)
Subsystem: Ziatech Corporation: Unknown device 5541
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B+
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64, cache line size 08
Interrupt: pin A routed to IRQ 10
Region 0: Memory at f6301000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at 3400 [size=256]
Region 2: I/O ports at 3000 [size=256]
Region 3: Memory at f6200000 (32-bit, non-prefetchable) [size=1M]
Region 4: Memory at f6300000 (32-bit, non-prefetchable) [size=4K]
Capabilities: <available only to root>
00000000-0009f7ff : System RAM
0009f800-0009ffff : reserved
000a0000-000bffff : Video RAM area
000c0000-000c7fff : Video ROM
000c9800-000c9fff : Extension ROM
000ca000-000ca7ff : Extension ROM
000f0000-000fffff : System ROM
00100000-0fffffff : System RAM
00100000-002fda29 : Kernel code
002fda2a-003c7d67 : Kernel data
f4000000-f4000fff : PCI device 1138:5550 (Ziatech Corporation)
f4000000-f4000fff : cpcihp_zt5550
f4001000-f40013ff : Digital Equipment Co DECchip 21142/43
f4001000-f40013ff : tulip
f4001400-f40017ff : Digital Equipment Co DECchip 21142/43 (#2)
f4001400-f40017ff : tulip
f5000000-f5ffffff : PCI Bus #01
f5000000-f5ffffff : Chips and Technologi F69000 HiQVideo
f6000000-f61fffff : PCI Bus #02
f6000000-f60fffff : Digital Equipment Co DECchip 21554 f6100000-f6100fff : Digital Equipment Co DECchip 21554 f6101000-f6101fff : Digital Equipment Co DECchip 21554
f6200000-f63fffff : PCI Bus #03
f6200000-f62fffff : Digital Equipment Co DECchip 21554 (#2) f6300000-f6300fff : Digital Equipment Co DECchip 21554 (#2) f6301000-f6301fff : Digital Equipment Co DECchip 21554 (#2)
f8000000-fbffffff : Intel Corp. 440BX/ZX/DX - 82443B fffc0000-ffffffff : reserved
0000-001f : dma1
0020-003f : pic1
0040-005f : timer
0060-006f : keyboard
0070-007f : rtc
0080-008f : dma page reg
00a0-00bf : pic2
00c0-00df : dma2
00e1-00e1 : #ENUM hotswap signal register 00f0-00ff : fpu
0170-0177 : ide1
01f0-01f7 : ide0
02f8-02ff : serial
0376-0376 : ide1
03c0-03df : vga+
03f6-03f6 : ide0
03f8-03ff : serial
0cf8-0cff : PCI conf1
1000-103f : Intel Corp. 82371AB/EB/MB PIIX4 1040-105f : Intel Corp. 82371AB/EB/MB PIIX4 1060-107f : Intel Corp. 82371AB/EB/MB PIIX4 1080-10ff : Digital Equipment Co DECchip 21142/43
1080-10ff : tulip
1400-147f : Digital Equipment Co DECchip 21142/43 (#2)
1400-147f : tulip
1480-149f : PCI device 1138:5550 (Ziatech Corporation) 14a0-14af : Intel Corp. 82371AB/EB/MB PIIX4 2000-2fff : PCI Bus #02
2000-20ff : Digital Equipment Co DECchip 21554 2400-24ff : Digital Equipment Co DECchip 21554
3000-3fff : PCI Bus #03
3000-30ff : Digital Equipment Co DECchip 21554 (#2) 3400-34ff : Digital Equipment Co DECchip 21554 (#2)
Just realized that the data I attached was for a 2.5.54 kernel with my patch to register both cpci buses. Here is the same output for a normal 2.5.54 kernel.
I also added my dmesg.
--rustyl
From: "Rusty Lynch" <[email protected]>
Quoted 52 lines
From: "Scott Murray" <[email protected]>
Quoted 23 lines · Rusty Lynch
Quoted 22 lines
From: "Yang, Harold" <[email protected]>
Quoted 10 lines
Hi, Scott & Greg:
I have applied the cpci patch for kernel 2.4.19, and test it thoroughly on ZT5084 platform. Two bugs are found:
1. In my ZT5084, the driver can't correctly detect the cPCI Hot Swap bridge device. Two DEC21154 exist on ZT5084, however, only one is the right bridge. The driver can't distinguish them correctly.
I just got a couple of ZT5541 peripheral master boards and can finally see what happens when an enumerable board is plugged into a ZT5084 chassis using a ZT5550 system master board.
As of yet I have only tried a 2.5.54 kernel, but I see the same problems along with some other wacky behavior that I am trying to isolate.
Quoted 9 lines
Quoted 4 lines
Now about the multiple DEC21154 devices ==> on my ZT5550 that is in system master mode, the first DEC21154 device is a bridge for the slots to the left of the system slots, and the second DEC21154 is a bridge for the right of the system slots.
Okay, that's what I originally wanted to determine from the lspci output I requested when Harold mentioned this problem at the end of November.
I am attaching output for:
1. lspci -vvv
2. cat/proc/ioports
3. cat/proc/iomemFor a ZT5550 running as system master in the second system slot of a ZT5084 chassis that has two ZT5541 (peripherial master) boards plugged in (one to the left of the sytem slots and the other to the right of the system slots.)
Quoted 8 lines
Quoted 7 lines
So if I boot the system master (I'll talk about problems with hotswaping in another email) with a peripheral board plugged into one of the slots on the right of the master using the current 2.5.54 kernel then I run into problems the first time
cpci_hotplug_core.c::check_slots()runs because it only looks at the first bus when trying to find the card that caused the #ENUM.
Quoted 33 lines
Quoted 4 lines
I assume by problems you mean that the cPCI event thread gets shut down (which is what I'd expect), or do you mean something more severe?
The event thread shutsdown with the
"cannot find ENUM# source, shutting down" error message. That's all.Quoted 24 lines
Quoted 2 lines
The following patch will register each of the cpci busses instead of just the first one detected.
Your patch is better than Harold's hack, but I'm probably going to try and think of some other alternative, as the while loop idea doesn't handle the possibility of someone having a 21154 bridge on a PMC card or actually as a bridge on a cPCI card. The original code doesn't really handle that possiblity either, so I'll need to cook up something better anyway.
Quoted 5 lines
NOTE: I'm a little worried that the right way to do this is to
properly initialize the RSS bits, or at least see how the chassis is configured via the RSS bits to determine which cpci bus to register. The ZT5084 doesn't have near as many configurations as newer designs like the ZT5088.[snip]
I will investigate reading the active bus(es) out of the HC, as I've gotten the documentation for the HC from Performance Tech, I was just too busy before Christmas to dig into it then. I'll try and have something that attempts to handle your ZT5084 chassis done in a few days.
Scott
Linux version 2.5.54 (rusty@cpci-b) (gcc version 3.2 20020903 (Red Hat Linux 8.0 3.2-7)) #2 SMP Wed Jan 8 12:46:53 PST 2003 Video mode to be used for restore is ffff
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009f800 (usable)
BIOS-e820: 000000000009f800 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e7400 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 0000000010000000 (usable)
BIOS-e820: 00000000fffc0000 - 0000000100000000 (reserved)
256MB LOWMEM available.
On node 0 totalpages: 65536
DMA zone: 4096 pages, LIFO batch:1
Normal zone: 61440 pages, LIFO batch:15
HighMem zone: 0 pages, LIFO batch:1
ACPI: Unable to locate RSDP
Building zonelist for node : 0
Kernel command line: auto BOOT_IMAGE=hack2 ro BOOT_FILE=/boot/hack2 debug=1
Local APIC disabled by BIOS -- reenabling.
Could not enable APIC!
Initializing CPU#0
PID hash table entries: 2048 (order 11: 16384 bytes)
Detected 498.539 MHz processor.
Console: colour VGA+ 80x25
Calibrating delay loop... 985.08 BogoMIPS
Memory: 255512k/262144k available (2038k kernel code, 5892k reserved, 808k data, 120k init, 0k highmem) Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
-> /dev
-> /dev/console
-> /root
CPU: L1 I cache: 16K, L1 D cache: 16K
CPU: L2 cache: 256K
CPU serial number disabled.
CPU: After generic, caps: 0383f9ff 00000000 00000000 00000000
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Checking 'hlt' instruction... OK.
POSIX conformance testing by UNIFIX
CPU0: Intel Pentium III (Coppermine) stepping 03
per-CPU timeslice cutoff: 730.93 usecs.
task migration cache decay timeout: 1 msecs.
SMP motherboard not detected.
Local APIC not detected. Using dummy APIC emulation.
Starting migration thread for cpu 0
CPUS done 2
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
device class 'cpu': registering
device class cpu: adding driver system:cpu
PCI: PCI BIOS revision 2.10 entry at 0xfd89e, last bus=3
PCI: Using configuration type 1
device class cpu: adding device CPU 0
interfaces: adding device CPU 0
BIO: pool of 256 setup, 14Kb (56 bytes/bio)
biovec pool[0]: 1 bvecs: 256 entries (12 bytes)
biovec pool[1]: 4 bvecs: 256 entries (48 bytes)
biovec pool[2]: 16 bvecs: 256 entries (192 bytes)
biovec pool[3]: 64 bvecs: 256 entries (768 bytes)
biovec pool[4]: 128 bvecs: 256 entries (1536 bytes)
biovec pool[5]: 256 bvecs: 256 entries (3072 bytes)
ACPI: Subsystem revision 20021217
ACPI: System description tables not found
ACPI-0065: *** Error: acpi_load_tables: Could not get RSDP, AE_NOT_FOUND
ACPI-0115: *** Error: acpi_load_tables: Could not load tables: AE_NOT_FOUND
ACPI: Unable to load the System Description Tables
Linux Plug and Play Support v0.93 (c) Adam Belay
block request queues:
128 requests per read queue
128 requests per write queue
8 requests per batch
enter congestion at 31
exit congestion at 33
ACPI: ACPI tables contain no PCI IRQ routing entries
PCI: Invalid ACPI-PCI IRQ routing table
PCI: Probing PCI hardware
PCI: Probing PCI hardware (bus 00)
PCI: Using IRQ router PIIX [8086/7110] at 00:07.0
PCI: Cannot allocate resource region 4 of device 00:07.1
IA-32 Microcode Update Driver: v1.11 <[email protected]>
Enabling SEP on CPU 0aio_setup: sizeof(struct page) = 40
Journalled Block Device driver loaded
Installing knfsd (copyright (C) 1996 [email protected]).
Limiting direct PCI/PCI transfers.
Serial: 8250/16550 driver $Revision: 1.90 $ IRQ sharing disabled
ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
device class 'tty': registering
pty: 256 Unix98 ptys configured
Real Time Clock Driver v1.11
Non-volatile memory driver v1.2
Linux agpgart interface v0.100 (c) Dave Jones
[drm] Initialized r128 2.3.0 20021029 on minor 0
Linux Tulip driver version 1.1.13 (May 11, 2002)
PCI: Found IRQ 11 for device 00:05.0 PCI: Sharing IRQ 11 with 02:0d.0 tulip0: EEPROM default media type Autosense. tulip0: Index #0 - Media 10baseT (#0) described by a 21142 Serial PHY (2) block. tulip0: Index #1 - Media 10baseT-FDX (#4) described by a 21142 Serial PHY (2) block. tulip0: Index #2 - Media 10base2 (#1) described by a 21142 Serial PHY (2) block. tulip0: Index #3 - Media AUI (#2) described by a 21142 Serial PHY (2) block. tulip0: Index #4 - Media MII (#11) described by a 21142 MII PHY (3) block. tulip0: MII transceiver #0 config 1000 status 782d advertising 01e1. eth0: Digital DS21143 Tulip rev 65 at 0x1080, 00:80:50:02:73:75, IRQ 11. PCI: Found IRQ 10 for device 00:06.0 PCI: Sharing IRQ 10 with 03:0a.0 tulip1: EEPROM default media type Autosense. tulip1: Index #0 - Media 10baseT (#0) described by a 21142 Serial PHY (2) block. tulip1: Index #1 - Media 10baseT-FDX (#4) described by a 21142 Serial PHY (2) block. tulip1: Index #2 - Media 10base2 (#1) described by a 21142 Serial PHY (2) block. tulip1: Index #3 - Media AUI (#2) described by a 21142 Serial PHY (2) block. tulip1: Index #4 - Media MII (#11) described by a 21142 MII PHY (3) block. tulip1: MII transceiver #0 config 1000 status 782d advertising 01e1. eth1: Digital DS21143 Tulip rev 65 at 0x1400, 00:80:50:02:73:76, IRQ 10.
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
hda: IBM-DJSA-210, ATA DISK drive
hdc: CD-224E, ATAPI CD/DVD-ROM drive
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
ide1 at 0x170-0x177,0x376 on irq 15
hda: host protected area => 1
hda: 19640880 sectors (10056 MB) w/384KiB Cache, CHS=19485/16/63
hda: hda1 hda2 hda3
hdc: ATAPI 24X CD-ROM drive, 128kB Cache
Uniform CD-ROM driver Revision: 3.12end_request: I/O error, dev hdc, sector 0
device class 'input': registering
register interface 'mouse' with class 'input'
mice: PS/2 mouse device common for all mice
input: PC Speaker
input: PS/2 Generic Mouse on isa0060/serio1
serio: i8042 AUX port at 0x60,0x64 irq 12
input: AT Set 2 keyboard on isa0060/serio0
serio: i8042 KBD port at 0x60,0x64 irq 1cpci_hotplug: CompactPCI Hot Plug Core version: 0.2pci_hotplug: PCI Hot Plug PCI Core version: 0.5cpcihp_zt5550: ZT5550 CompactPCI Hot Plug Driver version: 0.2
NET4: Linux TCP/IP 1.0 for NET4.0
IP: routing cache hash table of 1024 buckets, 16Kbytes
TCP: Hash tables configured (established 8192 bind 10922)
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.cpci_hotplug: cannot find ENUM# source, shutting down
kjournald starting. Commit interval 5 seconds
EXT3-fs: mounted filesystem with ordered data mode.
VFS: Mounted root (ext3 filesystem) readonly.
Freeing unused kernel memory: 120k freed
EXT3 FS 2.4-0.9.16, 02 Dec 2001 on ide0(3,2), internal journal Adding 514072k swap on /dev/hda3. Priority:-1 extents:1
eth0: Setting full-duplex based on MII#0 link partner capability of 45e1. spurious 8259A interrupt: IRQ7.
eth1: Setting full-duplex based on MII#0 link partner capability of 01e1.
warning: process `update' used the obsolete bdflush system call Fix your initscripts?
warning: process `update' used the obsolete bdflush system call Fix your initscripts?
00:00.0 Host bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 03)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 64 Region 0: Memory at f8000000 (32-bit, prefetchable) [size=64M] Capabilities: [a0] AGP version 1.0 Status: RQ=31 SBA+ 64bit- FW- Rate=x1,x2 Command: RQ=0 SBA- AGP- 64bit- FW- Rate=<none>
00:01.0 PCI bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 03) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 128 Bus: primary=00, secondary=01, subordinate=01, sec-latency=64 I/O behind bridge: 0000f000-00000fff Memory behind bridge: f5000000-f5ffffff Prefetchable memory behind bridge: fff00000-000fffff BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B+
00:05.0 Ethernet controller: Digital Equipment Corporation DECchip 21142/43 (rev 41)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 165 (5000ns min, 10000ns max), cache line size 08
Interrupt: pin A routed to IRQ 11
Region 0: I/O ports at 1080 [size=128]
Region 1: Memory at f4001000 (32-bit, non-prefetchable) [size=1K]
Expansion ROM at <unassigned> [disabled] [size=256K]
00:06.0 Ethernet controller: Digital Equipment Corporation DECchip 21142/43 (rev 41)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 165 (5000ns min, 10000ns max), cache line size 08
Interrupt: pin A routed to IRQ 10
Region 0: I/O ports at 1400 [size=128]
Region 1: Memory at f4001400 (32-bit, non-prefetchable) [size=1K]
Expansion ROM at <unassigned> [disabled] [size=256K]
00:07.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 02)
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0
00:07.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) (prog-if 80 [Master])
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64 Region 4: I/O ports at 14a0 [size=16]
00:07.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01) (prog-if 00 [UHCI])
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64
Interrupt: pin D routed to IRQ 9
Region 4: I/O ports at 1060 [size=32]
00:07.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02)
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin ? routed to IRQ 9
00:08.0 PCI bridge: Digital Equipment Corporation DECchip 21154 (rev 05) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, cache line size 08 Bus: primary=00, secondary=02, subordinate=02, sec-latency=68 I/O behind bridge: 00002000-00002fff Memory behind bridge: f6000000-f61fffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- Capabilities: [dc] Power Management version 1 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Bridge: PM- B3+
00:0b.0 Class ff00: Ziatech Corporation: Unknown device 5550 (rev 03)
Subsystem: Ziatech Corporation: Unknown device 5550
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 9
Region 0: I/O ports at 1480 [size=32]
Region 1: Memory at f4000000 (32-bit, non-prefetchable) [size=4K]
00:0c.0 PCI bridge: Digital Equipment Corporation DECchip 21154 (rev 05) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, cache line size 08 Bus: primary=00, secondary=03, subordinate=03, sec-latency=68 I/O behind bridge: 00003000-00003fff Memory behind bridge: f6200000-f63fffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- Capabilities: [dc] Power Management version 1 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Bridge: PM- B3+
01:00.0 VGA compatible controller: Chips and Technologies F69000 HiQVideo (rev 64) (prog-if 00 [VGA])
Subsystem: Chips and Technologies F69000 HiQVideo
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR+ FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 11
Region 0: Memory at f5000000 (32-bit, non-prefetchable) [size=16M]
Expansion ROM at <unassigned> [disabled] [size=256K]
02:0d.0 Bridge: Digital Equipment Corporation DECchip 21554 (rev 01)
Subsystem: Ziatech Corporation: Unknown device 5541
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B+
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64, cache line size 08
Interrupt: pin A routed to IRQ 11
Region 0: Memory at f6101000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at 2400 [size=256]
Region 2: I/O ports at 2000 [size=256]
Region 3: Memory at f6000000 (32-bit, non-prefetchable) [size=1M]
Region 4: Memory at f6100000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [dc] Power Management version 0
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [e4] Slot ID: 0 slots, First-, chassis 00
Capabilities: [ec] #06 [0000]
03:0a.0 Bridge: Digital Equipment Corporation DECchip 21554 (rev 01)
Subsystem: Ziatech Corporation: Unknown device 5541
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B+
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64, cache line size 08
Interrupt: pin A routed to IRQ 10
Region 0: Memory at f6301000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at 3400 [size=256]
Region 2: I/O ports at 3000 [size=256]
Region 3: Memory at f6200000 (32-bit, non-prefetchable) [size=1M]
Region 4: Memory at f6300000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [dc] Power Management version 0
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [e4] Slot ID: 0 slots, First-, chassis 00
Capabilities: [ec] #06 [0080]
00000000-0009f7ff : System RAM
0009f800-0009ffff : reserved
000a0000-000bffff : Video RAM area
000c0000-000c7fff : Video ROM
000c9800-000c9fff : Extension ROM
000ca000-000ca7ff : Extension ROM
000f0000-000fffff : System ROM
00100000-0fffffff : System RAM
00100000-002fda69 : Kernel code
002fda6a-003c7d67 : Kernel data
f4000000-f4000fff : PCI device 1138:5550 (Ziatech Corporation)
f4000000-f4000fff : cpcihp_zt5550
f4001000-f40013ff : Digital Equipment Co DECchip 21142/43
f4001000-f40013ff : tulip
f4001400-f40017ff : Digital Equipment Co DECchip 21142/43 (#2)
f4001400-f40017ff : tulip
f5000000-f5ffffff : PCI Bus #01
f5000000-f5ffffff : Chips and Technologi F69000 HiQVideo
f6000000-f61fffff : PCI Bus #02
f6000000-f60fffff : Digital Equipment Co DECchip 21554 f6100000-f6100fff : Digital Equipment Co DECchip 21554 f6101000-f6101fff : Digital Equipment Co DECchip 21554
f6200000-f63fffff : PCI Bus #03
f6200000-f62fffff : Digital Equipment Co DECchip 21554 (#2) f6300000-f6300fff : Digital Equipment Co DECchip 21554 (#2) f6301000-f6301fff : Digital Equipment Co DECchip 21554 (#2)
f8000000-fbffffff : Intel Corp. 440BX/ZX/DX - 82443B fffc0000-ffffffff : reserved
0000-001f : dma1
0020-003f : pic1
0040-005f : timer
0060-006f : keyboard
0070-007f : rtc
0080-008f : dma page reg
00a0-00bf : pic2
00c0-00df : dma2
00e1-00e1 : #ENUM hotswap signal register 00f0-00ff : fpu
0170-0177 : ide1
01f0-01f7 : ide0
02f8-02ff : serial
0376-0376 : ide1
03c0-03df : vga+
03f6-03f6 : ide0
03f8-03ff : serial
0cf8-0cff : PCI conf1
1000-103f : Intel Corp. 82371AB/EB/MB PIIX4 1040-105f : Intel Corp. 82371AB/EB/MB PIIX4 1060-107f : Intel Corp. 82371AB/EB/MB PIIX4 1080-10ff : Digital Equipment Co DECchip 21142/43
1080-10ff : tulip
1400-147f : Digital Equipment Co DECchip 21142/43 (#2)
1400-147f : tulip
1480-149f : PCI device 1138:5550 (Ziatech Corporation) 14a0-14af : Intel Corp. 82371AB/EB/MB PIIX4 2000-2fff : PCI Bus #02
2000-20ff : Digital Equipment Co DECchip 21554 2400-24ff : Digital Equipment Co DECchip 21554
3000-3fff : PCI Bus #03
3000-30ff : Digital Equipment Co DECchip 21554 (#2) 3400-34ff : Digital Equipment Co DECchip 21554 (#2)
Quoted 3 lines · Rusty Lynch
Just realized that the data I attached was for a 2.5.54 kernel with my patch to register both cpci buses. Here is the same output for a normal 2.5.54 kernel.
Could you try the included patch against the ZT5550 driver out and let me know if it works better for you? I dug through the host controller docs that Performance Tech provided me, so now the driver only registers the appropiate cPCI buses that are active. I think this suffices for now, but things will become more complicated if/when someone wants to expand the driver to do redundant system slot stuff.
Note that the patch is also available from:
ftp://oss.somanetworks.com/pub/linux/cpci/v2.5/linux-2.5.55-cpcihp_zt5550-1.patch
and while it's against 2.5.55, should also apply cleanly against 2.5.54 and probably against the 2.4.19 patch I released on pcihpd-discuss a while back.
Scott
drivers/hotplug/cpcihp_zt5550.c +79 -44
@@ -38,7 +38,7 @@#include "cpci_hotplug.h" #include "cpcihp_zt5550.h" -#define DRIVER_VERSION "0.2" +#define DRIVER_VERSION "0.3"#define DRIVER_AUTHOR "Scott Murray <[email protected]>"#define DRIVER_DESC "ZT5550 CompactPCI Hot Plug Driver"
@@ -64,9 +64,11 @@static struct cpci_hp_controller_ops zt5550_hpc_ops;static struct cpci_hp_controller zt5550_hpc; -/* Primary cPCI bus bridge device */ -static struct pci_dev *bus0_dev; -static struct pci_bus *bus0; +/* cPCI bus bridge devices */ +static struct pci_dev *bus1_dev; +static struct pci_bus *bus1; +static struct pci_dev *bus2_dev; +static struct pci_bus *bus2;/* Host controller device */ static struct pci_dev *hc_dev;
@@ -75,9 +77,11 @@static void *hc_registers;static void *csr_hc_index;static void *csr_hc_data; -static void *csr_int_status; -static void *csr_int_mask; +static void *csr_intstat; +static void *csr_intmask; +/* Host controller status register */ +static u32 hcf_hcs;static int zt5550_hc_config (struct pci_dev *pdev) {
@@ -109,23 +113,28 @@ csr_hc_index = hc_registers +CSR_HCINDEX ; csr_hc_data = hc_registers +CSR_HCDATA ; - csr_int_status = hc_registers +CSR_INTSTAT ; - csr_int_mask = hc_registers +CSR_INTMASK ; + csr_intstat = hc_registers +CSR_INTSTAT ; + csr_intmask = hc_registers +CSR_INTMASK ; + +/* Read Host Control Status register */ +writeb ((u8 )HCF_HCS , csr_hc_index); + hcf_hcs =readl (csr_hc_data); +info ("HCF_HCS = 0x%08x" , hcf_hcs);/* * Disable host control, fault and serial interrupts */ dbg ("disabling host control, fault and serial interrupts" ); -writeb ((u8 )HC_INT_MASK_REG , csr_hc_index); -writeb ((u8 )ALL_INDEXED_INTS_MASK , csr_hc_data); +writeb ((u8 )HCF_HCI , csr_hc_index); +writeb ((u8 )HCI_ALL_INTS_MASK , csr_hc_data);dbg ("disabled host control, fault and serial interrupts" );/* -* Disable timer0, timer1 and ENUM interrupts +* Disable timer0, timer1 and ENUM# interrupts */ -dbg ("disabling timer0, timer1 and ENUM interrupts" ); -writeb ((u8 )ALL_DIRECT_INTS_MASK , csr_int_mask); -dbg ("disabled timer0, timer1 and ENUM interrupts" ); +dbg ("disabling timer0, timer1 and ENUM# interrupts" ); +writeb ((u8 )INTMASK_ALL_INTS_MASK , csr_intmask); +dbg ("disabled timer0, timer1 and ENUM# interrupts" );return 0 ; }
@@ -153,7 +162,7 @@ ret =0 ;if (dev_id == zt5550_hpc.dev_id) { - reg =readb (csr_int_status); + reg =readb (csr_intstat);if (reg) ret =1 ; }
@@ -167,9 +176,9 @@if (hc_dev ==NULL ) {return -ENODEV ; } - reg =readb (csr_int_mask); - reg = reg & ~ENUM_INT_MASK ; -writeb (reg, csr_int_mask); + reg =readb (csr_intmask); + reg = reg & ~INTMASK_ENUM_INT_MASK ; +writeb (reg, csr_intmask);return 0 ; }
@@ -181,16 +190,42 @@return -ENODEV ; } - reg =readb (csr_int_mask); - reg = reg |ENUM_INT_MASK ; -writeb (reg, csr_int_mask); + reg =readb (csr_intmask); + reg = reg |INTMASK_ENUM_INT_MASK ; +writeb (reg, csr_intmask);return 0 ; } +static int __devinit zt5550_register_bus (unsigned int slot, +struct pci_dev **dev, +struct pci_bus **bus) +{ +int status; + +/* Look for slot's device */ +if (!(*dev =pci_find_slot (0 ,PCI_DEVFN (slot,0 )))) { +return -ENODEV ; + } +if (!((*dev)->vendor ==PCI_VENDOR_ID_DEC && \ + (*dev)->device ==PCI_DEVICE_ID_DEC_21154 )) { +return -ENODEV ; + } + *bus = (*dev)->subordinate; + + status =cpci_hp_register_bus (*bus,0x0a ,0x0f ); +if (status) { +err ("could not register cPCI hotplug bus %d" , (*bus)->number); + }else { +dbg ("registered bus %d" , (*bus)->number); + } +return status; +} +static int __devinit zt5550_hc_init_one (struct pci_dev *pdev,const struct pci_device_id *ent) {int status; +struct resource * r; status =zt5550_hc_config (pdev);if (status !=0 ) {
@@ -198,6 +233,10 @@ }dbg ("returned from zt5550_hc_config" ); + r =request_region (ENUM_PORT ,1 ,"ENUM# hotswap signal register" ); +if (!r) +return -EBUSY ; +memset (&zt5550_hpc,0 ,sizeof (struct cpci_hp_controller )); zt5550_hpc_ops.query_enum = zt5550_hc_query_enum; zt5550_hpc.ops = &zt5550_hpc_ops;
@@ -220,31 +259,30 @@ }dbg ("registered controller" ); -/* Look for first device matching cPCI bus's bridge vendor and device IDs */ -if (!(bus0_dev =pci_find_device (PCI_VENDOR_ID_DEC , -PCI_DEVICE_ID_DEC_21154 ,NULL ))) { - status = -ENODEV ; - goto init_register_error; - } - bus0 = bus0_dev->subordinate; - - status =cpci_hp_register_bus (bus0,0x0a ,0x0f ); -if (status !=0 ) { -err ("could not register cPCI hotplug bus" ); - goto init_register_error; +if (hcf_hcs &HCS_BUS1_ACTIVE ) { + status =zt5550_register_bus (BUS1_SLOT , &bus1_dev, &bus1); +if (status) + goto init_register_error; + } +if (hcf_hcs &HCS_BUS2_ACTIVE ) { + status =zt5550_register_bus (BUS2_SLOT , &bus2_dev, &bus2); +if (status) + goto init_register_error; } -dbg ("registered bus" ); status =cpci_hp_start ();if (status !=0 ) {err ("could not started cPCI hotplug system" ); -cpci_hp_unregister_bus (bus0); goto init_register_error; } -dbg ("started cpci hp system" ); +dbg ("started cPCI hotplug system" );return 0 ; init_register_error: +if (bus1) +cpci_hp_unregister_bus (bus1); +if (bus2) +cpci_hp_unregister_bus (bus2);cpci_hp_unregister_controller (&zt5550_hpc); init_hc_error:err ("status = %d" , status);
@@ -256,7 +294,10 @@ static void __devexit zt5550_hc_remove_one(struct pci_dev *pdev) {cpci_hp_stop (); -cpci_hp_unregister_bus (bus0); +if (bus1) +cpci_hp_unregister_bus (bus1); +if (bus2) +cpci_hp_unregister_bus (bus2);cpci_hp_unregister_controller (&zt5550_hpc);zt5550_hc_cleanup (); }
@@ -277,13 +318,7 @@static int __init zt5550_init (void ) { -struct resource * r; -info (DRIVER_DESC " version: " DRIVER_VERSION ); - r =request_region (ENUM_PORT ,1 ,"#ENUM hotswap signal register" ); -if (!r) -return -EBUSY ; -return pci_module_init (&zt5550_hc_driver); }
@@ -303,4 +338,4 @@MODULE_PARM (debug,"i" );MODULE_PARM_DESC (debug,"Debugging mode enabled or not" );MODULE_PARM (poll,"i" ); -MODULE_PARM_DESC (poll,"#ENUM polling mode enabled or not" ); +MODULE_PARM_DESC (poll,"ENUM# polling mode enabled or not" );
drivers/hotplug/cpcihp_zt5550.h +45 -28
83 lines not on this page · raw message
Signature · 4 lines
Scott Murray SOMA Networks, Inc. Toronto, Ontario e-mail: [email protected]