Make sym2 driver use pci_enable_device

PATCH Anton Blanchard 1 participant 2 messages Apr 14, 2003 – Apr 15, 2003

Subsystems (2)

SCSI LSI Logic/symbios/ncr 53C8XX and 53C1010 PCI-SCSI drivers

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Anton Blanchard

author

2003-04-14 23:25 UTC #0 lore raw

Hi,

The sym2 driver should use the generic pci_enable_device() and pci_set_master() functions.

The next step is to use pci_enable_mwi(), however that needs some more thought. The current code warns of chip bugs requiring MWI to be enabled. If this is so we should use the generic MWI hook and if that returns an error we should warn or fail to load. The driver should not be guessing:

#if defined(__i386__) && !defined(MODULE)
        if (!cache_line_size && boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
                switch(boot_cpu_data.x86) {
                case 4: suggested_cache_line_size = 4;   break;
                case 6: if (boot_cpu_data.x86_model > 8) break;
                case 5: suggested_cache_line_size = 8;   break;
                }
        }

#endif /* __i386__ */

Anton

===== sym_glue.c 1.16 vs edited =====

sym_glue.c renamed from drivers/scsi/sym53c8xx_2/sym_glue.c +2 ~~-35~~

@@ -2562,41 +2561,8 @@
 	pci_read_config_word(pdev, PCI_COMMAND,		&command);
 	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE,	&cache_line_size);
 
-	/*
-	 * Enable missing capabilities in the PCI COMMAND register.
-	 */
-#ifdef SYM_CONF_IOMAPPED
-#define	PCI_COMMAND_BITS_TO_ENABLE (PCI_COMMAND_IO | \
-	PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)
-#else
-#define	PCI_COMMAND_BITS_TO_ENABLE \
-	(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)
-#endif
-	if ((command & PCI_COMMAND_BITS_TO_ENABLE)
-		    != PCI_COMMAND_BITS_TO_ENABLE) {
-		printf_info("%s: setting%s%s%s%s...\n", sym_name(device),
-		(command & PCI_COMMAND_IO)     ? "" : " PCI_COMMAND_IO",
-		(command & PCI_COMMAND_MEMORY) ? "" : " PCI_COMMAND_MEMORY",
-		(command & PCI_COMMAND_MASTER) ? "" : " PCI_COMMAND_MASTER",
-		(command & PCI_COMMAND_PARITY) ? "" : " PCI_COMMAND_PARITY");
-		command |= PCI_COMMAND_BITS_TO_ENABLE;
-		pci_write_config_word(pdev, PCI_COMMAND, command);
-	}
-#undef	PCI_COMMAND_BITS_TO_ENABLE
-
-	/*
-	 *  If cache line size is not configured, suggest
-	 *  a value for well known CPUs.
-	 */
-#if defined(__i386__) && !defined(MODULE)
-	if (!cache_line_size && boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
-		switch(boot_cpu_data.x86) {
-		case 4:	suggested_cache_line_size = 4;   break;
-		case 6: if (boot_cpu_data.x86_model > 8) break;
-		case 5:	suggested_cache_line_size = 8;   break;
-		}
-	}
-#endif	/* __i386__ */
+	pci_enable_device(pdev);
+	pci_set_master(pdev);
 
 	/*
 	 *  Some features are required to be enabled in order to

Anton Blanchard

author

2003-04-15 15:32 UTC #1 lore raw

Quoted 3 lines

The sym2 driver should use the generic pci_enable_device() and pci_set_master() functions.

Sorry, wrong patch. We need to read COMMAND after doing pci_enable_device/pci_set_master. We should also check the return valie of pci_enable_device.

Anton

===== drivers/scsi/sym53c8xx_2/sym_glue.c 1.16 vs edited =====

drivers/scsi/sym53c8xx_2/sym_glue.c +6 ~~-23~~

@@ -2556,35 +2556,17 @@
 	bcopy(chip, &device->chip, sizeof(device->chip));
 	device->chip.revision_id = revision;
 
+	if (pci_enable_device(pdev))
+		return -1;
+
+	pci_set_master(pdev);
+
 	/*
 	 *  Read additionnal info from the configuration space.
 	 */
-	pci_read_config_word(pdev, PCI_COMMAND,		&command);
 	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE,	&cache_line_size);
 
 	/*
-	 * Enable missing capabilities in the PCI COMMAND register.
-	 */
-#ifdef SYM_CONF_IOMAPPED
-#define	PCI_COMMAND_BITS_TO_ENABLE (PCI_COMMAND_IO | \
-	PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)
-#else
-#define	PCI_COMMAND_BITS_TO_ENABLE \
-	(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)
-#endif
-	if ((command & PCI_COMMAND_BITS_TO_ENABLE)
-		    != PCI_COMMAND_BITS_TO_ENABLE) {
-		printf_info("%s: setting%s%s%s%s...\n", sym_name(device),
-		(command & PCI_COMMAND_IO)     ? "" : " PCI_COMMAND_IO",
-		(command & PCI_COMMAND_MEMORY) ? "" : " PCI_COMMAND_MEMORY",
-		(command & PCI_COMMAND_MASTER) ? "" : " PCI_COMMAND_MASTER",
-		(command & PCI_COMMAND_PARITY) ? "" : " PCI_COMMAND_PARITY");
-		command |= PCI_COMMAND_BITS_TO_ENABLE;
-		pci_write_config_word(pdev, PCI_COMMAND, command);
-	}
-#undef	PCI_COMMAND_BITS_TO_ENABLE
-
-	/*
 	 *  If cache line size is not configured, suggest
 	 *  a value for well known CPUs.
 	 */

@@ -2623,6 +2605,7 @@
 		            sym_name(device), cache_line_size);
 	}
 
+	pci_read_config_word(pdev, PCI_COMMAND,	&command);
 	if ((pci_fix_up & 2) && cache_line_size &&
 	    (chip->features & FE_WRIE) && !(command & PCI_COMMAND_INVALIDATE)) {
 		printf_info("%s: setting PCI_COMMAND_INVALIDATE.\n",