pat support in the kernel
A message that is not in the archive (sent off-list or not yet received): [email protected]
A message that is not in the archive (sent off-list or not yet received): 16074.33371.411219.528228@gargle.gargle.HOWL.suse.lists.linux.kernel
Quoted 1 line · [email protected] writes:
(Large pages ignoring PAT index bit 2, or something like that.)
change_page_attr will force 4K pages for these anyways, so for the kernel direct mapping it should not be an issue.
For the hugetlbfs user mapping you may need to check the case, but it's probably reasonable to EINVAL there.
Other than that everything should be 4K mapped.
-Andi
Quoted 11 lines · Andi Kleen
Quoted 1 line · [email protected] writes:
(Large pages ignoring PAT index bit 2, or something like that.)
change_page_attrwill force 4K pages for these anyways, so for the kernel direct mapping it should not be an issue.For the hugetlbfs user mapping you may need to check the case, but it's probably reasonable to EINVAL there.
Other than that everything should be 4K mapped.
The bug is that 4K pages get the wrong PAT index; the large page thing is the trigger but the large pages themselves arent' affected.
So 4K pages need to be restricted to the low 4 PAT types.
Quoted 11 lines · On Wed, 21 May 2003 12:12:43 +0200 [email protected] wrote:
Quoted 10 lines · Andi Kleen
Quoted 1 line · [email protected] writes:
(Large pages ignoring PAT index bit 2, or something like that.)
change_page_attrwill force 4K pages for these anyways, so for the kernel direct mapping it should not be an issue.For the hugetlbfs user mapping you may need to check the case, but it's probably reasonable to EINVAL there.
Quoted 6 lines
Quoted 1 line
Other than that everything should be 4K mapped.
The bug is that 4K pages get the wrong PAT index; the large page thing is the trigger but the large pages themselves arent' affected.
So 4K pages need to be restricted to the low 4 PAT types.
Should be no issue. cache disabled and write combining seem to be the only really useful caching types anyways. You don't even need to mess with the PAT registers for them, the default 486/586 compatible WC and CD PTE bits should work.
-Andi