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Enable Cardbus bursting

CFT Russell King 2 participants 2 messages Jun 21, 2003

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PCI Pcmcia
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Russell King

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#0 lore raw

Below is a patch which is the result of work sent by Linus to myself, cleaned by Dominik, and a change for PCMCIA ISA IRQ routing stuff from the 2.4-ac tree.

Quoted 4 lines · Linus

Here's a patch that apparently improves throughput on Texas Instrument 1520 controllers a lot by enabling memory bursting. Apparently to the point that without this you can't even do things like 802.11g without starting to drop data.

and later:

Quoted 3 lines

So this seems to be not a 1520-specific thing, but a generic 12xx+ thing, and we migth want to just enhance the current 12xx stuff and add the ID for the 1520 to use that too..

Before I push this to Linus, I'd like people with TI cardbus bridges to test this patch and ensure that there are no unfortunate side effects.

The patch is against 2.5.72 bk as of about 6am GMT on Friday.

drivers/pcmcia/ti113x.h +32 -0
diff -Nru a/drivers/pcmcia/ti113x.h b/drivers/pcmcia/ti113x.h
@@ -175,6 +175,27 @@
 	new = reg & ~I365_INTR_ENA;
 	if (new != reg)
 		exca_writeb(socket, I365_INTCTL, new);
+
+	/*
+	 * If ISA interrupts don't work, then fall back to routing card
+	 * interrupts to the PCI interrupt of the socket.
+	 */
+	if (!socket->socket.irq_mask) {
+		int irqmux, devctl;
+
+		printk (KERN_INFO "ti113x: Routing card interrupts to PCI\n");
+
+		devctl = config_readb(socket, TI113X_DEVICE_CONTROL);
+		devctl &= ~TI113X_DCR_IMODE_MASK;
+
+		irqmux = config_readl(socket, TI122X_IRQMUX);
+		irqmux = (irqmux & ~0x0f) | 0x02; /* route INTA */
+		irqmux = (irqmux & ~0xf0) | 0x20; /* route INTB */
+
+		config_writel(socket, TI122X_IRQMUX, irqmux);
+		config_writeb(socket, TI113X_DEVICE_CONTROL, devctl);
+	}
+
 	socket->socket.ss_entry->init = ti_init;
 	return 0;
 }

@@ -239,6 +260,17 @@
 	ti113x_override(socket);
 	socket->socket.ss_entry->init = ti1250_init;
 	return 0;
+}
+
+
+static int ti12xx_override(struct yenta_socket *socket)
+{
+	/* make sure that memory burst is active */
+	ti_sysctl(socket) = config_readl(socket, TI113X_SYSTEM_CONTROL);
+	ti_sysctl(socket) |= TI122X_SCR_MRBURSTUP;
+	config_writel(socket, TI113X_SYSTEM_CONTROL, ti_sysctl(socket));
+
+	return ti113x_override(socket);
 }
 
 #endif /* CONFIG_CARDBUS */
drivers/pcmcia/yenta_socket.c +16 -9
diff -Nru a/drivers/pcmcia/yenta_socket.c b/drivers/pcmcia/yenta_socket.c
@@ -807,22 +807,29 @@
 	unsigned short device;
 	int (*override) (struct yenta_socket *socket);
 } cardbus_override[] = {
-	{ PD(TI,1130),	&ti113x_override },
 	{ PD(TI,1031),	&ti_override },
-	{ PD(TI,1131),	&ti113x_override },
-	{ PD(TI,1250),	&ti1250_override },
-	{ PD(TI,1220),	&ti_override },
-	{ PD(TI,1221),	&ti_override },
+
+	/* TBD: Check if these TI variants can use more
+	 * advanced overrides instead */
 	{ PD(TI,1210),	&ti_override },
-	{ PD(TI,1450),	&ti_override },
-	{ PD(TI,1225),	&ti_override },
-	{ PD(TI,1251A),	&ti_override },
 	{ PD(TI,1211),	&ti_override },
+	{ PD(TI,1251A),	&ti_override },
 	{ PD(TI,1251B),	&ti_override },
-	{ PD(TI,1410),	ti1250_override },
 	{ PD(TI,1420),	&ti_override },
+	{ PD(TI,1450),	&ti_override },
 	{ PD(TI,4410),	&ti_override },
 	{ PD(TI,4451),	&ti_override },
+
+	{ PD(TI,1130),	&ti113x_override },
+	{ PD(TI,1131),	&ti113x_override },
+
+	{ PD(TI,1220),	&ti12xx_override },
+	{ PD(TI,1221),	&ti12xx_override },
+	{ PD(TI,1225),	&ti12xx_override },
+	{ PD(TI,1520),  &ti12xx_override },
+
+	{ PD(TI,1250),	&ti1250_override },
+	{ PD(TI,1410),	&ti1250_override },
 
 	{ PD(RICOH,RL5C465), &ricoh_override },
 	{ PD(RICOH,RL5C466), &ricoh_override },
include/linux/pci_ids.h +2 -1
diff -Nru a/include/linux/pci_ids.h b/include/linux/pci_ids.h
@@ -663,7 +663,6 @@
 #define PCI_DEVICE_ID_TI_1220		0xac17
 #define PCI_DEVICE_ID_TI_1221		0xac19
 #define PCI_DEVICE_ID_TI_1210		0xac1a
-#define PCI_DEVICE_ID_TI_1410		0xac50
 #define PCI_DEVICE_ID_TI_1450		0xac1b
 #define PCI_DEVICE_ID_TI_1225		0xac1c
 #define PCI_DEVICE_ID_TI_1251A		0xac1d

@@ -671,7 +670,9 @@
 #define PCI_DEVICE_ID_TI_1251B		0xac1f
 #define PCI_DEVICE_ID_TI_4410		0xac41
 #define PCI_DEVICE_ID_TI_4451		0xac42
+#define PCI_DEVICE_ID_TI_1410		0xac50
 #define PCI_DEVICE_ID_TI_1420		0xac51
+#define PCI_DEVICE_ID_TI_1520		0xac55
 
 #define PCI_VENDOR_ID_SONY		0x104d
 #define PCI_DEVICE_ID_SONY_CXD3222	0x8039
Signature · 2 lines
Russell King ([email protected])                The developer of ARM Linux
             http://www.arm.linux.org.uk/personal/aboutme.html
#1 lore raw
Quoted 2 lines · Russell King

Before I push this to Linus, I'd like people with TI cardbus bridges to test this patch and ensure that there are no unfortunate side effects.

# lspci
...
00:0c.0 CardBus bridge: Texas Instruments PCI4450 PC card Cardbus
Controller
00:0c.1 CardBus bridge: Texas Instruments PCI4450 PC card Cardbus
Controller
...

Currently running on 2.5.72-mm2 + Cardbus bursting on my NEC laptop. I haven't detected any problem so far but I'll stay tuned :-)