gcc -O3 and register usage
Hi all...
I was playing looking at the code gcc gives for some simple operations, and got this...
Simple C program (do you recognise it ;) ?):
struct list_head
{
struct list_head *next, *prev;
};static inline int list_empty(struct list_head *head)
{
return head->next == head;
}int use(struct list_head *l)
{
return list_empty(l);
}I use gcc 3.3.1.
Compile at -O2:
use:
pushl %ebp movl %esp, %ebp movl 8(%ebp), %eax popl %ebp cmpl %eax, (%eax) sete %al movzbl %al, %eax ret
Compile at -O3:
use:
pushl %ebp movl %esp, %ebp movl 8(%ebp), %edx popl %ebp cmpl %edx, (%edx) sete %al andl $255, %eax ret
Compile at -O3 and (at least) -march=pentiumpro:
use:
pushl %ebp movl %esp, %ebp movl 8(%ebp), %edx popl %ebp cmpl %edx, (%edx) sete %dl movzbl %dl, %eax ret
Go back to -O2, but keep -march=pentiumpro:
use:
pushl %ebp movl %esp, %ebp movl 8(%ebp), %eax popl %ebp cmpl %eax, (%eax) sete %al movzbl %al, %eax ret
Does this mean that since PentiumPro gcc has one other register (%dl) available, and it uses it only at -O3 ?
This can be a _big_ advantage to reduce register spilling (stack traffic...)
The above effect is due to the -frename-registers activated in -O3. This option is used in arch/ia64/Makefile, but it is supposed to benefit more to arches with few registers (I suppose ia64 has a ton more that ia32...)
Would if be useful ?
TIA
Signature · 4 lines
J.A. Magallon <[email protected]> \ Software is like sex: werewolf.able.es \ It's better when it's free Mandrake Linux release 9.2 (Cooker) for i586 Linux 2.4.22-rc2-jam1m (gcc 3.3.1 (Mandrake Linux 9.2 3.3.1-1mdk))
Quoted 2 lines · J.A. Magallon
Does this mean that since PentiumPro gcc has one other register (%dl) available, and it uses it only at -O3 ?
AFAIK, the EDX 32-bit register is splitted in two 16-bit halves, being the least significant half called DX which, at the sime time, is splitted in two 8-bit halves of which the most significant is called DH, while the least significant is called DL.
So, DL is not a new register, but the least significant 8-bits from the EDX CPU register.