better i386 CPU selection
cover better i386 CPU selection
Changes since the last set of patches:
- CONFIG_X86_INTEL_USERCOPY is used if at least one configured CPU supports it
- rediffed against 2.6.0-test5-mm4
[1/4]
- changed the i386 CPU selection from a choice to single options for every cpu
- renamed the M* variables to CPU_*, this is needed to ask the users upgrading from older kernels instead of silently changing the semantics
- X86_GOOD_APIC -> X86_BAD_APIC
- AMD Elan is a different subarch, you can't configure a kernel that runs on both the AMD Elan and other i386 CPUs
- added optimizing CFLAGS for the AMD Elan
- gcc 2.95 supports -march=k6 (no need for check_gcc)
- help text changes/updates
[2/4]
move "struct movsl_mask movsl_mask" to usercopy.c (CONFIG_X86_INTEL_USERCOPY is used on non-Intel CPUs)
[3/4]
- made arch/i386/kernel/cpu/Makefile CPU specific
[4/4]
- made arch/i386/kernel/cpu/mtrr/Makefile CPU specific
Dependencies between these patches:
- patch 3 requires 1+2
- patch 4 requires 1
The main part is patch 1.
Patch 2 fixes a small issue that only shows up with patch 3.
Patches 3+4 add some space optimizations by omitting unneeded code. They are _not_ required, the main part is patch 1.
TODO:
- change include/asm-i386/module.h to use some kind of bitmask
cu
Adrian
PATCH 1/4 better i386 CPU selection
- changed the i386 CPU selection from a choice to single options for every cpu
- renamed the M* variables to CPU_*, this is needed to ask the users upgrading from older kernels instead of silently changing the semantics
- X86_GOOD_APIC -> X86_BAD_APIC
- AMD Elan is a different subarch, you can't configure a kernel that runs on both the AMD Elan and other i386 CPUs
- added optimizing CFLAGS for the AMD Elan
- gcc 2.95 supports -march=k6 (no need for check_gcc)
- help text changes/updates
Compared to the last past, arch/i386/Makefile is now better readable.
diffstat output:
arch/i386/Kconfig | 258 +++++++++++++++-------------------- arch/i386/Makefile | 57 +++++-- arch/i386/boot/setup.S | 2 arch/i386/lib/mmx.c | 2 drivers/serial/8250.h | 2 include/asm-i386/apic.h | 4 include/asm-i386/bugs.h | 7 include/asm-i386/module.h | 2 include/asm-i386/processor.h | 4 include/asm-i386/timex.h | 2 10 files changed, 167 insertions(+), 173 deletions(-)
arch/i386/Kconfig renamed from arch/i386/Kconfig.old +117 -141
@@ -43,6 +43,15 @@ help Choose this option if your computer is a standard PC or compatible. +config X86_ELAN + bool "Elan" + help + Select this for an AMD Elan processor. + + Do not use this option for K6/Athlon/Opteron processors! + + If unsure choose "PC-compatible" instead. + config X86_VOYAGER bool "Voyager (NCR)" help
@@ -125,48 +134,19 @@ default y depends on SMP && X86_ES7000 && MPENTIUMIII -choice - prompt "Processor family" - default M686 -config M386 - bool "386" - ---help--- - This is the processor type of your CPU. This information is used for - optimizing purposes. In order to compile a kernel that can run on - all x86 CPU types (albeit not optimally fast), you can specify - "386" here. - - The kernel will not necessarily run on earlier architectures than - the one you have chosen, e.g. a Pentium optimized kernel will run on - a PPro, but not necessarily on a i486. - - Here are the settings recommended for greatest speed: - - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI - 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels - will run on a 386 class machine. - - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or - SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S. - - "586" for generic Pentium CPUs lacking the TSC - (time stamp counter) register. - - "Pentium-Classic" for the Intel Pentium. - - "Pentium-MMX" for the Intel Pentium MMX. - - "Pentium-Pro" for the Intel Pentium Pro. - - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron. - - "Pentium-III" for the Intel Pentium III or Coppermine Celeron. - - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron. - - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D). - - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird). - - "Crusoe" for the Transmeta Crusoe series. - - "Winchip-C6" for original IDT Winchip. - - "Winchip-2" for IDT Winchip 2. - - "Winchip-2A" for IDT Winchips with 3dNow! capabilities. - - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3. - - "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above). +if !X86_ELAN + +menu "Processor support" + +comment "Select all processors your kernel should support" - If you don't know what to do, choose "386". +config CPU_386 + bool "386" + help + Select this for a 386 series processor. -config M486 +config CPU_486 bool "486" help Select this for a 486 series processor, either Intel or one of the
@@ -174,227 +154,223 @@ DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S. -config M586 +config CPU_586 bool "586/K5/5x86/6x86/6x86MX" help - Select this for an 586 or 686 series processor such as the AMD K5, - the Intel 5x86 or 6x86, or the Intel 6x86MX. This choice does not - assume the RDTSC (Read Time Stamp Counter) instruction. + Select this for a non-Intel 586 or 686 series processor such as + the AMD K5 or the Cyrix 6x86MX. + + Several CPUs that have their own options below (e.g. AMD K6, + Duron, Athlon and Opteeron, IDT Winchip, Cyrix III and + VIA C3) do _not_ need this option. + + This choice does not assume the RDTSC (Read Time Stamp Counter) + instruction. -config M586TSC +config CPU_586TSC bool "Pentium-Classic" help Select this for a Pentium Classic processor with the RDTSC (Read - Time Stamp Counter) instruction for benchmarking. + Time Stamp Counter) instruction. -config M586MMX +config CPU_586MMX bool "Pentium-MMX" help Select this for a Pentium with the MMX graphics/multimedia extended instructions. -config M686 +config CPU_686 bool "Pentium-Pro" help - Select this for Intel Pentium Pro chips. This enables the use of - Pentium Pro extended instructions, and disables the init-time guard - against the f00f bug found in earlier Pentiums. + Select this for Intel Pentium Pro chips. -config MPENTIUMII +config CPU_PENTIUMII bool "Pentium-II/Celeron(pre-Coppermine)" help Select this for Intel chips based on the Pentium-II and - pre-Coppermine Celeron core. This option enables an unaligned - copy optimization, compiles the kernel with optimization flags - tailored for the chip, and applies any applicable Pentium Pro - optimizations. + pre-Coppermine Celeron core. -config MPENTIUMIII +config CPU_PENTIUMIII bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" help Select this for Intel chips based on the Pentium-III and - Celeron-Coppermine core. This option enables use of some - extended prefetch instructions in addition to the Pentium II - extensions. + Celeron-Coppermine core. -config MPENTIUM4 +config CPU_PENTIUM4 bool "Pentium-4/Celeron(P4-based)/Xeon" help Select this for Intel Pentium 4 chips. This includes both - the Pentium 4 and P4-based Celeron chips. This option - enables compile flags optimized for the chip, uses the - correct cache shift, and applies any applicable Pentium III - optimizations. + the Pentium 4 and P4-based Celeron chips. -config MK6 +config CPU_K6 bool "K6/K6-II/K6-III" help - Select this for an AMD K6-family processor. Enables use of - some extended instructions, and passes appropriate optimization - flags to GCC. + Select this for an AMD K6, K6-II or K6-III (aka K6-3D). -config MK7 +config CPU_K7 bool "Athlon/Duron/K7" help - Select this for an AMD Athlon K7-family processor. Enables use of - some extended instructions, and passes appropriate optimization - flags to GCC. + Select this for an AMD Athlon K7-family processor. -config MK8 +config CPU_K8 bool "Opteron/Athlon64/Hammer/K8" help - Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables - use of some extended instructions, and passes appropriate optimization - flags to GCC. - -config MELAN - bool "Elan" + Select this for an AMD Opteron or Athlon64 Hammer-family processor. -config MCRUSOE +config CPU_CRUSOE bool "Crusoe" help - Select this for a Transmeta Crusoe processor. Treats the processor - like a 586 with TSC, and sets some GCC optimization flags (like a - Pentium Pro with no alignment requirements). + Select this for a Transmeta Crusoe processor. -config MWINCHIPC6 +config CPU_WINCHIPC6 bool "Winchip-C6" help - Select this for an IDT Winchip C6 chip. Linux and GCC - treat this chip as a 586TSC with some extended instructions - and alignment requirements. + Select this for an IDT Winchip C6 chip. -config MWINCHIP2 +config CPU_WINCHIP2 bool "Winchip-2" help - Select this for an IDT Winchip-2. Linux and GCC - treat this chip as a 586TSC with some extended instructions - and alignment requirements. + Select this for an IDT Winchip-2. -config MWINCHIP3D +config CPU_WINCHIP3D bool "Winchip-2A/Winchip-3" help - Select this for an IDT Winchip-2A or 3. Linux and GCC - treat this chip as a 586TSC with some extended instructions - and alignment reqirements. Also enable out of order memory - stores for this CPU, which can increase performance of some - operations. - -config MCYRIXIII - bool "CyrixIII/VIA-C3" - help - Select this for a Cyrix III or C3 chip. Presently Linux and GCC - treat this chip as a generic 586. Whilst the CPU is 686 class, - it lacks the cmov extension which gcc assumes is present when - generating 686 code. - Note that Nehemiah (Model 9) and above will not boot with this - kernel due to them lacking the 3DNow! instructions used in earlier - incarnations of the CPU. + Select this for an IDT Winchip-2A or 3 with 3dNow! + capabilities. + +config CPU_CYRIXIII + bool "Cyrix III/VIA C3" + help + Select this for a Cyrix III or VIA C3 chip. -config MVIAC3_2 + Note that Nehemiah (Model 9) and above need the next + option instead. + +config CPU_VIAC3_2 bool "VIA C3-2 (Nehemiah)" help - Select this for a VIA C3 "Nehemiah". Selecting this enables usage - of SSE and tells gcc to treat the CPU as a 686. - Note, this kernel will not boot on older (pre model 9) C3s. + Select this for a VIA C3 "Nehemiah" (model 9 and above). -endchoice +endmenu -config X86_GENERIC - bool "Generic x86 support" - help - Including some tuning for non selected x86 CPUs too. - when it has moderate overhead. This is intended for generic - distributions kernels. +endif + +# +# helper options +# +config CPU_INTEL + bool + depends on CPU_386 || CPU_486 || CPU_586TSC || CPU_686 || CPU_PENTIUMII || CPU_PENTIUMIII || CPU_PENTIUM4 + default y + +config CPU_WINCHIP + bool + depends on CPU_WINCHIPC6 || CPU_WINCHIP2 || CPU_WINCHIP3D + default y + +config CPU_ONLY_K7 + bool + depends on CPU_K7 && !CPU_INTEL && !CPU_K6 && !CPU_K8 && !X86_ELAN && !CPU_CRUSOE && !CPU_WINCHIP && !CPU_CYRIXIII && !CPU_VIAC3_2 + default y + +config CPU_ONLY_K8 + bool + depends on CPU_K8 && !CPU_INTEL && !CPU_K6 && !CPU_K7 && !X86_ELAN && !CPU_CRUSOE && !CPU_WINCHIP && !CPU_CYRIXIII && !CPU_VIAC3_2 + default y + +config CPU_ONLY_WINCHIP + bool + depends on CPU_WINCHIP && !CPU_INTEL && !CPU_K6 && !CPU_K7 && !CPU_K8 && !X86_ELAN && !CPU_CRUSOE && !CPU_CYRIXIII && !CPU_VIAC3_2 + default y # # Define implied options from the CPU selection here # config X86_CMPXCHG bool - depends on !M386 + depends on !CPU_386 default y config X86_XADD bool - depends on !M386 + depends on !CPU_386 default y config X86_L1_CACHE_SHIFT int - default "7" if MPENTIUM4 || X86_GENERIC - default "4" if MELAN || M486 || M386 - default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 - default "6" if MK7 || MK8 + default "7" if CPU_PENTIUM4 + default "6" if CPU_K7 || CPU_K8 + default "5" if CPU_WINCHIP || CPU_CRUSOE || CPU_CYRIXIII || CPU_K6 || CPU_PENTIUMIII || CPU_PENTIUMII || CPU_686 || CPU_586MMX || CPU_586TSC || CPU_586 || CPU_VIAC3_2 + default "4" if X86_ELAN || CPU_486 || CPU_386 config RWSEM_GENERIC_SPINLOCK bool - depends on M386 + depends on CPU_386 default y config RWSEM_XCHGADD_ALGORITHM bool - depends on !M386 + depends on !CPU_386 default y config X86_PPRO_FENCE bool - depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 + depends on CPU_686 default y config X86_F00F_BUG bool - depends on M586MMX || M586TSC || M586 || M486 || M386 + depends on CPU_586MMX || CPU_586TSC default y config X86_WP_WORKS_OK bool - depends on !M386 + depends on !CPU_386 default y config X86_INVLPG bool - depends on !M386 + depends on !CPU_386 default y config X86_BSWAP bool - depends on !M386 + depends on !CPU_386 default y config X86_POPAD_OK bool - depends on !M386 + depends on !CPU_386 default y config X86_ALIGNMENT_16 bool - depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 + depends on CPU_WINCHIP || CPU_CYRIXIII || X86_ELAN || CPU_K6 || CPU_586MMX || CPU_586TSC || CPU_586 || CPU_486 || CPU_VIAC3_2 default y -config X86_GOOD_APIC +config X86_BAD_APIC bool - depends on MK7 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 + depends on CPU_586TSC default y config X86_INTEL_USERCOPY bool - depends on MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 + depends on CPU_K7 || CPU_K8 || CPU_MPENTIUMII || CPU_MPENTIUMIII || CPU_MPENTIUM4 default y config X86_USE_PPRO_CHECKSUM bool - depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 + depends on !CPU_386 && !CPU_486 && !CPU_586 && !CPU_586TSC && !CPU_586MMX && !X86_ELAN && !CPU_CRUSOE default y config X86_USE_3DNOW bool - depends on MCYRIXIII || MK7 + depends on !CPU_INTEL && !CPU_K6 && !CPU_K8 && !X86_ELAN && !CPU_CRUSOE && !CPU_WINCHIP && !CPU_VIAC3_2 default y config X86_OOSTORE bool - depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 + depends on CPU_ONLY_WINCHIP default y config X86_4G
@@ -555,7 +531,7 @@ config X86_TSC bool - depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2) && !X86_NUMAQ + depends on !X86_NUMAQ && !CPU_386 && !CPU_486 && !CPU_586 && !X86_ELAN && !CPU_WINCHIPC6 default y config X86_MCE
arch/i386/Makefile renamed from arch/i386/Makefile.old +38 -19
66 lines not on this page · raw message
include/asm-i386/processor.h renamed from include/asm-i386/processor.h.old +2 -2
@@ -555,7 +555,7 @@#define K7_NOP7 ".byte 0x8D,0x04,0x05,0,0,0,0\n"#define K7_NOP8 K7_NOP7 ASM_NOP1 -#ifdef CONFIG_MK8 +#ifdef CONFIG_CPU_ONLY_K8 #define ASM_NOP1 K8_NOP1#define ASM_NOP2 K8_NOP2#define ASM_NOP3 K8_NOP3
@@ -564,7 +564,7 @@#define ASM_NOP6 K8_NOP6#define ASM_NOP7 K8_NOP7#define ASM_NOP8 K8_NOP8 -#elif defined(CONFIG_MK7 ) +#elif defined(CONFIG_CPU_ONLY_K7 )#define ASM_NOP1 K7_NOP1#define ASM_NOP2 K7_NOP2#define ASM_NOP3 K7_NOP3
drivers/serial/8250.h renamed from drivers/serial/8250.h.old +1 -1
@@ -44,7 +44,7 @@#undef SERIAL_DEBUG_PCI -#if defined(__i386__) && (defined(CONFIG_M386 ) || defined(CONFIG_M486 )) +#if defined(__i386__) && (defined(CONFIG_CPU_386 ) || defined(CONFIG_CPU_486 ))#define SERIAL_INLINE #endif
arch/i386/boot/setup.S renamed from arch/i386/boot/setup.S.old +1 -1
@@ -755,7 +755,7 @@ # AMD Elan bug fix by Robert Schwebel. # -#if defined(CONFIG_MELAN) +#if defined(CONFIG_X86_ELAN) movb $0x02, %al # alternate A20 gate outb %al, $0x92 # this works on SC410/SC520 a20_elan_wait:
include/asm-i386/timex.h renamed from include/asm-i386/timex.h.old +1 -1
@@ -12,7 +12,7 @@#ifdef CONFIG_X86_PC9800 extern int CLOCK_TICK_RATE ;#else -#ifdef CONFIG_MELAN +#ifdef CONFIG_X86_ELAN # define CLOCK_TICK_RATE 1189200/* AMD Elan has different frequency! */ #else # define CLOCK_TICK_RATE 1193182/* Underlying HZ */
arch/i386/lib/mmx.c renamed from arch/i386/lib/mmx.c.old +1 -1
@@ -121,7 +121,7 @@return p; } -#ifdef CONFIG_MK7 +#ifdef CONFIG_CPU_ONLY_K7 /* * The K7 has streaming cache bypass load/store. The Cyrix III, K6 and
include/asm-i386/bugs.h renamed from include/asm-i386/bugs.h.old +3 -4
@@ -165,9 +165,8 @@* - In order to run on anything without a TSC, we need to be * compiled for a i486. * - In order to support the local APIC on a buggy Pentium machine, -* we need to be compiled with CONFIG_X86_GOOD_APIC disabled, -* which happens implicitly if compiled for a Pentium or lower -* (unless an advanced selection of CPU features is used) as an +* we need to be compiled with CONFIG_X86_BAD_APIC enabled, +* which happens implicitly if compiled for a Pentium as an * otherwise config implies a properly working local APIC without * the need to do extra reads from the APIC. */
@@ -198,7 +197,7 @@* integrated APIC (see 11AP erratum in "Pentium Processor * Specification Update"). */ -#if defined(CONFIG_X86_LOCAL_APIC ) && defined(CONFIG_X86_GOOD_APIC ) +#if defined(CONFIG_X86_LOCAL_APIC ) && !defined(CONFIG_X86_BAD_APIC )if (boot_cpu_data.x86_vendor ==X86_VENDOR_INTEL && cpu_has_apic && boot_cpu_data.x86 == 5
include/asm-i386/module.h renamed from include/asm-i386/module.h.old +1 -1
@@ -49,7 +49,7 @@#elif CONFIG_MVIAC3_2 #define MODULE_PROC_FAMILY "VIAC3-2 "#else -#error unknown processor family +#define MODULE_PROC_FAMILY "this needs to be fixed"#endif #define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
include/asm-i386/apic.h renamed from include/asm-i386/apic.h.old +2 -2
@@ -41,7 +41,7 @@do { }while (apic_read (APIC_ICR ) &APIC_ICR_BUSY ); } -#ifdef CONFIG_X86_GOOD_APIC +#ifndef CONFIG_X86_BAD_APIC # define FORCE_READ_AROUND_WRITE 0# define apic_read_around (x)# define apic_write_around (x,y) apic_write((x),(y))
@@ -56,7 +56,7 @@/* * ack_APIC_irq() actually gets compiled as a single instruction: * - a single rmw on Pentium/82489DX -* - a single write on P6+ cores (CONFIG_X86_GOOD_APIC) +* - a single write on P6+ cores (!CONFIG_X86_BAD_APIC) * ... yummie. */
PATCH 2/4 better i386 CPU selection
In reply to Adrian Bunk- move "struct movsl_mask movsl_mask" to usercopy.c (CONFIG_X86_INTEL_USERCOPY is used on non-Intel CPUs)
diffstat output:
arch/i386/kernel/cpu/intel.c | 7 ------- arch/i386/lib/usercopy.c | 7 +++++++ 2 files changed, 7 insertions(+), 7 deletions(-)
arch/i386/kernel/cpu/intel.c renamed from arch/i386/kernel/cpu/intel.c.old +0 -7
@@ -12,13 +12,6 @@#include "cpu.h" -#ifdef CONFIG_X86_INTEL_USERCOPY -/* -* Alignment at which movsl is preferred for bulk memory copies. -*/ -struct movsl_mask movsl_mask; -#endif -/* * Early probe support logic for ppro memory erratum #50 *
arch/i386/lib/usercopy.c renamed from arch/i386/lib/usercopy.c.old +7 -0
@@ -12,6 +12,13 @@#include <asm/uaccess.h> #include <asm/mmx.h> +#ifdef CONFIG_X86_INTEL_USERCOPY +/* +* Alignment at which movsl is preferred for bulk memory copies. +*/ +struct movsl_mask movsl_mask; +#endif +static inline int __movsl_is_ok (unsigned long a1,unsigned long a2,unsigned long n) {#ifdef CONFIG_X86_INTEL_USERCOPY
PATCH 3/4 better i386 CPU selection
In reply to Adrian Bunk- make arch/i386/kernel/cpu/Makefile CPU specific
diffstat output:
arch/i386/kernel/cpu/Makefile | 34 +++++++++++++++++++++++++--------- arch/i386/kernel/cpu/common.c | 27 +++++++++++++++++++++++++++ arch/i386/mm/init.c | 6 +++++- 3 files changed, 57 insertions(+), 10 deletions(-)
arch/i386/kernel/cpu/Makefile renamed from arch/i386/kernel/cpu/Makefile.old +25 -9
@@ -2,16 +2,32 @@ # Makefile for x86-compatible CPU details and quirks # -obj-y := common.o proc.o +obj-y := common.o proc.o + + +obj-$(CONFIG_CPU_486) += amd.o +obj-$(CONFIG_CPU_586) += amd.o +obj-$(CONFIG_CPU_K6) += amd.o +obj-$(CONFIG_CPU_K7) += amd.o +obj-$(CONFIG_CPU_K8) += amd.o + +obj-$(CONFIG_CPU_WINCHIP) += centaur.o +obj-$(CONFIG_CPU_CYRIXIII) += centaur.o +obj-$(CONFIG_CPU_VIAC3_2) += centaur.o + +obj-$(CONFIG_CPU_486) += cyrix.o +obj-$(CONFIG_CPU_586) += cyrix.o + +obj-$(CONFIG_CPU_INTEL) += intel.o + +obj-$(CONFIG_CPU_586) += nexgen.o + +obj-$(CONFIG_CPU_586) += rise.o + +obj-$(CONFIG_CPU_CRUSOE) += transmeta.o + +obj-$(CONFIG_CPU_486) += umc.o -obj-y += amd.o -obj-y += cyrix.o -obj-y += centaur.o -obj-y += transmeta.o -obj-y += intel.o -obj-y += rise.o -obj-y += nexgen.o -obj-y += umc.o obj-$(CONFIG_X86_MCE) += mcheck/
arch/i386/kernel/cpu/common.c renamed from arch/i386/kernel/cpu/common.c.old +27 -0
@@ -434,15 +434,42 @@void __init early_cpu_init (void ) { + +#if defined(CONFIG_CPU_INTEL )intel_cpu_init (); +#endif + +#if defined(CONFIG_CPU_486 ) || defined(CONFIG_CPU_586 )cyrix_init_cpu (); +#endif + +#if defined(CONFIG_CPU_486 )nsc_init_cpu (); +#endif + +#if defined(CONFIG_CPU_486 ) || defined(CONFIG_CPU_586 ) || defined(CONFIG_CPU_K6 ) || defined(CONFIG_CPU_K7 ) || defined(CONFIG_CPU_K8 )amd_init_cpu (); +#endif + +#if defined(CONFIG_CPU_WINCHIP ) || defined(CONFIG_CPU_CYRIXIII ) || defined(CONFIG_CPU_VIAC3_2 )centaur_init_cpu (); +#endif + +#if defined(CONFIG_CPU_CRUSOE )transmeta_init_cpu (); +#endif + +#if defined(CONFIG_CPU_586 )rise_init_cpu (); +#endif + +#if defined(CONFIG_CPU_586 )nexgen_init_cpu (); +#endif + +#if defined(CONFIG_CPU_486 )umc_init_cpu (); +#endif #ifdef CONFIG_DEBUG_PAGEALLOC /* pse is not compatible with on-the-fly unmapping,
arch/i386/mm/init.c renamed from arch/i386/mm/init.c.old +5 -1
@@ -423,8 +423,12 @@if (!mem_map)BUG ();#endif - + +#ifdef CONFIG_CPU_686 bad_ppro =ppro_with_ram_bug (); +#else + bad_ppro =0 ; +#endif #ifdef CONFIG_HIGHMEM /* check that fixmap and pkmap do not overlap */
PATCH 4/4 better i386 CPU selection
In reply to Adrian Bunk- make arch/i386/kernel/cpu/mtrr/Makefile CPU specific
diffstat output:
arch/i386/kernel/cpu/mtrr/Makefile | 14 ++++++++++---- arch/i386/kernel/cpu/mtrr/main.c | 14 ++++++++++++++ 2 files changed, 24 insertions(+), 4 deletions(-)
arch/i386/kernel/cpu/mtrr/Makefile renamed from arch/i386/kernel/cpu/mtrr/Makefile.old +10 -4
@@ -1,5 +1,11 @@ -obj-y := main.o if.o generic.o state.o -obj-y += amd.o -obj-y += cyrix.o -obj-y += centaur.o +obj-y := main.o if.o generic.o state.o + +obj-$(CONFIG_CPU_K6) += amd.o + +obj-$(CONFIG_CPU_586) += cyrix.o + +obj-$(CONFIG_CPU_WINCHIP) += centaur.o +obj-$(CONFIG_CPU_CYRIXIII) += centaur.o +obj-$(CONFIG_CPU_VIAC3_2) += centaur.o +
arch/i386/kernel/cpu/mtrr/main.c renamed from arch/i386/kernel/cpu/mtrr/main.c.old +14 -0
@@ -475,12 +475,16 @@printk (KERN_WARNING "mtrr: register: %d too big\n" , reg); goto out; } + +#if defined(CONFIG_CPU_586 )if (is_cpu (CYRIX ) && !use_intel ()) {if ((reg ==3 ) && arr3_protected) {printk (KERN_WARNING "mtrr: ARR3 cannot be changed\n" ); goto out; } } +#endif + mtrr_if->get (reg, &lbase, &lsize, <ype);if (lsize <1 ) {printk (KERN_WARNING "mtrr: MTRR %d not used\n" , reg);
@@ -536,9 +540,19 @@static void __init init_ifs (void ) { + +#if defined(CONFIG_CPU_K6 )amd_init_mtrr (); +#endif + +#if defined(CONFIG_CPU_586 )cyrix_init_mtrr (); +#endif + +#if defined(CONFIG_CPU_WINCHIP ) || defined(CONFIG_CPU_CYRIXIII ) || defined(CONFIG_CPU_VIAC3_2 )centaur_init_mtrr (); +#endif + }static void init_other_cpus (void )
On Thu, 2003-09-25 20:02:23 +0200, Adrian Bunk <[email protected]> wrote in message <[email protected]>:
Quoted 4 lines
Changes since the last set of patches:
[1/4]
- changed the i386 CPU selection from a choice to single options for every cpu
If only "slow" CPUs are selected (i386 .. Pentium Classic/MMX), I'd really like to see HZ=100 (or even less) because on these machines, the timer interrupt handler consumes a measureable amount of time...
MfG, JBG
Signature · 4 lines
Jan-Benedict Glaw [email protected] . +49-172-7608481 "Eine Freie Meinung in einem Freien Kopf | Gegen Zensur | Gegen Krieg fuer einen Freien Staat voll Freier Bürger" | im Internet! | im Irak! ret = do_actions((curr | FREE_SPEECH) & ~(NEW_COPYRIGHT_LAW | DRM | TCPA));
Quoted 10 lines · Jan-Benedict Glaw
On Thu, 2003-09-25 20:02:23 +0200, Adrian Bunk <[email protected]> wrote in message <[email protected]>:
Quoted 4 lines
Changes since the last set of patches:
[1/4]
- changed the i386 CPU selection from a choice to single options for every cpuIf only "slow" CPUs are selected (i386 .. Pentium Classic/MMX), I'd really like to see HZ=100 (or even less) because on these machines, the timer interrupt handler consumes a measureable amount of time...
AFAIR there was a patch floating around that added a config option for HZ. With such a patch integrated it would be eeasy to integrate this into my patch.
Quoted 1 line
MfG, JBG
cu
Adrian
Signature · 4 lines
"Is there not promise of rain?" Ling Tan asked suddenly out
of the darkness. There had been need of rain for many days.
"Only a promise," Lao Er said.
Pearl S. Buck - Dragon Seed