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Cleanup SEP errata workaround.

PATCH Applied [email protected] 2 participants 3 messages Sep 29, 2003

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#0 lore raw

PATCH 1/1 Cleanup SEP errata workaround.

This looks a little simpler, and has the same effect.

arch/i386/kernel/cpu/intel.c +3 -6
diff -urpN --exclude-from=/home/davej/.exclude bk-linus/arch/i386/kernel/cpu/intel.c linux-2.5/arch/i386/kernel/cpu/intel.c
@@ -238,12 +269,9 @@ static void __init init_intel(struct cpu
 	}
 
 	/* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3 mask 3 */
-	if ( c->x86 == 6) {
-		unsigned model_mask = (c->x86_model << 8) + c->x86_mask;
-		if (model_mask < 0x0303)
-			clear_bit(X86_FEATURE_SEP, c->x86_capability);
-	}
-	
+	if ((c->x86<<8 | c->x86_model<<4 | c->x86_mask) < 0x633)
+		clear_bit(X86_FEATURE_SEP, c->x86_capability);
+
 	/* Names for the Pentium II/Celeron processors 
 	   detectable only by also checking the cache size.
 	   Dixon is NOT a Celeron. */
#1 lore raw
Quoted 2 lines · On Mon, 29 Sep 2003 [email protected] wrote:

This looks a little simpler, and has the same effect.

Well, "almost same". Let's hope that Intel never releases an old Pentium with SEP ;)

Applied.

Linus

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#2 lore raw
Quoted 7 lines · Linus Torvalds
Quoted 2 lines · On Mon, 29 Sep 2003 [email protected] wrote:

This looks a little simpler, and has the same effect.

Well, "almost same". Let's hope that Intel never releases an old Pentium with SEP ;)

8-) FWIW, Intel doc 24161823.pdf (Processor Identification & CPUID instruction reference) section 3.4 does this check the same way as I did..

But lets worry about Intel being silly if/when they decide to do so 8-)

Dave

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 Dave Jones     http://www.codemonkey.org.uk