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adaptec 1210sa

PATCH In review Mickael Marchand 4 participants 9 messages Dec 22, 2003 – Jan 3, 2004

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Mickael Marchand

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#0 lore raw

PATCH 1/1 adaptec 1210sa

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Hi,

reading linux-scsi I found a suggestion by Justin to make adaptec's 1210 sa working. I made the corresponding patch for libata, and it actually works :)

it needs some redesign to only apply to aar1210 (as standard sil3112 does not need it) and I guess some testing before inclusion.

the idea suggested by Justin was to clear bits 6 and 7 at 0x8a of pci configuration space. (which I hope did fine :)

Thanks Justin :)

Cheers,
Mik
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drivers/scsi/sata_sil.c renamed from usr/src/linux-2.6.0/drivers/scsi/sata_sil.c +10 -0
@@ -276,6 +276,16 @@
 		goto err_out_regions;
 	}
 
+	//let's have fun
+	u8 v; 
+	pci_read_config_byte(pdev, 0x8a, &v);
+	int mask = 0x3f; //clear 6 and 7 bits
+	if (v & ~mask) {
+		printk("Reenabling interrupts because Adaptec's BIOS disables them\n" );
+		v &= mask;
+		pci_write_config_byte(pdev, 0x8a, v);
+	}
+
 	memset(probe_ent, 0, sizeof(*probe_ent));
 	INIT_LIST_HEAD(&probe_ent->node);
 	probe_ent->pdev = pdev;
#1 lore raw
Quoted 5 lines · Mickael Marchand

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Hi,

Quoted 7 lines

reading linux-scsi I found a suggestion by Justin to make adaptec's 1210 sa working. I made the corresponding patch for libata, and it actually works :)

it needs some redesign to only apply to aar1210 (as standard sil3112 does not need it) and I guess some testing before inclusion.

the idea suggested by Justin was to clear bits 6 and 7 at 0x8a of pci configuration space. (which I hope did fine :)

Thanks Justin :)

Does the aar1210 have a different PCI id? That would make it easy to distinguish, and thus easy to selectively apply your patch only to Adaptec chipsets that need it.

Jeff

#2 lore raw
Quoted 9 lines
Quoted 4 lines

the idea suggested by Justin was to clear bits 6 and 7 at 0x8a of pci configuration space. (which I hope did fine :)

Thanks Justin :)

Does the aar1210 have a different PCI id? That would make it easy to distinguish, and thus easy to selectively apply your patch only to Adaptec chipsets that need it.

The change is harmless for controllers using non-adaptec BIOSes. You'll find that on these other controllers, the interrupt masks are already clear. If this wasn't the case, the current Linux driver wouldn't work even on stock boards.

--
Justin

#3 lore raw
Quoted 10 lines · Justin T. Gibbs
Quoted 8 lines
Quoted 3 lines

the idea suggested by Justin was to clear bits 6 and 7 at 0x8a of pci configuration space. (which I hope did fine :)

Thanks Justin :)

Does the aar1210 have a different PCI id? That would make it easy to distinguish, and thus easy to selectively apply your patch only to Adaptec chipsets that need it.

Quoted 4 lines

The change is harmless for controllers using non-adaptec BIOSes. You'll find that on these other controllers, the interrupt masks are already clear. If this wasn't the case, the current Linux driver wouldn't work even on stock boards.

The current Linux driver (well, my sata_sil at least) doesn't work for several situations, at the moment :) I need to handle the watchdog timer, and also need to mask a bunch of SATA-phy-specific interrupts.

Now that I see in the docs that these bits are present in the stock 3112, it makes sense to unconditionally ensure they are clear, thus completely eliminating the BIOS from the equation.

Jeff

#4 lore raw
In reply to Jeff Garzik
Quoted 10 lines · Jeff Garzik
Quoted 5 lines · Mickael Marchand

it needs some redesign to only apply to aar1210 (as standard sil3112 does not need it) and I guess some testing before inclusion.

the idea suggested by Justin was to clear bits 6 and 7 at 0x8a of pci configuration space. (which I hope did fine :)

Does the aar1210 have a different PCI id? That would make it easy to distinguish, and thus easy to selectively apply your patch only to Adaptec chipsets that need it.

It's not directly relevant, given the rest of this thread, but the
AAR-1210SA does have a different PCI ID to the standard SiI3112.

Hugo.

Signature · 5 lines
=== Hugo Mills: hugo@... carfax.org.uk | darksatanic.net | lug.org.uk ===
  PGP key: 1C335860 from wwwkeys.eu.pgp.net or http://www.carfax.org.uk
   --- Anyone who claims their cryptographic protocol is secure is ---   
         either a genius or a fool.  Given the genius/fool ratio         
                 for our species,  the odds aren't good.
#5 lore raw
In reply to Mickael Marchand
Quoted 9 lines · Mickael Marchand
drivers/scsi/sata_sil.c renamed from usr/src/linux-2.6.0/drivers/scsi/sata_sil.c +3 -0
@@ -276,6 +276,16 @@
 		goto err_out_regions;
 	}
 
+	//let's have fun
+	u8 v; 
+	pci_read_config_byte(pdev, 0x8a, &v);

drivers/scsi/sata_sil.c line 291

Quoted 10 lines
drivers/scsi/sata_sil.c renamed from usr/src/linux-2.6.0/drivers/scsi/sata_sil.c +7 -0
+	int mask = 0x3f; //clear 6 and 7 bits
+	if (v & ~mask) {
+		printk("Reenabling interrupts because Adaptec's BIOS disables them\n" );
+		v &= mask;
+		pci_write_config_byte(pdev, 0x8a, v);
+	}
+
 	memset(probe_ent, 0, sizeof(*probe_ent));
 	INIT_LIST_HEAD(&probe_ent->node);
 	probe_ent->pdev = pdev;

Actually, ignore that last question. The SII docs indicate these bits are present in the standard SII 3112 chip, so the driver should just make sure to do this unconditionally.

Bart, the above applies to siimage.c as well. The following are equal:
* PCI config reg 0x8a (byte), bits 6/7
* PCI config reg 0x88 (dword), bits 22/23
* MMIO offset 0x48 (dword), bits 22/23

The lower bit masks IDE0 interrupts, and the higher bit masks IDE1 interrupts.

Jeff

#6 lore raw
In reply to Mickael Marchand
Quoted 3 lines · Mickael Marchand

reading linux-scsi I found a suggestion by Justin to make adaptec's 1210 sa working. I made the corresponding patch for libata, and it actually works :)

it needs some redesign to only apply to aar1210 (as standard sil3112 does not need it) and I guess some testing before inclusion.

Here is the patch I'm applying. Please test and let me know how it goes.

Also, someone please send me a patch for the PCI ids :)

Jeff

===== drivers/scsi/sata_sil.c 1.3 vs edited =====

drivers/scsi/sata_sil.c +13 -0
@@ -40,6 +40,10 @@
 enum {
 	sil_3112		= 0,
 
+	SIL_SYSCFG		= 0x48,
+	SIL_MASK_IDE0_INT	= (1 << 22),
+	SIL_MASK_IDE1_INT	= (1 << 23),
+
 	SIL_IDE0_TF		= 0x80,
 	SIL_IDE0_CTL		= 0x8A,
 	SIL_IDE0_BMDMA		= 0x00,

@@ -236,6 +240,7 @@
 	unsigned long base;
 	void *mmio_base;
 	int rc;
+	u32 tmp;
 
 	if (!printed_version++)
 		printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");

@@ -295,6 +300,14 @@
 	probe_ent->port[1].bmdma_addr = base + SIL_IDE1_BMDMA;
 	probe_ent->port[1].scr_addr = base + SIL_IDE1_SCR;
 	ata_std_ports(&probe_ent->port[1]);
+
+	/* make sure IDE0/1 interrupts are not masked */
+	tmp = readl(mmio_base + SIL_SYSCFG);
+	if (tmp & (SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT)) {
+		tmp &= ~(SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT);
+		writel(tmp, mmio_base + SIL_SYSCFG);
+		readl(mmio_base + SIL_SYSCFG);	/* flush */
+	}
 
 	pci_set_master(pdev);
author
#7 lore raw

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Hi,

I can't test atm, I will test it in a few days.

here is the patch I used (the previous one was incomplete - diffed against the wrong file-), it includes the PCI ids you need.

Cheers,
Mik

Le Wednesday 31 December 2003 01:20, vous avez écrit :

Quoted 5 lines
Quoted 4 lines · Mickael Marchand

reading linux-scsi I found a suggestion by Justin to make adaptec's 1210 sa working. I made the corresponding patch for libata, and it actually works :)

Quoted 8 lines
Quoted 2 lines

it needs some redesign to only apply to aar1210 (as standard sil3112 does not need it) and I guess some testing before inclusion.

Here is the patch I'm applying. Please test and let me know how it goes.

Also, someone please send me a patch for the PCI ids :)

Jeff

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drivers/scsi/sata_sil.c +20 -0
@@ -39,6 +39,7 @@
 
 enum {
 	sil_3112		= 0,
+	aar1210sa		= 1,
 
 	SIL_IDE0_TF		= 0x80,
 	SIL_IDE0_CTL		= 0x8A,

@@ -62,6 +63,7 @@
 
 static struct pci_device_id sil_pci_tbl[] = {
 	{ 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
+	{ 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, aar1210sa },
 	{ }	/* terminate list */
 };
 

@@ -122,6 +124,15 @@
 		.udma_mask	= 0x7f,			/* udma0-6; FIXME */
 		.port_ops	= &sil_ops,
 	},
+	/* aar1210sa */
+	{
+		.sht		= &sil_sht,
+		.host_flags	= ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
+				  ATA_FLAG_SRST | ATA_FLAG_MMIO,
+		.pio_mask	= 0x03,			/* pio3-4 */
+		.udma_mask	= 0x7f,			/* udma0-6; FIXME */
+		.port_ops	= &sil_ops,
+	},
 };
 
 MODULE_AUTHOR("Jeff Garzik");

@@ -263,6 +274,15 @@
 		goto err_out_regions;
 	}
 
+	u8 v;
+	pci_read_config_byte(pdev, 0x8a, &v);
+	int mask = 0x3f; //clear 6 and 7 bits
+	if (v & ~mask) {
+		printk("Reenabling interrupts because Adaptec's BIOS disables them\n" );
+		v &= mask;
+		pci_write_config_byte(pdev, 0x8a, v);
+	}
+
 	memset(probe_ent, 0, sizeof(*probe_ent));
 	INIT_LIST_HEAD(&probe_ent->node);
 	probe_ent->pdev = pdev;
author
#8 lore raw
In reply to Jeff Garzik

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Hash: SHA1

Hi,

this patch works fine on my box (with a soft raid1 array on top of it)

Cheers,
Mik

Le Wednesday 31 December 2003 01:20, vous avez écrit :

Quoted 5 lines
Quoted 4 lines · Mickael Marchand

reading linux-scsi I found a suggestion by Justin to make adaptec's 1210 sa working. I made the corresponding patch for libata, and it actually works :)

Quoted 8 lines
Quoted 2 lines

it needs some redesign to only apply to aar1210 (as standard sil3112 does not need it) and I guess some testing before inclusion.

Here is the patch I'm applying. Please test and let me know how it goes.

Also, someone please send me a patch for the PCI ids :)

Jeff

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