don't assume iosapic interrupt controller in mca.c

Any problems with this patch? Sn2 doesn't have an iosapic interrupt controller, so we'd rather not hardcode that type into mca.c for the CPE interrupt vector.

Thanks,
Jesse

=== arch/ia64/kernel/mca.c 1.59 vs edited ==--- 1.59/arch/ia64/kernel/mca.c Thu Feb 12 16:14:34 2004
+++ edited/arch/ia64/kernel/mca.c Mon Mar 1 14:43:35 2004
@@ -103,8 +103,6 @@

static ia64_mc_info_t ia64_mc_info;

-extern struct hw_interrupt_type irq_type_iosapic_level;
-
struct ia64_mca_tlb_info ia64_mca_tlb_list[NR_CPUS];

#define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
@@ -1253,7 +1251,6 @@
if (irq_to_vector(irq) = cpev) {
desc = irq_descp(irq); desc->status |= IRQ_PER_CPU;
- desc->handler = &irq_type_iosapic_level;
setup_irq(irq, &mca_cpe_irqaction);
}
ia64_mca_register_cpev(cpev);

Some ia64 machines don't use an iosapic interrupt controller (a flagrant violation of the DIG64 spec, gasp!), so don't assume it's there in mca.c. This patch got no complaints last time I posted it, so I'm proposing it for inclusion.

Thanks,
Jesse

=== arch/ia64/kernel/mca.c 1.59 vs edited ==--- 1.59/arch/ia64/kernel/mca.c Thu Feb 12 16:14:34 2004
+++ edited/arch/ia64/kernel/mca.c Mon Mar 1 14:43:35 2004
@@ -103,8 +103,6 @@

static ia64_mc_info_t ia64_mc_info;

-extern struct hw_interrupt_type irq_type_iosapic_level;
-
struct ia64_mca_tlb_info ia64_mca_tlb_list[NR_CPUS];

#define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
@@ -1253,7 +1251,6 @@
if (irq_to_vector(irq) = cpev) {
desc = irq_descp(irq); desc->status |= IRQ_PER_CPU;
- desc->handler = &irq_type_iosapic_level;
setup_irq(irq, &mca_cpe_irqaction);
}
ia64_mca_register_cpev(cpev);

Jesse> Some ia64 machines don't use an iosapic interrupt controller Jesse> (a flagrant violation of the DIG64 spec, gasp!), so don't Jesse> assume it's there in mca.c. This patch got no complaints Jesse> last time I posted it, so I'm proposing it for inclusion.

Your changelog explains why you want to remove the offending code. It doesn't explain why the change is safe for those machines that do have I/O SAPIC. Please provide a complete ChangeLog entry (along with the patch).

Thanks,

	--david

Some ia64 machines don't use an iosapic interrupt controller (a flagrant violation of the DIG64 spec, gasp!), so don't assume it's there in mca.c. Platforms that provide a ACPI_INTERRUPT_CPEI vector are responsible for registering its interrupt controller type in platform specific code, iosapic.c:iosapic_register_platform_intr() does this for platforms with an iosapic where the CPEI vector is listed in the ACPI namespace, and on sn2, all external interrupts are assigned the irq_type_sn type, so this change of assumption should be safe.

Thanks,
Jesse

=== arch/ia64/kernel/mca.c 1.59 vs edited ==--- 1.59/arch/ia64/kernel/mca.c Thu Feb 12 16:14:34 2004
+++ edited/arch/ia64/kernel/mca.c Mon Mar 1 14:43:35 2004
@@ -103,8 +103,6 @@

static ia64_mc_info_t ia64_mc_info;

-extern struct hw_interrupt_type irq_type_iosapic_level;
-
struct ia64_mca_tlb_info ia64_mca_tlb_list[NR_CPUS];

#define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
@@ -1253,7 +1251,6 @@
if (irq_to_vector(irq) = cpev) {
desc = irq_descp(irq); desc->status |= IRQ_PER_CPU;
- desc->handler = &irq_type_iosapic_level;
setup_irq(irq, &mca_cpe_irqaction);
}
ia64_mca_register_cpev(cpev);

----- End forwarded message -----