Reorg (PCI) DMA API and add consistent alloc from irq

PATCH New Matt Porter 1 participant 1 message May 21, 2004

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Matt Porter

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2004-05-21 22:03 UTC #0 lore raw

PATCH 1/1 Reorg (PCI) DMA API and add consistent alloc from irq

The following patch reorgs the PCI DMA API and DMA API implementations on PPC32. It throws away the old consistent_*() routines that were arch-specific because 2.6 drivers should be using the generic DMA API. It defines all previous functionality natively in terms of the DMA API calls. The PCI DMA API is implemented by including asm-generic/pci-dma-compat.h. In addition, this pulls in the ARM implemented method of performing dma_alloc_coherent()/dma_free_coherent() (previously consistent_alloc()/consistent_free()) so that we comply with the requirement to be able to allocate consistent memory out of an interrupt context. We were previously unable to do that on CONFIG_NOT_COHERENT_CACHE, resulting in drivers like sym53c8xx_2 that are unable to be used on 4xx, etc.

It has been tested with a bunch of PCI and on-chip DMA devices on 7xx, 74xx, and 4xx successfully.

Comments?

-Matt

arch/ppc/Kconfig +24 -0

diff -Nru a/arch/ppc/Kconfig b/arch/ppc/Kconfig
@@ -1070,6 +1070,30 @@
 	hex "Size of user task space" if TASK_SIZE_BOOL
 	default "0x80000000"
 
+config CONSISTENT_START_BOOL
+	bool "Set custom consistent memory pool address"
+	depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
+	help
+	  This option allows you to set the base virtual address
+	  of the the consistent memory pool.  This pool of virtual
+	  memory is used to make consistent memory allocations.
+
+config CONSISTENT_START
+	hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
+	default "0xff100000" if NOT_COHERENT_CACHE
+
+config CONSISTENT_SIZE_BOOL
+	bool "Set custom consistent memory pool size"
+	depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
+	help
+	  This option allows you to set the size of the the
+	  consistent memory pool.  This pool of virtual memory
+	  is used to make consistent memory allocations.
+
+config CONSISTENT_SIZE
+	hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
+	default "0x00200000" if NOT_COHERENT_CACHE
+
 config BOOT_LOAD_BOOL
 	bool "Set the boot link/load address"
 	depends on ADVANCED_OPTIONS && !PPC_MULTIPLATFORM

arch/ppc/kernel/Makefile +1 -1

diff -Nru a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
@@ -24,8 +24,8 @@
 obj-$(CONFIG_6xx)		+= l2cr.o cpu_setup_6xx.o
 obj-$(CONFIG_POWER4)		+= cpu_setup_power4.o
 obj-$(CONFIG_MODULES)		+= module.o ppc_ksyms.o
+obj-$(CONFIG_NOT_COHERENT_CACHE)	+= dma-mapping.o
 obj-$(CONFIG_PCI)		+= pci.o
-obj-$(CONFIG_PCI)		+= pci-dma.o
 obj-$(CONFIG_KGDB)		+= ppc-stub.o
 obj-$(CONFIG_SMP)		+= smp.o smp-tbsync.o
 obj-$(CONFIG_TAU)		+= temp.o

arch/ppc/kernel/dma-mapping.c new file +439 -0

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arch/ppc/kernel/ppc_ksyms.c +0 -3

diff -Nru a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
@@ -181,9 +181,6 @@
 #endif /* CONFIG_PCI */
 
 #ifdef CONFIG_NOT_COHERENT_CACHE
-EXPORT_SYMBOL(consistent_alloc);
-EXPORT_SYMBOL(consistent_free);
-EXPORT_SYMBOL(consistent_sync);
 EXPORT_SYMBOL(flush_dcache_all);
 #endif

arch/ppc/mm/Makefile +0 -1

diff -Nru a/arch/ppc/mm/Makefile b/arch/ppc/mm/Makefile
@@ -12,4 +12,3 @@
 obj-$(CONFIG_PPC_STD_MMU)	+= hashtable.o ppc_mmu.o tlb.o
 obj-$(CONFIG_40x)		+= 4xx_mmu.o
 obj-$(CONFIG_44x)		+= 44x_mmu.o
-obj-$(CONFIG_NOT_COHERENT_CACHE)	+= cachemap.o

arch/ppc/mm/cachemap.c deleted +0 ~~-174~~

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include/asm-ppc/dma-mapping.h +87 ~~-43~~

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include/asm-ppc/io.h +0 ~~-38~~

diff -Nru a/include/asm-ppc/io.h b/include/asm-ppc/io.h
@@ -388,43 +388,5 @@
 	return 0;
 }
 
-#ifdef CONFIG_NOT_COHERENT_CACHE
-
-/*
- * DMA-consistent mapping functions for PowerPCs that don't support
- * cache snooping.  These allocate/free a region of uncached mapped
- * memory space for use with DMA devices.  Alternatively, you could
- * allocate the space "normally" and use the cache management functions
- * to ensure it is consistent.
- */
-extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
-extern void consistent_free(void *vaddr);
-extern void consistent_sync(void *vaddr, size_t size, int rw);
-extern void consistent_sync_page(struct page *page, unsigned long offset,
-				 size_t size, int rw);
-
-#define dma_cache_inv(_start,_size) \
-	invalidate_dcache_range(_start, (_start + _size))
-#define dma_cache_wback(_start,_size) \
-	clean_dcache_range(_start, (_start + _size))
-#define dma_cache_wback_inv(_start,_size) \
-	flush_dcache_range(_start, (_start + _size))
-
-#else /* ! CONFIG_NOT_COHERENT_CACHE */
-
-/*
- * Cache coherent cores.
- */
-
-#define dma_cache_inv(_start,_size)		do { } while (0)
-#define dma_cache_wback(_start,_size)		do { } while (0)
-#define dma_cache_wback_inv(_start,_size)	do { } while (0)
-
-#define consistent_alloc(gfp, size, handle)	NULL
-#define consistent_free(addr)			do { } while (0)
-#define consistent_sync(addr, size, rw)		do { } while (0)
-#define consistent_sync_page(pg, off, sz, rw)	do { } while (0)
-
-#endif /* ! CONFIG_NOT_COHERENT_CACHE */
 #endif /* _PPC_IO_H */
 #endif /* __KERNEL__ */

include/asm-ppc/kmap_types.h +1 -0

diff -Nru a/include/asm-ppc/kmap_types.h b/include/asm-ppc/kmap_types.h
@@ -16,6 +16,7 @@
 	KM_IRQ1,
 	KM_SOFTIRQ0,
 	KM_SOFTIRQ1,
+	KM_PPC_SYNC_PAGE,
 	KM_TYPE_NR
 };

include/asm-ppc/pci.h +2 ~~-230~~

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