better i386 and amd64 cpu selection
PATCH 1/1 better i386 and amd64 cpu selection
This patch changes the way the CPUs are selected from the current "select a reasonable setting that supports all your CPUs, and for further optimizations for more than one CPU type you might also want to enable X86_GENERIC" to "select all CPUs your kernel should support" which is a better understandable semantics for users (= people configuring a kernel).
As a side effect, further optimizations are possible based on this patch, but they are _not_ included.
It's now updated for 2.6.7-rc2.
This patch was too late for 2.6, but I'll try to resubmit once 2.7 opens.
Changes:
- changed the CPU selection from a choice to single options for every cpu
- X86_GENERIC is no longer required
- renamed the M* variables to CPU_*, this is needed to ask the users upgrading from older kernels instead of silently changing the semantics
- X86_GOOD_APIC -> X86_BAD_APIC
- help text changes/updates
TODO:
- module versioning
The main effect is that this patch makes it easier for people who configure kernels that should work on different CPU types. A user (= person compiling his own kernel) does no longer need any deeper knowledge when e.g. configuring a kernel that should run on both an Athlon and a Pentium 4 - he simply selects all CPUs he wants to support in his kernel.
As a side effect, this patch allows further optimizations based on the fact that e.g. a kernel for an i386 no longer needs to support an Athlon which can be used to omit support for non-selected CPUs. For exampler there is no need to include arch/i386/kernel/cpu/amd.c in your kernel if the kernel should only run on a 386; I made two such example patches that are _way_ too ugly for merging but show that this CPU selection scheme makes some more space savings possible
arch/i386/lib/mmx.c renamed from arch/i386/lib/mmx.c~better-i386-cpu-selection +1 -1
@@ -121,7 +121,7 @@ void *_mmx_memcpy(void *to, const void *return p; } -#ifdef CONFIG_MK7 +#ifdef CONFIG_CPU_ONLY_K7 /* * The K7 has streaming cache bypass load/store. The Cyrix III, K6 and
include/asm-i386/apic.h renamed from include/asm-i386/apic.h~better-i386-cpu-selection +2 -2
@@ -41,7 +41,7 @@ static __inline__ void apic_wait_icr_idldo { }while (apic_read (APIC_ICR ) &APIC_ICR_BUSY ); } -#ifdef CONFIG_X86_GOOD_APIC +#ifndef CONFIG_X86_BAD_APIC # define FORCE_READ_AROUND_WRITE 0# define apic_read_around (x)# define apic_write_around (x,y) apic_write((x),(y))
@@ -56,7 +56,7 @@ static inline void ack_APIC_irq(void)/* * ack_APIC_irq() actually gets compiled as a single instruction: * - a single rmw on Pentium/82489DX -* - a single write on P6+ cores (CONFIG_X86_GOOD_APIC) +* - a single write on P6+ cores (!CONFIG_X86_BAD_APIC) * ... yummie. */
include/asm-x86_64/apic.h renamed from include/asm-x86_64/apic.h~better-i386-cpu-selection +1 -1
@@ -52,7 +52,7 @@ static inline void ack_APIC_irq(void)/* * ack_APIC_irq() actually gets compiled as a single instruction: * - a single rmw on Pentium/82489DX -* - a single write on P6+ cores (CONFIG_X86_GOOD_APIC) +* - a single write on P6+ cores (!CONFIG_X86_BAD_APIC) * ... yummie. */
_
arch/i386/mach-voyager/voyager_smp.c renamed from arch/i386/mach-voyager/voyager_smp.c.old +3 -3
@@ -553,7 +553,7 @@/* For the 486, we can't use the 4Mb page table trick, so * must map a region of memory */ -#ifdef CONFIG_M486 +#ifdef CONFIG_CPU_486 int i;unsigned long *page_table_copies = (unsigned long *)__get_free_page (GFP_KERNEL );
@@ -610,7 +610,7 @@/* set the original swapper_pg_dir[0] to map 0 to 4Mb transparently * (so that the booting CPU can find start_32 */ orig_swapper_pg_dir0 = swapper_pg_dir[0 ]; -#ifdef CONFIG_M486 +#ifdef CONFIG_CPU_486 if (page_table_copies ==NULL )panic ("No free memory for 486 page tables\n" );for (i =0 ; i <PAGE_SIZE /sizeof (unsigned long ); i++)
@@ -669,7 +669,7 @@/* reset the page table */ swapper_pg_dir[0 ] = orig_swapper_pg_dir0;local_flush_tlb (); -#ifdef CONFIG_M486 +#ifdef CONFIG_CPU_486 free_page ((unsigned long )page_table_copies);#endif
arch/i386/Makefile renamed from arch/i386/Makefile.old +37 -20
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drivers/serial/8250.h renamed from drivers/serial/8250.h.old +1 -1
@@ -35,7 +35,7 @@#undef SERIAL_DEBUG_PCI -#if defined(__i386__) && (defined(CONFIG_M386 ) || defined(CONFIG_M486 )) +#if defined(__i386__) && (defined(CONFIG_CPU_386 ) || defined(CONFIG_CPU_486 ))#define SERIAL_INLINE #endif
include/asm-i386/bugs.h renamed from include/asm-i386/bugs.h.old +3 -4
@@ -152,9 +152,8 @@* - In order to run on anything without a TSC, we need to be * compiled for a i486. * - In order to support the local APIC on a buggy Pentium machine, -* we need to be compiled with CONFIG_X86_GOOD_APIC disabled, -* which happens implicitly if compiled for a Pentium or lower -* (unless an advanced selection of CPU features is used) as an +* we need to be compiled with CONFIG_X86_BAD_APIC enabled, +* which happens implicitly if compiled for a Pentium as an * otherwise config implies a properly working local APIC without * the need to do extra reads from the APIC. */
@@ -185,7 +184,7 @@* integrated APIC (see 11AP erratum in "Pentium Processor * Specification Update"). */ -#if defined(CONFIG_X86_LOCAL_APIC ) && defined(CONFIG_X86_GOOD_APIC ) +#if defined(CONFIG_X86_LOCAL_APIC ) && !defined(CONFIG_X86_BAD_APIC )if (boot_cpu_data.x86_vendor ==X86_VENDOR_INTEL && cpu_has_apic && boot_cpu_data.x86 == 5
include/asm-i386/module.h renamed from include/asm-i386/module.h.old +1 -1
@@ -51,7 +51,7 @@#elif definedCONFIG_MVIAC3_2 #define MODULE_PROC_FAMILY "VIAC3-2 "#else -#error unknown processor family +#define MODULE_PROC_FAMILY "this needs to be fixed"#endif #ifdef CONFIG_REGPARM
include/asm-i386/processor.h renamed from include/asm-i386/processor.h.old +2 -2
@@ -587,7 +587,7 @@#define K7_NOP7 ".byte 0x8D,0x04,0x05,0,0,0,0\n"#define K7_NOP8 K7_NOP7 ASM_NOP1 -#ifdef CONFIG_MK8 +#ifdef CONFIG_CPU_ONLY_K8 #define ASM_NOP1 K8_NOP1#define ASM_NOP2 K8_NOP2#define ASM_NOP3 K8_NOP3
@@ -596,7 +596,7 @@#define ASM_NOP6 K8_NOP6#define ASM_NOP7 K8_NOP7#define ASM_NOP8 K8_NOP8 -#elif defined(CONFIG_MK7 ) +#elif defined(CONFIG_CPU_ONLY_K7 )#define ASM_NOP1 K7_NOP1#define ASM_NOP2 K7_NOP2#define ASM_NOP3 K7_NOP3
arch/i386/Kconfig renamed from arch/i386/Kconfig.old +120 -142
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arch/x86_64/Kconfig renamed from arch/x86_64/Kconfig.old +15 -21
@@ -83,49 +83,43 @@ menu "Processor type and features" -choice - prompt "Processor family" - default MK8 +menu "Processor support" -config MK8 +comment "Select all processors your kernel should support" + +config CPU_K8 bool "AMD-Opteron/Athlon64" + default y help Optimize for AMD Opteron/Athlon64/Hammer/K8 CPUs. -config MPSC - bool "Intel x86-64" - help +config CPU_PSC + bool "Intel x86-64" + default y + help Optimize for Intel IA32 with 64bit extension CPUs (Prescott/Nocona/Potomac) -config GENERIC_CPU - bool "Generic-x86-64" - help - Generic x86-64 CPU. -endchoice +endmenu # # Define implied options from the CPU selection here # config X86_L1_CACHE_BYTES int - default "128" if GENERIC_CPU || MPSC - default "64" if MK8 + default "128" if CPU_PSC + default "64" if CPU_K8 config X86_L1_CACHE_SHIFT int - default "7" if GENERIC_CPU || MPSC - default "6" if MK8 + default "7" if CPU_PSC + default "6" if CPU_K8 config X86_TSC bool default y -config X86_GOOD_APIC - bool - default y - config MICROCODE tristate "/dev/cpu/microcode - Intel CPU microcode support" ---help---
@@ -163,7 +157,7 @@ # disable it for opteron optimized builds because it pulls in ACPI_BOOT config X86_HT bool - depends on SMP && !MK8 + depends on SMP && CPU_PSC default y config MATH_EMULATION
arch/x86_64/Makefile renamed from arch/x86_64/Makefile.old +7 -2
@@ -37,8 +37,13 @@ OBJCOPYFLAGS := -O binary -R .note -R .comment -S LDFLAGS_vmlinux := -e stext -cflags-$(CONFIG_MK8) += $(call check_gcc,-march=k8,) -cflags-$(CONFIG_MPSC) += $(call check_gcc,-march=nocona,) +ifndef CONFIG_CPU_PSC + cflags-$(CONFIG_CPU_K8) += $(call check_gcc,-march=k8,) +endif +ifndef CONFIG_CPU_K8 + cflags-$(CONFIG_CPU_PSC) += $(call check_gcc,-march=nocona,) +endif + CFLAGS += $(cflags-y) CFLAGS += -mno-red-zone