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page align emergency stack

DISCUSSION David Gibson 1 participant 1 message Jul 19, 2004 4 messages not in the archive

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#4 lore raw
Quoted 4 lines · David Gibson
Quoted 2 lines · Anton Blanchard
Quoted 8 lines
Quoted 6 lines
Quoted 3 lines

Do we actually need to do this? I noted that the old guard pages were page aligned, but couldn't see any particular reason for it, so I didn't transfer the alignment to the new version.

The ABI requires us to have 128 bit alignment doesnt it? Im thinking about what would happen if we saved altivec registers to the stack.

Ok, that's not quite the same thing as page alignment...

Ok, here's a patch that just applies the weaker 128-byte alignment constraint.

Andrew, please apply

The PPC64 ABI requires the stack to be 128 byte aligned (and that can become important if AltiVec registers are saved there). In the kernel, that's usually dealt with by the fact that the stack has a page more-or-less to itself. However, the emergency stacks (used in SMP bringup and when we detect a bad stack pointer) aren't necessarily page aligned, or anything aligned for that matter. This patch applies the necessary alignement constraint to them.

arch/ppc64/kernel/pacaData.c +3 -1
Index: working-2.6/arch/ppc64/kernel/pacaData.c
===================================================================
@@ -29,8 +29,10 @@
 
 /* Stack space used when we detect a bad kernel stack pointer, and
  * early in SMP boots before relocation is enabled.
+ *
+ * ABI requires stack to be 128-byte aligned
  */
-char emergency_stack[PAGE_SIZE * NR_CPUS];
+char emergency_stack[PAGE_SIZE * NR_CPUS] __attribute__((aligned(128)));
 
 /* The Paca is an array with one entry per processor.  Each contains an 
  * ItLpPaca, which contains the information shared between the 
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David Gibson			| For every complex problem there is a
david AT gibson.dropbear.id.au	| solution which is simple, neat and
				| wrong.
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