Fix __res data type (PPC 85xx)
PATCH 1/1 Fix __res data type (PPC 85xx)
Defining the residual board data as char [sizeof(bd_t] and typecasting it for each access makes not really sense. Use the real data type instead.
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/ppc/platforms/85xx/mpc8540_ads.c | 6 +++--- arch/ppc/platforms/85xx/mpc8560_ads.c | 4 ++-- arch/ppc/platforms/85xx/mpc85xx_ads_common.c | 8 +++----- arch/ppc/platforms/85xx/mpc85xx_cds_common.c | 13 ++++++------- arch/ppc/platforms/85xx/sbc8560.c | 4 ++-- arch/ppc/platforms/85xx/sbc85xx.c | 8 +++----- include/asm-ppc/mpc85xx.h | 2 +- 7 files changed, 20 insertions(+), 25 deletions(-)
---
asm-ppc/mpc85xx.h +1 -1
@@ -47,7 +47,7 @@* The "residual" board information structure the boot loader passes * into the kernel. */ -extern unsigned char __res[]; +extern bd_t __res;/* Internal IRQs on MPC85xx OpenPIC */ /* Not all of these exist on all MPC85xx implementations */
ppc/platforms/85xx/sbc85xx.c +3 -5
@@ -48,7 +48,7 @@#include <platforms/85xx/sbc85xx.h> -unsigned char __res[sizeof (bd_t)]; +bd_t __res;#ifndef CONFIG_PCI unsigned long isa_io_base =0 ;
@@ -120,11 +120,10 @@ {uint pvid, svid, phid1;uint memsize = total_memory; -bd_t *binfo = (bd_t *) __res;unsigned int freq;/* get the core frequency */ - freq = binfo->bi_intfreq; + freq = __res.bi_intfreq; pvid =mfspr (PVR ); svid =mfspr (SVR );
@@ -159,10 +158,9 @@void __init sbc8560_init_IRQ (void ) { -bd_t *binfo = (bd_t *) __res;/* Determine the Physical Address of the OpenPIC regs */ phys_addr_t OpenPIC_PAddr = - binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET; + __res.bi_immr_base + MPC85xx_OPENPIC_OFFSET; OpenPIC_Addr =ioremap (OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE); OpenPIC_InitSenses = sbc8560_openpic_initsenses; OpenPIC_NumInitSenses =sizeof (sbc8560_openpic_initsenses);
ppc/platforms/85xx/mpc85xx_ads_common.c +3 -5
@@ -56,7 +56,7 @@extern unsigned long total_memory;/* in mm/init */ -unsigned char __res[sizeof (bd_t)]; +bd_t __res;/* Internal interrupts are all Level Sensitive, and Positive Polarity */
@@ -120,11 +120,10 @@ {uint pvid, svid, phid1;uint memsize = total_memory; -bd_t *binfo = (bd_t *) __res;unsigned int freq;/* get the core frequency */ - freq = binfo->bi_intfreq; + freq = __res.bi_intfreq; pvid =mfspr (PVR ); svid =mfspr (SVR );
@@ -159,10 +158,9 @@void __init mpc85xx_ads_init_IRQ (void ) { -bd_t *binfo = (bd_t *) __res;/* Determine the Physical Address of the OpenPIC regs */ phys_addr_t OpenPIC_PAddr = - binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET; + __res.bi_immr_base + MPC85xx_OPENPIC_OFFSET; OpenPIC_Addr =ioremap (OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE); OpenPIC_InitSenses = mpc85xx_ads_openpic_initsenses; OpenPIC_NumInitSenses =sizeof (mpc85xx_ads_openpic_initsenses);
ppc/platforms/85xx/mpc85xx_cds_common.c +6 -7
@@ -64,7 +64,7 @@extern unsigned long total_memory;/* in mm/init */ -unsigned char __res[sizeof (bd_t)]; +bd_t __res;static int cds_pci_slot =2 ;static volatile u8 * cadmus;
@@ -161,11 +161,10 @@ {uint pvid, svid, phid1;uint memsize = total_memory; -bd_t *binfo = (bd_t *) __res;unsigned int freq;/* get the core frequency */ - freq = binfo->bi_intfreq; + freq = __res.bi_intfreq; pvid =mfspr (PVR ); svid =mfspr (SVR );
@@ -204,7 +203,7 @@void __init mpc85xx_cds_init_IRQ (void ) { -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;#ifdef CONFIG_CPM2 volatile cpm2_map_t *immap = cpm2_immr;int i;
@@ -337,7 +336,7 @@ {struct ocp_def *def;struct ocp_gfar_data *einfo; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;unsigned int freq;/* get the core frequency */
@@ -411,13 +410,13 @@* residual data area. */ if (r3) { -memcpy ((void *) __res, (void *) (r3 +KERNELBASE ), +memcpy ((void *) &__res, (void *) (r3 +KERNELBASE ),sizeof (bd_t)); }#ifdef CONFIG_SERIAL_TEXT_DEBUG { -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ settlbcam(NUM_TLBCAMS - 1, binfo->bi_immr_base,
ppc/platforms/85xx/mpc8540_ads.c +3 -3
@@ -102,7 +102,7 @@ {struct ocp_def *def;struct ocp_gfar_data *einfo; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;unsigned int freq;/* get the core frequency */
@@ -175,12 +175,12 @@* residual data area. */ if (r3) { -memcpy ((void *) __res, (void *) (r3 +KERNELBASE ), +memcpy ((void *) &__res, (void *) (r3 +KERNELBASE ),sizeof (bd_t)); }#ifdef CONFIG_SERIAL_TEXT_DEBUG { -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ settlbcam(NUM_TLBCAMS - 1, binfo->bi_immr_base,
ppc/platforms/85xx/mpc8560_ads.c +2 -2
@@ -97,7 +97,7 @@ {struct ocp_def *def;struct ocp_gfar_data *einfo; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;unsigned int freq;cpm2_reset ();
@@ -200,7 +200,7 @@* residual data area. */ if (r3) { -memcpy ((void *) __res, (void *) (r3 +KERNELBASE ), +memcpy ((void *) &__res, (void *) (r3 +KERNELBASE ),sizeof (bd_t)); }
ppc/platforms/85xx/sbc8560.c +2 -2
@@ -127,7 +127,7 @@ {struct ocp_def *def;struct ocp_gfar_data *einfo; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;unsigned int freq;/* get the core frequency */
@@ -193,7 +193,7 @@* residual data area. */ if (r3) { -memcpy ((void *) __res, (void *) (r3 +KERNELBASE ), +memcpy ((void *) &__res, (void *) (r3 +KERNELBASE ),sizeof (bd_t)); }
A message that is not in the archive (sent off-list or not yet received): [email protected]
Re: [PATCH] Fix __res data type (PPC 85xx) 2nd version
Kumar,
Quoted 5 lines · Kumar Gala
Thomas,
This generally looks good, I would like to apply the patch and do some testing. In the future please CC: [email protected] (this will allow us to manage the patches @ http://ozlabs.org/ppc32-patches/)
The attached patch contains the previous one and the resulting changes for syslib/ppc85xx_setup.c. It's a correct -p1 patch now.
Thanks,
tglx
include/asm-ppc/mpc85xx.h +1 -1
@@ -47,7 +47,7 @@* The "residual" board information structure the boot loader passes * into the kernel. */ -extern unsigned char __res[]; +extern bd_t __res;/* Internal IRQs on MPC85xx OpenPIC */ /* Not all of these exist on all MPC85xx implementations */
arch/ppc/platforms/85xx/sbc85xx.c +3 -5
@@ -48,7 +48,7 @@#include <platforms/85xx/sbc85xx.h> -unsigned char __res[sizeof (bd_t)]; +bd_t __res;#ifndef CONFIG_PCI unsigned long isa_io_base =0 ;
@@ -120,11 +120,10 @@ {uint pvid, svid, phid1;uint memsize = total_memory; -bd_t *binfo = (bd_t *) __res;unsigned int freq;/* get the core frequency */ - freq = binfo->bi_intfreq; + freq = __res.bi_intfreq; pvid =mfspr (PVR ); svid =mfspr (SVR );
@@ -159,10 +158,9 @@void __init sbc8560_init_IRQ (void ) { -bd_t *binfo = (bd_t *) __res;/* Determine the Physical Address of the OpenPIC regs */ phys_addr_t OpenPIC_PAddr = - binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET; + __res.bi_immr_base + MPC85xx_OPENPIC_OFFSET; OpenPIC_Addr =ioremap (OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE); OpenPIC_InitSenses = sbc8560_openpic_initsenses; OpenPIC_NumInitSenses =sizeof (sbc8560_openpic_initsenses);
arch/ppc/platforms/85xx/mpc85xx_ads_common.c +3 -5
@@ -56,7 +56,7 @@extern unsigned long total_memory;/* in mm/init */ -unsigned char __res[sizeof (bd_t)]; +bd_t __res;/* Internal interrupts are all Level Sensitive, and Positive Polarity */
@@ -120,11 +120,10 @@ {uint pvid, svid, phid1;uint memsize = total_memory; -bd_t *binfo = (bd_t *) __res;unsigned int freq;/* get the core frequency */ - freq = binfo->bi_intfreq; + freq = __res.bi_intfreq; pvid =mfspr (PVR ); svid =mfspr (SVR );
@@ -159,10 +158,9 @@void __init mpc85xx_ads_init_IRQ (void ) { -bd_t *binfo = (bd_t *) __res;/* Determine the Physical Address of the OpenPIC regs */ phys_addr_t OpenPIC_PAddr = - binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET; + __res.bi_immr_base + MPC85xx_OPENPIC_OFFSET; OpenPIC_Addr =ioremap (OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE); OpenPIC_InitSenses = mpc85xx_ads_openpic_initsenses; OpenPIC_NumInitSenses =sizeof (mpc85xx_ads_openpic_initsenses);
arch/ppc/platforms/85xx/mpc85xx_cds_common.c +6 -7
@@ -64,7 +64,7 @@extern unsigned long total_memory;/* in mm/init */ -unsigned char __res[sizeof (bd_t)]; +bd_t __res;static int cds_pci_slot =2 ;static volatile u8 * cadmus;
@@ -161,11 +161,10 @@ {uint pvid, svid, phid1;uint memsize = total_memory; -bd_t *binfo = (bd_t *) __res;unsigned int freq;/* get the core frequency */ - freq = binfo->bi_intfreq; + freq = __res.bi_intfreq; pvid =mfspr (PVR ); svid =mfspr (SVR );
@@ -204,7 +203,7 @@void __init mpc85xx_cds_init_IRQ (void ) { -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;#ifdef CONFIG_CPM2 volatile cpm2_map_t *immap = cpm2_immr;int i;
@@ -337,7 +336,7 @@ {struct ocp_def *def;struct ocp_gfar_data *einfo; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;unsigned int freq;/* get the core frequency */
@@ -411,13 +410,13 @@* residual data area. */ if (r3) { -memcpy ((void *) __res, (void *) (r3 +KERNELBASE ), +memcpy ((void *) &__res, (void *) (r3 +KERNELBASE ),sizeof (bd_t)); }#ifdef CONFIG_SERIAL_TEXT_DEBUG { -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ settlbcam(NUM_TLBCAMS - 1, binfo->bi_immr_base,
arch/ppc/platforms/85xx/mpc8540_ads.c +3 -3
@@ -102,7 +102,7 @@ {struct ocp_def *def;struct ocp_gfar_data *einfo; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;unsigned int freq;/* get the core frequency */
@@ -175,12 +175,12 @@* residual data area. */ if (r3) { -memcpy ((void *) __res, (void *) (r3 +KERNELBASE ), +memcpy ((void *) &__res, (void *) (r3 +KERNELBASE ),sizeof (bd_t)); }#ifdef CONFIG_SERIAL_TEXT_DEBUG { -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ settlbcam(NUM_TLBCAMS - 1, binfo->bi_immr_base,
arch/ppc/platforms/85xx/mpc8560_ads.c +2 -2
@@ -97,7 +97,7 @@ {struct ocp_def *def;struct ocp_gfar_data *einfo; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;unsigned int freq;cpm2_reset ();
@@ -200,7 +200,7 @@* residual data area. */ if (r3) { -memcpy ((void *) __res, (void *) (r3 +KERNELBASE ), +memcpy ((void *) &__res, (void *) (r3 +KERNELBASE ),sizeof (bd_t)); }
arch/ppc/platforms/85xx/sbc8560.c +2 -2
@@ -127,7 +127,7 @@ {struct ocp_def *def;struct ocp_gfar_data *einfo; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;unsigned int freq;/* get the core frequency */
@@ -193,7 +193,7 @@* residual data area. */ if (r3) { -memcpy ((void *) __res, (void *) (r3 +KERNELBASE ), +memcpy ((void *) &__res, (void *) (r3 +KERNELBASE ),sizeof (bd_t)); }
arch/ppc/syslib/ppc85xx_setup.c +5 -10
@@ -36,22 +36,17 @@unsigned long __init mpc85xx_find_end_of_memory (void ) { -bd_t *binfo; - - binfo = (bd_t *) __res; - -return binfo->bi_memsize; +return __res.bi_memsize; }/* The decrementer counts at the system (internal) clock freq divided by 8 */ void __init mpc85xx_calibrate_decr (void ) { -bd_t *binfo = (bd_t *) __res;unsigned int freq, divisor;/* get the core frequency */ - freq = binfo->bi_busfreq; + freq = __res.bi_busfreq;/* The timebase is updated every 8 bus clocks, HID0[SEL_TBCLK] = 0 */ divisor =8 ;
@@ -74,7 +69,7 @@mpc85xx_early_serial_map (void) {struct uart_port serial_req; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res;phys_addr_t duart_paddr = binfo->bi_immr_base + MPC85xx_UART0_OFFSET;/* Setup serial port access */
@@ -138,7 +133,7 @@volatile struct ccsr_pci *pci;volatile struct ccsr_guts *guts;unsigned short temps; -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res; pci =ioremap (binfo->bi_immr_base + MPC85xx_PCI1_OFFSET, MPC85xx_PCI1_SIZE);
@@ -250,7 +245,7 @@#ifdef CONFIG_85xx_PCI2struct pci_controller *hose_b;#endif -bd_t *binfo = (bd_t *) __res; +bd_t *binfo = &__res; hose_a =pcibios_alloc_controller ();