2.6.10-mm2: it87 sensor driver stops CPU fan

Hi,

Today I've tried 2.6.10-mm2 compiled for x86_64 and found something bad. As soon as I modprobe it87 (one of the i2c sensors drivers) the CPU fan completely halts and the CPU temperature skyrockets even while idle. For context:
I have an Athlon64 3200+ on a Gigabyte K8VT800 motherboard (i2c_viapro module) running Gentoo compiled in x86_64 mode, it87 is controlled through ISA bus, VT8237 ISA bridge.

The same setup doesn't show the problem on vanilla 2.6.10 and neither on the last -mm I tried, which IIRC was 2.6.9-rc4-mm1.

After some tweaking, it looks like ACPI is not the problem (tried to look at full debug trace, nothing appears when loading it87). Instead, I've found I can control the fan speed using /sys/devices/platform/i2c-0/0-0290/pwm1 and initially it is set to 225, but setting it to 0 the fan runs at max speed. Intermediate values works as well: the higher the value, the slower the fan.

I've google for this sysfs interface and found than everyone expects pwm* values to have the reverse meaning: 255 should be max speed and 0 should halt the fan. So apparently the problem is really in the it87 driver, using the wrong coefficient for this scale and therefore setting it to the wrong default value.

Comparing drivers/i2c/chips/it87.c in 2.6.10 vanilla and 2.6.10-mm2, I've found only -mm tree includes the pwm fan controller.

I think a quick fix could be the following, but didn't try it.

@@ -163,8 +163,8 @@
 
 #define ALARMS_FROM_REG(val) (val)
 
-#define PWM_TO_REG(val)   ((val) >> 1)
-#define PWM_FROM_REG(val) (((val)&0x7f) << 1)
+#define PWM_TO_REG(val)   ((255-val) >> 1)
+#define PWM_FROM_REG(val) (255-(((val)&0x7f) << 1))
 
 static int DIV_TO_REG(int val)
 {

Regards,
Simone Piunno

http://thisurlenablesemailtogetthroughoverzealousspamfilters.org

Hi Simone,

Thanks a lot for the detective work. You are right, PWM control was added very recently to the it87 driver in 2.6 (but is there for some time alredy for 2.4 kernels in the lm_sensors project).

The 0-255 range happens to be in the correct "direction" for at least one other board () so the it87 driver isn't plain wrong, more likely it is a matter of how the chip was wired and (mis)configured by the motherboard manufacturer. In particular, I suspect the fan polarity bit not to be properly set on your board.

Could you please provide a dump of your it87 chip before loading the it87 driver? "isadump 0x295 0x296" should tell you. I would also be interested in a dump right after you load the driver if possible (but don't burn your CPU for me).

Do you know what kind of it87 chip you do have? There are three of them, IT8705F, IT8712F and a SIS950 clone (mostly similar to the IT8705F).

Although it works for you, it probably breaks the driver for other people, so it doesn't look like the correct fix. I'll propose a patch after I see your chip dumps.

Thanks,

Jean Delvare
http://khali.linux-fr.org/

Before loading it87:

0 1 2 3 4 5 6 7 8 9 a b c d e f
00: 11 00 00 00 37 ff 00 37 ff 07 00 5b 00 2a ff ff 10: ff ff ff 30 00 00 00 00 00 00 00 00 00 00 00 00 20: 5c 9f ce b0 bf b2 83 aa 00 19 29 7f 00 00 00 00 30: ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 40: 7f 7f 7f 7f 7f 7f 00 00 2d 00 00 00 00 00 00 00 50: ff 38 7f 7f 7f 00 00 00 90 4f 06 00 50 00 00 00 60: 7f 7f 7f 7f 7f 00 00 00 7f 7f 7f 7f 7f 00 00 00 70: 7f 7f 7f 7f 7f 00 00 00 00 00 00 00 00 00 00 00 80: 11 00 00 00 37 ff 00 37 ff 07 00 5b 00 2a ff ff 90: ff ff ff 30 00 00 00 00 00 00 00 00 00 00 00 00
a0: 5c 9f ce b0 bf b2 83 aa 00 19 29 7f 00 00 00 00
b0: ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00
c0: 7f 7f 7f 7f 7f 7f 00 00 2d 00 00 00 00 00 00 00
d0: ff 38 7f 7f 7f 00 00 00 90 4f 06 00 50 00 00 00
e0: 7f 7f 7f 7f 7f 00 00 00 7f 7f 7f 7f 7f 00 00 00
f0: 7f 7f 7f 7f 7f 00 00 00 00 00 00 00 00 00 00 00

After loading it87:

0 1 2 3 4 5 6 7 8 9 a b c d e f
00: 11 03 60 00 37 ff 00 37 ff 07 00 5b 00 ff ff ff 10: fe fe fe 31 07 7f 00 00 00 00 00 00 00 00 00 00 20: 5c 9f ce b2 be a9 69 ac 00 19 26 7f 00 00 00 00 30: 62 4d a4 94 d9 c4 c3 b1 c5 b2 82 78 80 79 cd a7 40: 28 0f 2d 0f 2d 0f 00 00 2d 00 00 00 00 00 00 00 50: ff 38 7f 7f 7f 00 00 00 90 4f 06 00 50 00 00 00 60: 7f 7f 7f 7f 7f 00 00 00 7f 7f 7f 7f 7f 00 00 00 70: 7f 7f 7f 7f 7f 00 00 00 00 00 00 00 00 00 00 00 80: 11 00 00 00 37 ff 00 37 ff 07 00 5b 00 ff ff ff 90: fe fe fe 31 07 7f 00 00 00 00 00 00 00 00 00 00
a0: 5c 9f ce b2 be a9 69 ac 00 19 26 7f 00 00 00 00
b0: 62 4d a4 94 d9 c4 c3 b1 c5 b2 82 78 80 79 cd a7
c0: 28 0f 2d 0f 2d 0f 00 00 2d 00 00 00 00 00 00 00
d0: ff 38 7f 7f 7f 00 00 00 90 4f 06 00 50 00 00 00
e0: 7f 7f 7f 7f 7f 00 00 00 7f 7f 7f 7f 7f 00 00 00
f0: 7f 7f 7f 7f 7f 00 00 00 00 00 00 00 00 00 00 00

Oh, don't worry.
I've already coded a small fan controller daemon working around the problem and driving the fan to run at the minimum speed sufficient to keep the CPU cool enough. Anyone interested can look here:
http://svn.ferrara.linux.it/view/just4fan
or check it out from the subversion repository:
svn checkout http://svn.ferrara.linux.it/just4fan
In fact, now I run the system with it87 always loaded... it's soooo quiet! Now that I'm used to this silence I can't live without it: I can't stand the fan screaming anymore! I think for I won't move away from -mm until this single feature makes it into vanilla :)

I'm sorry I don't know. How I could check?

Thanks again
/Simone

http://thisurlenablesemailtogetthroughoverzealousspamfilters.org

The relevant registers are 0x13-0x17, and they are just what I expected.

The IT87xxF chips have three fan control modes: on/off, manual PWM control and automatic (temperature-based) PWM control, the default being on/off, all fans off. When switching to PWM mode, the default is manual with 0% duty cycle (i.e. all fans off again).

What you have here is this default configuration, i.e. all fans are supposedly off. Of course it isn't the case, I assume that your fans are running at full speed when you turn your computer on. So how is this possible? The IT87xxF chip have a fan polarity bit which defaults to "Active low". Providing that your fans are meant to be driven active high (and I'd guess all fans work that way without additional electronics), they are on when the IT87xxF chip wants to set them off, and off when the chip wants them on. This is why the fans apparently work OK.

While it's OK at boot time and as long as we don't want to use PWM (the fans are on even if the chip pretends they shouldn't be), the illusion breaks when we attempt to control the fan speed through the it87 driver:

Here, configuration changed. Fans in on/off mode will now be on. While it makes full sense from the driver's point of view, if breaks the fragile equilibrium state your board was in.

Additionally, the first fan control output was turned to manual PWM control mode, full speed. The driver supposedly doesn't do that, I guess you did it yourself through the sysfs interface?

This configuration supposedly sets all fans to full speed, but in your "inverted" hardware setup, this means all fans off, unfortunately, as you noticed in the first place.

I would like to insist on the fact that the ones to blame here are:
1* ITE for their poor chip defauls.
2* Motherboard manufaturers for their poor BIOSes.
And in no way Jonas, whose code was correct, just not broken-config-proof.

Well, the lm_sensors project has tools to do that already. Look in prog/pwm, there is a PWM configuration detection script (pwmconfig) and two fan control scripts (original one in shell and a reimplementation in perl). It might be more efficient to start from these and possibly improve them if needed (and contribute back!) than writing something completely new. Do as you prefer though :)

Although note that the ITxxF has an automatic PWM control mode as explained above, so it probably can do in hardware what your software daemon does. We have plans to add support for this to the it87 driver soon (actually I think Jonas is already working on the code) but we obviously cannot do that before manual mode is OK, which it isn't for now.

Mind you, there is a reason why Jonas implemented this ;)

See /sys/bus/i2c/devices/0-0290/name. If it says it8712 it's an IT8712F, if it says it87 it is a less featured IT8705F or clone. After looking at the datasheets, it doesn't matter much anymore though, as both chips have the same default values and have to be configured in the same way.

OK, so now we want to reintroduce manual PWM in the it87 driver, in a way that will not cause fans to stop unexpectedly. Here is my proposed plan:

1* Jonas, please send a modified version of your original patch to Greg. The only difference would be that you wouldn't force on/off mode to be on at driver load time. Instead, disabling PWM for one fan control output (echo 0 > pwmN_enable) would both set on/off mode to on for that output (new) and turn that output to on/off mode (same as before).

One might argue that it doesn't solve the problem but merely moves it. This is true, but this at least ensures that loading the driver will *not* change any fan speed. I think it is an important rule for all hardware monitoring chips to respect.

One might also argue that this adds some overhead (we end up writing several times to the same register, possibly for nothing, at use time instead of just once at init time) but frankly it doesn't matter much. One doesn't disable PWM that often.

Of course, at this point, trying to play with PWM on a system such as Simone's one will still break, but at least not at driver load time.

2* I would then add a check to the it87 driver, which completely disables the fan speed control interface if the initial configuration looks weird (all fans supposedly stopped and polarity set to "active low"). This should protect users of the driver who have a faulty BIOS.

When a bogus configuration is detected, we would of course complain in the logs and invite the user to complain to his/her motherboard maker too.

At this point, Simone will complain that he likes the PWM feature and wants it back ;)

3* Last, we would either add a module parameter allowing chip reprogramming with active high polarity, or write a script which does the same using i2cset or isaset. Not sure what is best. I don't much like adding brokeness-workaround init code in the kernel, but OTOH an external script might be harder to integrate into distributions etc...

At this point, Simone will have a prefectly working chip with manual PWM and should be happy :)

And then Jonas will be able to go on with the automatic speed control.

Comments on the plan anyone?

Thanks,
--
Jean Delvare

Ok, thanks for doing the thinking ;), here is the modified patch (it87.c_2.6.10-jm3-corrected_manual_pwm_20050111.diff). In addition to the above change, it also refreshes fan_main_ctrl in the update routine, as suggested by Jean on IRC.

- adds manual PWM
- removes buggy "reset" module parameter
- fixes some whitespaces

@@ -96,9 +96,6 @@ superio_exit(void)
 /* Update battery voltage after every reading if true */
 static int update_vbat;
 
-/* Reset the registers on init if true */
-static int reset;
-
 /* Chip Type */
 
 static u16 chip_type;

@@ -128,6 +125,8 @@ static u16 chip_type;
 #define IT87_REG_FAN(nr)       (0x0d + (nr))
 #define IT87_REG_FAN_MIN(nr)   (0x10 + (nr))
 #define IT87_REG_FAN_MAIN_CTRL 0x13
+#define IT87_REG_FAN_CTL       0x14
+#define IT87_REG_PWM(nr)       (0x15 + (nr))
 
 #define IT87_REG_VIN(nr)       (0x20 + (nr))
 #define IT87_REG_TEMP(nr)      (0x29 + (nr))

@@ -164,6 +163,9 @@ static inline u8 FAN_TO_REG(long rpm, in
 
 #define ALARMS_FROM_REG(val) (val)
 
+#define PWM_TO_REG(val)   ((val) >> 1)
+#define PWM_FROM_REG(val) (((val)&0x7f) << 1)
+
 static int DIV_TO_REG(int val)
 {
 	int answer = 0;

@@ -200,6 +202,8 @@ struct it87_data {
 	u8 vid;			/* Register encoding, combined */
 	int vrm;
 	u32 alarms;		/* Register encoding, combined */
+	u8 fan_main_ctrl;	/* Register value */
+	u8 manual_pwm_ctl[3];   /* manual PWM value set by user */
 };
 
 

@@ -440,18 +444,28 @@ static ssize_t show_fan(struct device *d
 {
 	struct it87_data *data = it87_update_device(dev);
 	return sprintf(buf,"%d\n", FAN_FROM_REG(data->fan[nr], 
-				DIV_FROM_REG(data->fan_div[nr])) );
+				DIV_FROM_REG(data->fan_div[nr])));
 }
 static ssize_t show_fan_min(struct device *dev, char *buf, int nr)
 {
 	struct it87_data *data = it87_update_device(dev);
 	return sprintf(buf,"%d\n",
-		FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])) );
+		FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])));
 }
 static ssize_t show_fan_div(struct device *dev, char *buf, int nr)
 {
 	struct it87_data *data = it87_update_device(dev);
-	return sprintf(buf,"%d\n", DIV_FROM_REG(data->fan_div[nr]) );
+	return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
+}
+static ssize_t show_pwm_enable(struct device *dev, char *buf, int nr)
+{
+	struct it87_data *data = it87_update_device(dev);
+	return sprintf(buf,"%d\n", (data->fan_main_ctrl & (1 << nr)) ? 1 : 0);
+}
+static ssize_t show_pwm(struct device *dev, char *buf, int nr)
+{
+	struct it87_data *data = it87_update_device(dev);
+	return sprintf(buf,"%d\n", data->manual_pwm_ctl[nr]);
 }
 static ssize_t set_fan_min(struct device *dev, const char *buf, 
 		size_t count, int nr)

@@ -499,6 +513,48 @@ static ssize_t set_fan_div(struct device
 	}
 	return count;
 }
+static ssize_t set_pwm_enable(struct device *dev, const char *buf,
+		size_t count, int nr)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct it87_data *data = i2c_get_clientdata(client);
+	int val = simple_strtol(buf, NULL, 10);
+
+	if (val == 0) {
+		int tmp;
+		/* make sure the fan is on when in on/off mode */
+		tmp = it87_read_value(client, IT87_REG_FAN_CTL);
+		it87_write_value(client, IT87_REG_FAN_CTL, tmp | (1 << nr));
+		/* set on/off mode */
+		data->fan_main_ctrl &= ~(1 << nr);
+		it87_write_value(client, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
+	} else if (val == 1) {
+		/* set SmartGuardian mode */
+		data->fan_main_ctrl |= (1 << nr);
+		it87_write_value(client, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
+		/* set saved pwm value, clear FAN_CTLX PWM mode bit */
+		it87_write_value(client, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr]));
+	} else
+		return -EINVAL;
+
+	return count;
+}
+static ssize_t set_pwm(struct device *dev, const char *buf,
+		size_t count, int nr)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct it87_data *data = i2c_get_clientdata(client);
+	int val = simple_strtol(buf, NULL, 10);
+
+	if (val < 0 || val > 255)
+		return -EINVAL;
+
+	data->manual_pwm_ctl[nr] = val;
+	if (data->fan_main_ctrl & (1 << nr))
+		it87_write_value(client, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr]));
+
+	return count;
+}
 
 #define show_fan_offset(offset)						\
 static ssize_t show_fan_##offset (struct device *dev, char *buf)	\

@@ -533,6 +589,36 @@ show_fan_offset(1);
 show_fan_offset(2);
 show_fan_offset(3);
 
+#define show_pwm_offset(offset)						\
+static ssize_t show_pwm##offset##_enable (struct device *dev,		\
+	char *buf)							\
+{									\
+	return show_pwm_enable(dev, buf, offset - 1);			\
+}									\
+static ssize_t show_pwm##offset (struct device *dev, char *buf)		\
+{									\
+	return show_pwm(dev, buf, offset - 1);				\
+}									\
+static ssize_t set_pwm##offset##_enable (struct device *dev,		\
+		const char *buf, size_t count)				\
+{									\
+	return set_pwm_enable(dev, buf, count, offset - 1);		\
+}									\
+static ssize_t set_pwm##offset (struct device *dev,			\
+		const char *buf, size_t count)				\
+{									\
+	return set_pwm(dev, buf, count, offset - 1);			\
+}									\
+static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR,		\
+		show_pwm##offset##_enable,				\
+		set_pwm##offset##_enable);				\
+static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR,			\
+		show_pwm##offset , set_pwm##offset );
+
+show_pwm_offset(1);
+show_pwm_offset(2);
+show_pwm_offset(3);
+
 /* Alarms */
 static ssize_t show_alarms(struct device *dev, char *buf)
 {

@@ -774,6 +860,12 @@ int it87_detect(struct i2c_adapter *adap
 	device_create_file(&new_client->dev, &dev_attr_fan2_div);
 	device_create_file(&new_client->dev, &dev_attr_fan3_div);
 	device_create_file(&new_client->dev, &dev_attr_alarms);
+	device_create_file(&new_client->dev, &dev_attr_pwm1_enable);
+	device_create_file(&new_client->dev, &dev_attr_pwm2_enable);
+	device_create_file(&new_client->dev, &dev_attr_pwm3_enable);
+	device_create_file(&new_client->dev, &dev_attr_pwm1);
+	device_create_file(&new_client->dev, &dev_attr_pwm2);
+	device_create_file(&new_client->dev, &dev_attr_pwm3);
 
 	if (data->type == it8712) {
 		device_create_file_vrm(new_client);

@@ -851,12 +943,17 @@ static int it87_write_value(struct i2c_c
 /* Called when we have found a new IT87. */
 static void it87_init_client(struct i2c_client *client, struct it87_data *data)
 {
-	int tmp;
+	int tmp, i;
 
-	if (reset) {
-		/* Reset all except Watchdog values and last conversion values
-		   This sets fan-divs to 2, among others */
-		it87_write_value(client, IT87_REG_CONFIG, 0x80);
+	/* initialize to sane defaults:
+	 * - if the chip is in manual pwm mode, this will be overwritten with
+	 *   the actual settings on the chip (so in this case, initialization
+	 *   is not needed)
+	 * - if in automatic or on/off mode, we could switch to manual mode,
+	 *   read the registers and set manual_pwm_ctl accordingly, but currently
+	 *   this is not implemented, so we initialize to something sane */
+	for (i = 0; i < 3; i++) {
+		data->manual_pwm_ctl[i] = 0xff;
 	}
 
 	/* Check if temperature channnels are reset manually or by some reason */

@@ -876,13 +973,31 @@ static void it87_init_client(struct i2c_
 	}
 
 	/* Check if tachometers are reset manually or by some reason */
-	tmp = it87_read_value(client, IT87_REG_FAN_MAIN_CTRL);
-	if ((tmp & 0x70) == 0) {
+	data->fan_main_ctrl = it87_read_value(client, IT87_REG_FAN_MAIN_CTRL);
+	if ((data->fan_main_ctrl & 0x70) == 0) {
 		/* Enable all fan tachometers */
-		tmp = (tmp & 0x8f) | 0x70;
-		it87_write_value(client, IT87_REG_FAN_MAIN_CTRL, tmp);
+		data->fan_main_ctrl |= 0x70;
+		it87_write_value(client, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
 	}
 
+	/* Set current fan mode registers and the default settings for the
+	 * other mode registers */
+	for (i = 0; i < 3; i++) {
+		if (data->fan_main_ctrl & (1 << i)) {
+			/* pwm mode */
+			tmp = it87_read_value(client, IT87_REG_PWM(i));
+			if (tmp & 0x80) {
+				/* automatic pwm - not yet implemented, but
+				 * leave the settings made by the BIOS alone
+				 * until a change is requested via the sysfs
+				 * interface */
+			} else {
+				/* manual pwm */
+				data->manual_pwm_ctl[i] = PWM_FROM_REG(tmp);
+			}
+		}
+ 	}
+
 	/* Start monitoring */
 	it87_write_value(client, IT87_REG_CONFIG,
 			 (it87_read_value(client, IT87_REG_CONFIG) & 0x36)

@@ -948,6 +1063,7 @@ static struct it87_data *it87_update_dev
 			it87_read_value(client, IT87_REG_ALARM1) |
 			(it87_read_value(client, IT87_REG_ALARM2) << 8) |
 			(it87_read_value(client, IT87_REG_ALARM3) << 16);
+		data->fan_main_ctrl = it87_read_value(client, IT87_REG_FAN_MAIN_CTRL);
 
 		data->sensor = it87_read_value(client, IT87_REG_TEMP_ENABLE);
 		/* The 8705 does not have VID capability */

@@ -984,8 +1100,6 @@ MODULE_AUTHOR("Chris Gauthron <chrisg@0-
 MODULE_DESCRIPTION("IT8705F, IT8712F, Sis950 driver");
 module_param(update_vbat, bool, 0);
 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
-module_param(reset, bool, 0);
-MODULE_PARM_DESC(reset, "Reset the chip's registers, default no");
 MODULE_LICENSE("GPL");
 
 module_init(sm_it87_init);

Tested, works as intended for me.

Simone, you might revert
http://khali.linux-fr.org/devel/i2c/linux-2.6/linux-2.6.10-rc3-i2c-it87-manual-pwm.diff
and apply this new patch instead. This won't solve the polarity issue but at least the fans won't stop when you load the it87 driver.

We can now move to the second part of the plan. Stay tuned :)

Jean Delvare
http://khali.linux-fr.org/

Applied, thanks.

greg k-h

Yes, thank you for your analisys.

Of course, sorry.

pioppo@roentgen ~ $ cat /sys/devices/platform/i2c-0/0-0290/name it87

If the driver can perform a similar guess, couldn't it also activate a reverse polarity mode as well? I think all systems boot with with full-speed fan, so any value you found at loading time should be the full-speed one, shouln't it?

BTW:
I'm writing a report to giga-byte.

Cheers,
Simone

http://thisurlenablesemailtogetthroughoverzealousspamfilters.org

Hi Simone,

I'm thinking about this. However, there are a couple things to keep in mind:
1* The driver is not necessarily loaded at boot time. For example, one might unload and reload the module. In this case, fans might have been configured for less-then-full speed, and we have to handle this case properly.
2* This is just a guess. If we are wrong, the user is in trouble. You know what I mean ;) For this reason, it sounds better if the user has to activate a module parameter by his/herself, because it means he/she is aware that bad things might happen.
3* This is really a workaround for buggy BIOS. It would be better is BIOSes were fixed instead. It is time that manufacturer improve the quality of the BIOSes for the hardware monitoring parts. I have seen brokenesses ain too many BIOSes to keep count of them. Silently working around the bugs in the Linux driver is not going to help that.

That said, if no problems are reported after some time, we might consider to apply the workaround by default. One thing at a time though.

OK. Let us know how it goes. Feel free to direct them to me if you think it can be of any help.

--
Jean Delvare

Here is it87.c_2.6.10-jm4-detect_broken_bios_20050112.diff implementing this. It goes on top of the previous patch.

- detects broken bioses, disables the pwm for them and prints a message
- fixes an unrelated minor bug in set_fan_div()

@@ -500,7 +500,7 @@ static ssize_t set_fan_div(struct device
 		else
 			data->fan_div[nr] = 3;
 	}
-	val = old & 0x100;
+	val = old & 0x80;
 	val |= (data->fan_div[0] & 0x07);
 	val |= (data->fan_div[1] & 0x07) << 3;
 	if (data->fan_div[2] == 3)

@@ -703,6 +703,8 @@ int it87_detect(struct i2c_adapter *adap
 	int err = 0;
 	const char *name = "";
 	int is_isa = i2c_is_isa_adapter(adapter);
+	int enable_pwm_interface;
+	int tmp;
 
 	if (!is_isa && 
 	    !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))

@@ -812,6 +814,17 @@ int it87_detect(struct i2c_adapter *adap
 	/* Initialize the IT87 chip */
 	it87_init_client(new_client, data);
 
+	/* Some BIOSes fail to correctly configure the IT87 fans. All fans off
+	 * and polarity set to active low is sign that this is the case so we
+	 * disable pwm control to protect the user. */
+	enable_pwm_interface = 1;
+	tmp = it87_read_value(new_client, IT87_REG_FAN_CTL);
+	if ((tmp & 0x87) == 0) {
+		enable_pwm_interface = 0;
+		dev_info(&new_client->dev,
+			"detected broken BIOS defaults, disabling pwm interface");
+	}
+
 	/* Register sysfs hooks */
 	device_create_file(&new_client->dev, &dev_attr_in0_input);
 	device_create_file(&new_client->dev, &dev_attr_in1_input);

@@ -860,12 +873,14 @@ int it87_detect(struct i2c_adapter *adap
 	device_create_file(&new_client->dev, &dev_attr_fan2_div);
 	device_create_file(&new_client->dev, &dev_attr_fan3_div);
 	device_create_file(&new_client->dev, &dev_attr_alarms);
-	device_create_file(&new_client->dev, &dev_attr_pwm1_enable);
-	device_create_file(&new_client->dev, &dev_attr_pwm2_enable);
-	device_create_file(&new_client->dev, &dev_attr_pwm3_enable);
-	device_create_file(&new_client->dev, &dev_attr_pwm1);
-	device_create_file(&new_client->dev, &dev_attr_pwm2);
-	device_create_file(&new_client->dev, &dev_attr_pwm3);
+	if (enable_pwm_interface) {
+		device_create_file(&new_client->dev, &dev_attr_pwm1_enable);
+		device_create_file(&new_client->dev, &dev_attr_pwm2_enable);
+		device_create_file(&new_client->dev, &dev_attr_pwm3_enable);
+		device_create_file(&new_client->dev, &dev_attr_pwm1);
+		device_create_file(&new_client->dev, &dev_attr_pwm2);
+		device_create_file(&new_client->dev, &dev_attr_pwm3);
+	}
 
 	if (data->type == it8712) {
 		device_create_file_vrm(new_client);

Applied, thanks.

greg k-h

Simone,

Kernel 2.6.11-rc1-mm1 is just out, which does contain the latest updates to the it87 driver. I would like you to test them. What you should see:

1* When loading the it87 driver, the fans should not change speeds.

2* In the logs, you should see an information line with the chip type, address and revision.

3* Still in the logs, you should see a warning about your BIOS being broken and PWM being disabled as a consequence.

4* PWM interface should NOT be available in sysfs.

As soon as you will have confirmed that everything worked as expected, Jonas and I will provide a patch adding a pwm polarity reconfiguration module parameter for you to test. This should give you access to the PWM features of your it87 chip again, but in a safe way for a change ;)

Thanks,
--
Jean Delvare

Quoting myself:

Here comes this patch. The new "fix_pwm_polarity" module parameter allows one to force the it87 chip reconfiguration. This is only supported in the case the original PWM configuration is suspected to be bogus, and only if we think that reconfiguring the chip is safe.

I wish to thank Rudolf Marek and Jonas Munsin again for their testing and review of my code.

Greg, please apply, thanks.

Simone, feel free to test this (on top of 2.6.11-rc1-mm1 for example).

@@ -106,6 +106,9 @@
 /* Update battery voltage after every reading if true */
 static int update_vbat;
 
+/* Not all BIOSes properly configure the PWM registers */
+static int fix_pwm_polarity;
+
 /* Chip Type */
 
 static u16 chip_type;

@@ -226,6 +229,7 @@
 static int it87_write_value(struct i2c_client *client, u8 register,
 			u8 value);
 static struct it87_data *it87_update_device(struct device *dev);
+static int it87_check_pwm(struct i2c_client *client);
 static void it87_init_client(struct i2c_client *client, struct it87_data *data);
 
 

@@ -720,7 +724,6 @@
 	const char *name = "";
 	int is_isa = i2c_is_isa_adapter(adapter);
 	int enable_pwm_interface;
-	int tmp;
 
 	if (!is_isa && 
 	    !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))

@@ -824,20 +827,12 @@
 	if ((err = i2c_attach_client(new_client)))
 		goto ERROR2;
 
+	/* Check PWM configuration */
+	enable_pwm_interface = it87_check_pwm(new_client);
+
 	/* Initialize the IT87 chip */
 	it87_init_client(new_client, data);
 
-	/* Some BIOSes fail to correctly configure the IT87 fans. All fans off
-	 * and polarity set to active low is sign that this is the case so we
-	 * disable pwm control to protect the user. */
-	enable_pwm_interface = 1;
-	tmp = it87_read_value(new_client, IT87_REG_FAN_CTL);
-	if ((tmp & 0x87) == 0) {
-		enable_pwm_interface = 0;
-		dev_info(&new_client->dev,
-			"detected broken BIOS defaults, disabling pwm interface");
-	}
-
 	/* Register sysfs hooks */
 	device_create_file(&new_client->dev, &dev_attr_in0_input);
 	device_create_file(&new_client->dev, &dev_attr_in1_input);

@@ -968,6 +963,56 @@
 		return i2c_smbus_write_byte_data(client, reg, value);
 }
 
+/* Return 1 if and only if the PWM interface is safe to use */
+static int it87_check_pwm(struct i2c_client *client)
+{
+	/* Some BIOSes fail to correctly configure the IT87 fans. All fans off
+	 * and polarity set to active low is sign that this is the case so we
+	 * disable pwm control to protect the user. */
+	int tmp = it87_read_value(client, IT87_REG_FAN_CTL);
+	if ((tmp & 0x87) == 0) {
+		if (fix_pwm_polarity) {
+			/* The user asks us to attempt a chip reconfiguration.
+			 * This means switching to active high polarity and
+			 * inverting all fan speed values. */
+			int i;
+			u8 pwm[3];
+
+			for (i = 0; i < 3; i++)
+				pwm[i] = it87_read_value(client,
+							 IT87_REG_PWM(i));
+
+			/* If any fan is in automatic pwm mode, the polarity
+			 * might be correct, as suspicious as it seems, so we
+			 * better don't change anything (but still disable the
+			 * PWM interface). */
+			if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
+				dev_info(&client->dev, "Reconfiguring PWM to "
+					 "active high polarity\n");
+				it87_write_value(client, IT87_REG_FAN_CTL,
+						 tmp | 0x87);
+				for (i = 0; i < 3; i++)
+					it87_write_value(client,
+							 IT87_REG_PWM(i),
+							 0x7f & ~pwm[i]);
+				return 1;
+			}
+
+			dev_info(&client->dev, "PWM configuration is "
+				 "too broken to be fixed\n");
+		}
+
+		dev_info(&client->dev, "Detected broken BIOS "
+			 "defaults, disabling PWM interface\n");
+		return 0;
+	} else if (fix_pwm_polarity) {
+		dev_info(&client->dev, "PWM configuration looks "
+			 "sane, won't touch\n");
+	}
+
+	return 1;
+}
+
 /* Called when we have found a new IT87. */
 static void it87_init_client(struct i2c_client *client, struct it87_data *data)
 {

@@ -1128,6 +1173,8 @@
 MODULE_DESCRIPTION("IT8705F, IT8712F, Sis950 driver");
 module_param(update_vbat, bool, 0);
 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
+module_param(fix_pwm_polarity, bool, 0);
+MODULE_PARM_DESC(fix_pwm_polarity, "Force PWM polarity to active high (DANGEROUS)");
 MODULE_LICENSE("GPL");
 
 module_init(sm_it87_init);

Jean Delvare
http://khali.linux-fr.org/

I've been unable to apply your patch cleanly on top of 2.6.11-rc1-mm1, but eventually I've managed to apply it manually.

I can confirm it works as expected.

Without parameters I get in dmesg:

it87: Found IT8705F chip at 0x290, revision 2
it87 0-0290: Detected broken BIOS defaults, disabling PWM interface

No pwm appears in sysfs and the missing linefeed has been fixed

Adding "options it87 fix_pwm_polarity=1" in modules.conf I get:

it87: Found IT8705F chip at 0x290, revision 2 it87 0-0290: Reconfiguring PWM to active high polarity

PWM controllers appear in sysfs, the fan doesn't stop running at load time and pwm values are now in normal direction: (0 stops, 255 runs full-speed).

Thanks!

/Simone

http://thisurlenablesemailtogetthroughoverzealousspamfilters.org

Applied, thanks.

greg k-h

confirmed.

Confirmed, but it looks like there's a missing linefeed in the warning.

pioppo@roentgen ~ $ uname -a
Linux roentgen 2.6.11-rc1-mm1 #1 Sat Jan 15 16:23:34 CET 2005 x86_64 AMD Athlon(tm) 64 Processor 3200+ AuthenticAMD GNU/Linux pioppo@roentgen ~ $ dmesg|grep it87
it87: Found IT8705F chip at 0x290, revision 2
it87 0-0290: detected broken BIOS defaults, disabling pwm interface<6>8139too Fast Ethernet driver 0.9.27

confirmed.

pioppo@roentgen ~ $ ls /sys/devices/platform/i2c-0/0-0290

alarms        fan3_div    in2_input  in5_input  in8_input    temp2_min
detach_state  fan3_input  in2_max    in5_max    name         temp2_type
driver        fan3_min    in2_min    in5_min    power        temp3_input
fan1_div      in0_input   in3_input  in6_input  temp1_input  temp3_max
fan1_input    in0_max     in3_max    in6_max    temp1_max    temp3_min
fan1_min      in0_min     in3_min    in6_min    temp1_min    temp3_type
fan2_div      in1_input   in4_input  in7_input  temp1_type
fan2_input    in1_max     in4_max    in7_max    temp2_input
fan2_min      in1_min     in4_min    in7_min    temp2_max

/Simone

http://thisurlenablesemailtogetthroughoverzealousspamfilters.org

Hi Simone,

True. The additional patch I posted earlier today fixes it though. You can now test this one, which adds the "fix_pwm_polarity" module parameter which will let you - at last - to use PWM the way it is meant to be.

Let us know how it goes! :)

Jean Delvare
http://khali.linux-fr.org/

Hi,

While we're at it, the fan speed sensor reports an absurd speed when the fan is driven with very low but non-zero pwm values. For example, driving it with pwm=2 I get speeds over 50K rpms, while of course the fan is stopped (almost?). This could be just an hardware sensitivity problem in the sensor chip, or a false measure triggered by fan vibration, but maybe you know better.

/Simone

http://thisurlenablesemailtogetthroughoverzealousspamfilters.org

Hi Simone,

This is a frequent problem with PWM. In order to estimate the fan rotation speed, chips sample a signal that comes from the fan on its third wire (typically two pulses per revolution). Since the fan is not a power source by itself, the pulses are powered from the fan header's +12V pin. When you start using PWM, you affect the +12V pin duty cycle, and as a result you affect the speed signal duty cycle. The lower the duty cycle, the harder for the chip to correctly determine the speed.

Newer chips have the capability to correct the effects of PWM at reasonable duty cycles. It however supposes that it knows which fan corresponds to which PWM output. Motherboard manufacturers will have to take this information into account when designing their boards. And at any rate, very low PWM duty cycles cannot possibly corrected.

It is possible to affect the fan speed vs. PWM curve by changing the base frequency of the PWM signal. This can help achieve lower fan speeds with higher PWM duty cycles (and thus better speed readings). Most chips support frequency adjustment, but our drivers don't, because it wasn't realized until very recently that this could be of any benefit to the user.

Jean Delvare
http://khali.linux-fr.org/

I'm hoping someone can help explain part of the layout of a process' virtual address space in the 2.6 series kernel.

Below is the output of "cat /proc/self/maps" on Fedora Core 3 (2.6.9-1.6_FC2) with exec-shield[-randomize] disabled and legacy_vm_layout enabled.

What is being mapped in at last line (ffffe000-fffff000 ---p)? This is always there, no matter what process I run. To my knowledge, this wasn't the case on 2.4.

08048000-0804c000 r-xp 00000000 03:03 2490451 /bin/cat
0804c000-0804d000 rw-p 00003000 03:03 2490451 /bin/cat
0804d000-0806e000 rw-p 0804d000 00:00 0

42344000-42359000 r-xp 00000000 03:03 950351     /lib/ld-2.3.3.so
42359000-4235a000 r--p 00014000 03:03 950351     /lib/ld-2.3.3.so
4235a000-4235b000 rw-p 00015000 03:03 950351     /lib/ld-2.3.3.so
4235d000-42473000 r-xp 00000000 03:03 950450     /lib/tls/libc-2.3.3.so
42473000-42474000 r--p 00116000 03:03 950450     /lib/tls/libc-2.3.3.so
42474000-42477000 rw-p 00117000 03:03 950450     /lib/tls/libc-2.3.3.so

42477000-42479000 rw-p 42477000 00:00 0
55017000-55018000 rw-p 55017000 00:00 0
55018000-55218000 r--p 00000000 03:03 114690 /usr/lib/locale/locale-archive feffe000-ff000000 rw-p feffe000 00:00 0
ffffe000-fffff000 ---p 00000000 00:00 0

I have not had much success in my search for information via Google & IRC and the books I have are specific to the 2.4 series. Any help would be greatly appreciated.

-Chris

That is the vsyscall page.

--
Brian Gerst

Hi again Simone,

I would also be interested in the output of dmidecode [1] for your system. This would allow me to add a workaround for your board to the it87 driver, since the BIOS seems not to properly intialize the chip. Sadly, there are probably many other boards which would need similar workarounds for this chips or any other with PWM capabilities, and I would better see the bogus BIOSes fixed than as many workarounds in our drivers...

BTW, if you don't have the latest version of your motherboard BIOS already, it could be worth upgrading, just in case it helps (I wouldn't put too much hope there though).

[1] http://www.nongnu.org/dmidecode/

Thanks,

Jean Delvare
http://khali.linux-fr.org/

Ok, attached below

Ok I will do it, but it doesn't look useful looking at the changelog. Anyway I had a problem with my BIOS, it caused frequent lock-ups. I reported it to Gigabyte and in 1 week they provided my with a new version fixing the problem, so if you can explain in detail what is wrong with their BIOS, I'm confident I could let them fix it.
I'll keep you posted.

Thank you
Simone

# dmidecode 2.5
SMBIOS 2.3 present.
37 structures occupying 1058 bytes.
Table at 0x000F0100.
Handle 0x0000
 DMI type 0, 20 bytes.
 BIOS Information
  Vendor: Award Software International, Inc.
  Version: F5
  Release Date: 04/21/2004
  Address: 0xE0000
  Runtime Size: 128 kB
  ROM Size: 256 kB
		Characteristics:
			ISA is supported
			PCI is supported
			PNP is supported
			APM is supported
			BIOS is upgradeable
			BIOS shadowing is allowed
			Boot from CD is supported
			Selectable boot is supported
			BIOS ROM is socketed
			EDD is supported
			5.25"/360 KB floppy services are supported (int 13h)
			5.25"/1.2 MB floppy services are supported (int 13h)
			3.5"/720 KB floppy services are supported (int 13h)
			3.5"/2.88 MB floppy services are supported (int 13h)
			Print screen service is supported (int 5h)
			8042 keyboard services are supported (int 9h)
			Serial services are supported (int 14h)
			Printer services are supported (int 17h)
			CGA/mono video services are supported (int 10h)
   ACPI is supported
   USB legacy is supported
   AGP is supported
   LS-120 boot is supported
   ATAPI Zip drive boot is supported
Handle 0x0001
 DMI type 1, 25 bytes.
 System Information
  Manufacturer:  
  Product Name:  
  Version:  
  Serial Number:  
  UUID: Not Present
  Wake-up Type: Power Switch
Handle 0x0002
 DMI type 2, 8 bytes.
 Base Board Information
  Manufacturer: Gigabyte Technology Co., Ltd.
  Product Name: K8T800-8237
  Version: 1.x
  Serial Number:  
Handle 0x0003
 DMI type 3, 17 bytes.
 Chassis Information
  Manufacturer:  
		Type: Desktop
		Lock: Not Present
		Version:  
		Serial Number:  
		Asset Tag:  
		Boot-up State: Unknown
		Power Supply State: Unknown
		Thermal State: Unknown
		Security Status: Unknown
		OEM Information: 0x00000000
Handle 0x0004
	DMI type 4, 35 bytes.
	Processor Information
		Socket Designation: Socket 754
		Type: Central Processor
		Family: Athlon
		Manufacturer: AMD
		ID: 48 0F 00 00 FF FB 8B 07
  Signature: Extended Family 0, Model 4, Stepping 8
  Flags:
   FPU (Floating-point unit on-chip)
   VME (Virtual mode extension)
   DE (Debugging extension)
   PSE (Page size extension)
   TSC (Time stamp counter)
   MSR (Model specific registers)
   PAE (Physical address extension)
   MCE (Machine check exception)
   CX8 (CMPXCHG8 instruction supported)
   APIC (On-chip APIC hardware supported)
   SEP (Fast system call)
   MTRR (Memory type range registers)
   PGE (Page global enable)
   MCA (Machine check architecture)
   CMOV (Conditional move instruction supported)
   PAT (Page attribute table)
   PSE-36 (36-bit page size extension)
   CLFSH (CLFLUSH instruction supported)
   MMX (MMX technology supported)
   FXSR (Fast floating-point save and restore)
   SSE (Streaming SIMD extensions)
   SSE2 (Streaming SIMD extensions 2)
  Version: AMD Athlon(tm) 64 Processor 3200+
		Voltage: 1.5 V
		External Clock: 200 MHz
		Max Speed: 4000 MHz
		Current Speed: 2000 MHz
		Status: Populated, Enabled
		Upgrade: ZIF Socket
		L1 Cache Handle: 0x0009
		L2 Cache Handle: 0x000A
		L3 Cache Handle: Not Provided
		Serial Number:  
		Asset Tag:  
		Part Number:  
Handle 0x0005
	DMI type 5, 22 bytes.
	Memory Controller Information
		Error Detecting Method: 8-bit Parity
		Error Correcting Capabilities:
			None
		Supported Interleave: One-way Interleave
		Current Interleave: One-way Interleave
		Maximum Memory Module Size: 1024 MB
		Maximum Total Memory Size: 3072 MB
		Supported Speeds:
			70 ns
			60 ns
		Supported Memory Types:
			Standard
			EDO
		Memory Module Voltage: 3.3 V
		Associated Memory Slots: 3
			0x0006
			0x0007
			0x0008
		Enabled Error Correcting Capabilities:
   None
Handle 0x0006
 DMI type 6, 12 bytes.
 Memory Module Information
  Socket Designation: A0
  Bank Connections: 1
  Current Speed: Unknown
  Type: Other
  Installed Size: 512 MB (Double-bank Connection)
  Enabled Size: 512 MB (Double-bank Connection)
  Error Status: OK
Handle 0x0007
 DMI type 6, 12 bytes.
 Memory Module Information
  Socket Designation: A1
  Bank Connections: 2
  Current Speed: Unknown
  Type: Other
  Installed Size: 512 MB (Double-bank Connection)
  Enabled Size: 512 MB (Double-bank Connection)
  Error Status: OK
Handle 0x0008
 DMI type 6, 12 bytes.
 Memory Module Information
		Socket Designation: A2
		Bank Connections: 3
		Current Speed: Unknown
		Type: Other
		Installed Size: Not Installed (Single-bank Connection)
		Enabled Size: Not Installed (Single-bank Connection)
		Error Status: OK
Handle 0x0009
	DMI type 7, 19 bytes.
	Cache Information
		Socket Designation: Internal Cache
		Configuration: Enabled, Not Socketed, Level 1
		Operational Mode: Write Back
		Location: Internal
		Installed Size: 128 KB
		Maximum Size: 128 KB
		Supported SRAM Types:
			Synchronous
		Installed SRAM Type: Synchronous
		Speed: Unknown
		Error Correction Type: Unknown
		System Type: Unknown
		Associativity: Unknown
Handle 0x000A
	DMI type 7, 19 bytes.
	Cache Information
		Socket Designation: External Cache
		Configuration: Enabled, Not Socketed, Level 2
		Operational Mode: Write Back
		Location: External
		Installed Size: 1024 KB
		Maximum Size: 1024 KB
		Supported SRAM Types:
			Synchronous
		Installed SRAM Type: Synchronous
		Speed: Unknown
		Error Correction Type: Unknown
		System Type: Unknown
		Associativity: Unknown
Handle 0x000B
	DMI type 8, 9 bytes.
	Port Connector Information
  Internal Reference Designator: PRIMARY IDE
  Internal Connector Type: On Board IDE
  External Reference Designator:  
  External Connector Type: None
  Port Type: Other
Handle 0x000C
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: SECONDARY IDE
  Internal Connector Type: On Board IDE
  External Reference Designator:  
  External Connector Type: None
  Port Type: Other
Handle 0x000D
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: FDD
  Internal Connector Type: On Board Floppy
  External Reference Designator:  
  External Connector Type: None
  Port Type: 8251 FIFO Compatible
Handle 0x000E
 DMI type 8, 9 bytes.
 Port Connector Information
		Internal Reference Designator: COM1
		Internal Connector Type: 9 Pin Dual Inline (pin 10 cut)
		External Reference Designator:  
		External Connector Type: DB-9 male
		Port Type: Serial Port 16450 Compatible
Handle 0x000F
	DMI type 8, 9 bytes.
	Port Connector Information
		Internal Reference Designator: COM2
  Internal Connector Type: 9 Pin Dual Inline (pin 10 cut)
  External Reference Designator:  
  External Connector Type: DB-9 male
  Port Type: Serial Port 16450 Compatible
Handle 0x0010
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: LPT1
  Internal Connector Type: DB-25 female
  External Reference Designator:  
  External Connector Type: DB-25 female
  Port Type: Parallel Port ECP/EPP
Handle 0x0011
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: Keyboard
		Internal Connector Type: Other
		External Reference Designator:  
		External Connector Type: PS/2
		Port Type: Keyboard Port
Handle 0x0012
	DMI type 8, 9 bytes.
	Port Connector Information
		Internal Reference Designator: PS/2 Mouse
		Internal Connector Type: PS/2
		External Reference Designator: Detected
		External Connector Type: PS/2
		Port Type: Mouse Port
Handle 0x0013
	DMI type 9, 13 bytes.
	System Slot Information
		Designation: PCI
		Type: 32-bit PCI
		Current Usage: Available
		Length: Long
		ID: 9
		Characteristics:
			5.0 V is provided
			3.3 V is provided
			PME signal is supported
Handle 0x0014
	DMI type 9, 13 bytes.
	System Slot Information
		Designation: PCI
		Type: 32-bit PCI
		Current Usage: Available
		Length: Long
		ID: 10
		Characteristics:
			5.0 V is provided
			3.3 V is provided
			PME signal is supported
Handle 0x0015
	DMI type 9, 13 bytes.
	System Slot Information
		Designation: PCI
		Type: 32-bit PCI
		Current Usage: Available
		Length: Long
		ID: 11
		Characteristics:
			5.0 V is provided
			3.3 V is provided
			PME signal is supported
Handle 0x0016
	DMI type 9, 13 bytes.
	System Slot Information
		Designation: PCI
		Type: 32-bit PCI
		Current Usage: Available
		Length: Long
		ID: 12
		Characteristics:
			5.0 V is provided
			3.3 V is provided
			PME signal is supported
Handle 0x0017
	DMI type 9, 13 bytes.
	System Slot Information
		Designation: PCI
		Type: 32-bit PCI
		Current Usage: Available
		Length: Long
		ID: 13
		Characteristics:
			5.0 V is provided
   3.3 V is provided
   PME signal is supported
Handle 0x0018
 DMI type 9, 13 bytes.
 System Slot Information
  Designation: AGP
  Type: 32-bit AGP
  Current Usage: In Use
  Length: Long
  ID: 8
  Characteristics:
   5.0 V is provided
Handle 0x0019
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: USB
  Internal Connector Type: None
  External Reference Designator:  
  External Connector Type: Access Bus (USB)
  Port Type: USB
Handle 0x001A
 DMI type 13, 22 bytes.
 BIOS Language Information
  Installable Languages: 3
   n|US|iso8859-1
   n|US|iso8859-1
   r|CA|iso8859-1
  Currently Installed Language: n|US|iso8859-1
Handle 0x001B
 DMI type 16, 15 bytes.
 Physical Memory Array
  Location: System Board Or Motherboard
  Use: System Memory
  Error Correction Type: None
  Maximum Capacity: 768 MB
  Error Information Handle: Not Provided
  Number Of Devices: 3
Handle 0x001C
 DMI type 17, 27 bytes.
 Memory Device
		Array Handle: 0x001B
		Error Information Handle: Not Provided
		Total Width: 64 bits
		Data Width: 64 bits
		Size: 512 MB
		Form Factor: DIMM
  Set: None
  Locator: A0
  Bank Locator: Bank0/1
  Type: Unknown
  Type Detail: None
  Speed: 400 MHz (2.5 ns)
  Manufacturer:  
  Serial Number:  
  Asset Tag:  
  Part Number:  
Handle 0x001D
 DMI type 17, 27 bytes.
 Memory Device
  Array Handle: 0x001B
  Error Information Handle: Not Provided
  Total Width: 64 bits
  Data Width: 64 bits
  Size: 512 MB
  Form Factor: DIMM
  Set: None
  Locator: A1
  Bank Locator: Bank2/3
  Type: Unknown
  Type Detail: None
  Speed: 400 MHz (2.5 ns)
  Manufacturer:  
  Serial Number:  
  Asset Tag:  
  Part Number:  
Handle 0x001E
 DMI type 17, 27 bytes.
 Memory Device
  Array Handle: 0x001B
  Error Information Handle: Not Provided
  Total Width: 64 bits
  Data Width: 64 bits
  Size: No Module Installed
  Form Factor: DIMM
  Set: None
  Locator: A2
  Bank Locator: Bank4/5
  Type: Unknown
  Type Detail: None
  Speed: Unknown
  Manufacturer:  
  Serial Number:  
  Asset Tag:  
  Part Number:  
Handle 0x001F
 DMI type 19, 15 bytes.
 Memory Array Mapped Address
  Starting Address: 0x00000000000
  Ending Address: 0x0003FFFFFFF
  Range Size: 1 GB
  Physical Array Handle: 0x001B
  Partition Width: 32
Handle 0x0020
 DMI type 20, 19 bytes.
 Memory Device Mapped Address
  Starting Address: 0x00000000000
  Ending Address: 0x0001FFFFFFF
  Range Size: 512 MB
  Physical Device Handle: 0x001C
  Memory Array Mapped Address Handle: 0x001F
  Partition Row Position: 1
Handle 0x0021
 DMI type 20, 19 bytes.
 Memory Device Mapped Address
  Starting Address: 0x00020000000
  Ending Address: 0x0003FFFFFFF
  Range Size: 512 MB
  Physical Device Handle: 0x001D
  Memory Array Mapped Address Handle: 0x001F
  Partition Row Position: 1
Handle 0x0022
 DMI type 20, 19 bytes.
 Memory Device Mapped Address
  Starting Address: 0x00000000000
  Ending Address: 0x000000003FF
  Range Size: 1 kB
  Physical Device Handle: 0x001E
  Memory Array Mapped Address Handle: 0x001F
  Partition Row Position: 1
Handle 0x0023
 DMI type 32, 11 bytes.
 System Boot Information
  Status: No errors detected
Handle 0x0024
 DMI type 127, 4 bytes.
 End Of Table

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I've upgraded to the newest version available (f10), I have new values in dmidecode, but nothing changed on the PWM behaviour.
Here is the new dmidecode output

# dmidecode 2.5
SMBIOS 2.3 present.
37 structures occupying 1064 bytes.
Table at 0x000F0100.
Handle 0x0000
 DMI type 0, 20 bytes.
 BIOS Information
  Vendor: Award Software International, Inc.
  Version: F10
  Release Date: 10/22/2004
  Address: 0xE0000
  Runtime Size: 128 kB
  ROM Size: 256 kB
  Characteristics:
   ISA is supported
   PCI is supported
   PNP is supported
   APM is supported
   BIOS is upgradeable
   BIOS shadowing is allowed
   Boot from CD is supported
   Selectable boot is supported
   BIOS ROM is socketed
   EDD is supported
   5.25"/360 KB floppy services are supported (int 13h)
   5.25"/1.2 MB floppy services are supported (int 13h)
   3.5"/720 KB floppy services are supported (int 13h)
   3.5"/2.88 MB floppy services are supported (int 13h)
   Print screen service is supported (int 5h)
   8042 keyboard services are supported (int 9h)
   Serial services are supported (int 14h)
   Printer services are supported (int 17h)
   CGA/mono video services are supported (int 10h)
   ACPI is supported
   USB legacy is supported
   AGP is supported
   LS-120 boot is supported
   ATAPI Zip drive boot is supported
   BIOS boot specification is supported
Handle 0x0001
 DMI type 1, 25 bytes.
 System Information
  Manufacturer:  
  Product Name:  
  Version:  
  Serial Number:  
  UUID: Not Present
  Wake-up Type: Power Switch
Handle 0x0002
 DMI type 2, 8 bytes.
 Base Board Information
  Manufacturer: Gigabyte Technology Co., Ltd.
  Product Name: K8T800-8237
  Version:  
  Serial Number:  
Handle 0x0003
 DMI type 3, 17 bytes.
 Chassis Information
  Manufacturer:  
  Type: Desktop
  Lock: Not Present
  Version:  
  Serial Number:  
  Asset Tag:  
  Boot-up State: Unknown
  Power Supply State: Unknown
  Thermal State: Unknown
  Security Status: Unknown
  OEM Information: 0x00000000
Handle 0x0004
 DMI type 4, 35 bytes.
 Processor Information
  Socket Designation: Socket 754
  Type: Central Processor
  Family: Athlon
  Manufacturer: AMD
  ID: 48 0F 00 00 FF FB 8B 07
  Signature: Extended Family 0, Model 4, Stepping 8
  Flags:
   FPU (Floating-point unit on-chip)
   VME (Virtual mode extension)
   DE (Debugging extension)
   PSE (Page size extension)
   TSC (Time stamp counter)
   MSR (Model specific registers)
   PAE (Physical address extension)
   MCE (Machine check exception)
   CX8 (CMPXCHG8 instruction supported)
   APIC (On-chip APIC hardware supported)
   SEP (Fast system call)
   MTRR (Memory type range registers)
   PGE (Page global enable)
   MCA (Machine check architecture)
   CMOV (Conditional move instruction supported)
   PAT (Page attribute table)
   PSE-36 (36-bit page size extension)
   CLFSH (CLFLUSH instruction supported)
   MMX (MMX technology supported)
   FXSR (Fast floating-point save and restore)
   SSE (Streaming SIMD extensions)
   SSE2 (Streaming SIMD extensions 2)
  Version: AMD Athlon(tm) 64 Processor 3200+
  Voltage: 1.5 V
  External Clock: 200 MHz
  Max Speed: 4000 MHz
  Current Speed: 2000 MHz
  Status: Populated, Enabled
  Upgrade: ZIF Socket
  L1 Cache Handle: 0x0009
  L2 Cache Handle: 0x000A
  L3 Cache Handle: Not Provided
  Serial Number:  
  Asset Tag:  
  Part Number:  
Handle 0x0005
 DMI type 5, 22 bytes.
 Memory Controller Information
  Error Detecting Method: 8-bit Parity
  Error Correcting Capabilities:
   None
  Supported Interleave: One-way Interleave
  Current Interleave: One-way Interleave
  Maximum Memory Module Size: 1024 MB
  Maximum Total Memory Size: 3072 MB
  Supported Speeds:
   70 ns
   60 ns
  Supported Memory Types:
   Standard
   EDO
  Memory Module Voltage: 3.3 V
  Associated Memory Slots: 3
   0x0006
   0x0007
   0x0008
  Enabled Error Correcting Capabilities:
   None
Handle 0x0006
 DMI type 6, 12 bytes.
 Memory Module Information
  Socket Designation: A0
  Bank Connections: 1
  Current Speed: Unknown
  Type: Other
  Installed Size: 2048 MB (Double-bank Connection)
  Enabled Size: 2048 MB (Double-bank Connection)
  Error Status: OK
Handle 0x0007
 DMI type 6, 12 bytes.
 Memory Module Information
  Socket Designation: A1
  Bank Connections: 2
  Current Speed: Unknown
  Type: Other
  Installed Size: 2048 MB (Double-bank Connection)
  Enabled Size: 2048 MB (Double-bank Connection)
  Error Status: OK
Handle 0x0008
 DMI type 6, 12 bytes.
 Memory Module Information
  Socket Designation: ..h.
  Bank Connections: 0 9
  Current Speed: Unknown
  Type: Other
		Installed Size: Not Installed (Single-bank Connection)
		Enabled Size: Not Installed (Single-bank Connection)
		Error Status: OK
Handle 0x0009
	DMI type 7, 19 bytes.
	Cache Information
  Socket Designation: Internal Cache
  Configuration: Enabled, Not Socketed, Level 1
  Operational Mode: Write Back
  Location: Internal
  Installed Size: 128 KB
  Maximum Size: 128 KB
  Supported SRAM Types:
   Synchronous
  Installed SRAM Type: Synchronous
  Speed: Unknown
  Error Correction Type: Unknown
  System Type: Unknown
  Associativity: Unknown
Handle 0x000A
 DMI type 7, 19 bytes.
 Cache Information
  Socket Designation: External Cache
  Configuration: Enabled, Not Socketed, Level 2
  Operational Mode: Write Back
  Location: Internal
  Installed Size: 1024 KB
  Maximum Size: 1024 KB
  Supported SRAM Types:
   Synchronous
		Installed SRAM Type: Synchronous
		Speed: Unknown
		Error Correction Type: Unknown
		System Type: Unknown
		Associativity: Unknown
Handle 0x000B
	DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: PRIMARY IDE
  Internal Connector Type: On Board IDE
  External Reference Designator:  
  External Connector Type: None
  Port Type: Other
Handle 0x000C
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: SECONDARY IDE
  Internal Connector Type: On Board IDE
  External Reference Designator:  
  External Connector Type: None
  Port Type: Other
Handle 0x000D
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: FDD
  Internal Connector Type: On Board Floppy
  External Reference Designator:  
  External Connector Type: None
  Port Type: 8251 FIFO Compatible
Handle 0x000E
 DMI type 8, 9 bytes.
 Port Connector Information
		Internal Reference Designator: COM1
		Internal Connector Type: 9 Pin Dual Inline (pin 10 cut)
  External Reference Designator:  
  External Connector Type: DB-9 male
  Port Type: Serial Port 16450 Compatible
Handle 0x000F
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: COM2
  Internal Connector Type: 9 Pin Dual Inline (pin 10 cut)
  External Reference Designator:  
  External Connector Type: DB-9 male
  Port Type: Serial Port 16450 Compatible
Handle 0x0010
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: LPT1
  Internal Connector Type: DB-25 female
  External Reference Designator:  
  External Connector Type: DB-25 female
  Port Type: Parallel Port ECP/EPP
Handle 0x0011
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: Keyboard
  Internal Connector Type: Other
  External Reference Designator:  
  External Connector Type: PS/2
  Port Type: Keyboard Port
Handle 0x0012
	DMI type 8, 9 bytes.
	Port Connector Information
		Internal Reference Designator: PS/2 Mouse
		Internal Connector Type: PS/2
		External Reference Designator: No Detected
		External Connector Type: PS/2
		Port Type: Mouse Port
Handle 0x0013
 DMI type 8, 9 bytes.
 Port Connector Information
  Internal Reference Designator: USB
  Internal Connector Type: None
  External Reference Designator:  
  External Connector Type: Access Bus (USB)
  Port Type: USB
Handle 0x0014
 DMI type 9, 13 bytes.
 System Slot Information
  Designation: PCI
  Type: 32-bit PCI
  Current Usage: Available
  Length: Long
  ID: 9
  Characteristics:
   5.0 V is provided
   3.3 V is provided
   PME signal is supported
   SMBus signal is supported
Handle 0x0015
 DMI type 9, 13 bytes.
 System Slot Information
  Designation: PCI
  Type: 32-bit PCI
  Current Usage: Available
  Length: Long
  ID: 10
  Characteristics:
   5.0 V is provided
   3.3 V is provided
   PME signal is supported
   SMBus signal is supported
Handle 0x0016
 DMI type 9, 13 bytes.
 System Slot Information
  Designation: PCI
  Type: 32-bit PCI
  Current Usage: Available
  Length: Long
  ID: 11
  Characteristics:
   5.0 V is provided
   3.3 V is provided
   PME signal is supported
   SMBus signal is supported
Handle 0x0017
 DMI type 9, 13 bytes.
	System Slot Information
		Designation: PCI
		Type: 32-bit PCI
		Current Usage: Available
  Length: Long
  ID: 12
  Characteristics:
   5.0 V is provided
   3.3 V is provided
   PME signal is supported
   SMBus signal is supported
Handle 0x0018
 DMI type 9, 13 bytes.
 System Slot Information
  Designation: PCI
  Type: 32-bit PCI
  Current Usage: Available
  Length: Long
  ID: 13
  Characteristics:
   5.0 V is provided
   3.3 V is provided
   PME signal is supported
   SMBus signal is supported
Handle 0x0019
 DMI type 9, 13 bytes.
 System Slot Information
  Designation: AGP
  Type: 32-bit AGP
  Current Usage: In Use
  Length: Long
  ID: 8
  Characteristics:
   5.0 V is provided
Handle 0x001A
 DMI type 13, 22 bytes.
 BIOS Language Information
  Installable Languages: 3
   n|US|iso8859-1
   n|US|iso8859-1
   r|CA|iso8859-1
  Currently Installed Language: n|US|iso8859-1
Handle 0x001B
 DMI type 16, 15 bytes.
 Physical Memory Array
  Location: System Board Or Motherboard
  Use: System Memory
  Error Correction Type: None
  Maximum Capacity: 768 MB
  Error Information Handle: Not Provided
  Number Of Devices: 3
Handle 0x001C
 DMI type 17, 27 bytes.
 Memory Device
  Array Handle: 0x001B
  Error Information Handle: Not Provided
  Total Width: 64 bits
  Data Width: 64 bits
  Size: 2048 MB
  Form Factor: DIMM
  Set: None
  Locator: A0
  Bank Locator: Bank0/1
  Type: Unknown
  Type Detail: None
  Speed: 400 MHz (2.5 ns)
  Manufacturer:  
  Serial Number:  
  Asset Tag:  
  Part Number:  
Handle 0x001D
 DMI type 17, 27 bytes.
 Memory Device
  Array Handle: 0x001B
  Error Information Handle: Not Provided
  Total Width: 64 bits
  Data Width: 64 bits
  Size: 2048 MB
  Form Factor: DIMM
  Set: None
  Locator: A1
  Bank Locator: Bank2/3
  Type: Unknown
  Type Detail: None
  Speed: 400 MHz (2.5 ns)
  Manufacturer:  
  Serial Number:  
  Asset Tag:  
  Part Number:  
Handle 0x001E
 DMI type 17, 27 bytes.
 Memory Device
  Array Handle: 0x001B
  Error Information Handle: Not Provided
  Total Width: 64 bits
  Data Width: 64 bits
  Size: No Module Installed
  Form Factor: DIMM
  Set: None
  Locator: ..h.
  Bank Locator: Bank4/5
  Type: Unknown
  Type Detail: None
  Speed: Unknown
  Manufacturer:  
  Serial Number:  
  Asset Tag:  
  Part Number:  
Handle 0x001F
 DMI type 19, 15 bytes.
 Memory Array Mapped Address
  Starting Address: 0x00000000000
  Ending Address: 0x000FFFFFFFF
  Range Size: 4 GB
  Physical Array Handle: 0x001B
  Partition Width: 32
Handle 0x0020
 DMI type 20, 19 bytes.
 Memory Device Mapped Address
  Starting Address: 0x00000000000
  Ending Address: 0x0007FFFFFFF
  Range Size: 2 GB
  Physical Device Handle: 0x001C
  Memory Array Mapped Address Handle: 0x001F
  Partition Row Position: 1
Handle 0x0021
 DMI type 20, 19 bytes.
 Memory Device Mapped Address
  Starting Address: 0x00080000000
  Ending Address: 0x000FFFFFFFF
  Range Size: 2 GB
  Physical Device Handle: 0x001D
  Memory Array Mapped Address Handle: 0x001F
  Partition Row Position: 1
Handle 0x0022
 DMI type 20, 19 bytes.
 Memory Device Mapped Address
  Starting Address: 0x00000000000
  Ending Address: 0x000000003FF
  Range Size: 1 kB
  Physical Device Handle: 0x001E
  Memory Array Mapped Address Handle: 0x001F
  Partition Row Position: 1
Handle 0x0023
 DMI type 32, 11 bytes.
 System Boot Information
  Status: No errors detected
Handle 0x0024
 DMI type 127, 4 bytes.
 End Of Table

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Hi Simone,

OK, thanks for the update anyway. Please note that what I mainly need now if a dump of your IT87xxF chip before ever loading the it87 driver. As explained in a previous mail, you can obtain such a dump by running "isadump 0x295 0x296". isadump is part of the lm_sensors package [1].

[1] http://secure.netroedge.com/~lm78/download.html

When I get this, I'll compare with the datasheets so as to understand how your chip is configured (or left unconfigured) by your BIOS. This will both help me propose a workaround in the it87 driver and explain the Gigabyte support what I think they should do.

Thanks,

Jean Delvare
http://khali.linux-fr.org/

FWIW, I have a Gigabyte motherboard with an it87 chip too. Reading about this it87 polarity thing I'm suspecting something is really wrong here:

When system is idle, the sensors report shows:
CPU temp = +25°C and CPU fan = 2136 RPM (and rather noisy)

When system is 100% busy (with dd if=/dev/urandom of=/dev/null):
CPU temp = +41°C and CPU fan = 1288 RPM (and obviously much quieter)

I'm running a 2.6.10 kernel (not -mm) so I guess the BIOS settings for fan control are not altered. And incidentally the BIOS has a setting called "smart fan control" set to "enabled" which maps to the ITxxF automatic PWM control mode I suppose. So if the BIOS actually set the fan polarity wrong then the fan would slow down when the temperature rises and vice versa, right?

Nicolas

Hi Nicolas,

That's right, what you describe really sounds like a wrong polarity setting.

Could you please tell us what model it is, with what BIOS revision? I would also appreciate a dump of the chip (isadump 0x295 0x296 unless it lives at some uncommon address) to confirm the guess.

The code Jonas and I have been adding to the it87 driver recently will probably not work for you if you leave the "smart fan control" enabled in your BIOS setup screen (because we supposed that no reponsible motherboard maker would enable this mode without properly configuring the polarity beforehand - wrong guess in your case - and are not allowing a polarity inversion in this case). However, by disabling this mode in the BIOS setup screen, you should be able to use the new fix_pwm_polarity module register to get the polarity fixed, with manual PWM control (no auto mode yet).

You might also search for a BIOS update for your board. I consider the behavior your describe a major problem and would expect Gigabyte to fix it at some point in time.

Thanks,

Jean Delvare
http://khali.linux-fr.org/

BIOS Information
Vendor: Award Software International, Inc.
Version: F5
Release Date: 11/01/2004

Base Board Information
Manufacturer: Gigabyte Technology Co., Ltd. Product Name: 8I915GMF
Version: x.x
Serial Number:

0 1 2 3 4 5 6 7 8 9 a b c d e f
00: 11 10 80 00 37 ff 00 37 ff 07 13 5b 00 51 40 ff 10: fe fe ff 71 d7 fe 7f fe 00 00 ff ff ff ff ff ff 20: 53 a4 cc b9 b9 89 8b ff c9 c9 fe 19 60 f7 f7 f7 30: ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 40: 7f 7f 7f 7f 46 7f ff ff 2d ff ff ff ff ff ff ff 50: ff 1c 7f 7f 7f ff 5f 5f 90 5f f9 12 55 00 00 00 60: ff 14 41 23 82 23 ff ff 7f 7f 7f 00 00 7f ff ff 70: ff 14 41 23 82 23 ff ff ff ff ff ff ff ff ff ff 80: 00 00 00 00 ff ff ff ff 40 40 ff ff ff ff ff ff 90: 7f 7f 7f 00 00 7f ff ff 7f 7f 7f 00 00 7f ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

Heh... and it's the default value.

I guess the BIOS setting will simply be overwritten so changing the BIOS should not affect subsequent use, no?

Well... I can't find a straight BIOS update for this board. There is a Windows application to fetch and install a new BIOS from the net but installing Windows on this machine just for that is not really practical.

Nicolas

Hi Nicolas,

Interesting. Your chip does seem to be configured (i.e. pwm polarity is high), so whatever your problem is, it is probably different from what Simone experienced.

Your configuration is as follow:
* PWM outputs active high.
* PWM 2 and 3 in on/off mode, set to on.
* PWM 1 in "smart guardian" mode, set to automatic PWM depending on temp3.

I would like to know how temperature channels are used by your motherboard, and how fans are used as well. Which temperature and fan channels correspond to your CPU? What other temperature sensors and fans are present?

The values dumped here make me believe that the PWM outputs were configured by the BIOS. Now maybe not the correct way, at least for you.

Changing the BIOS configuration affects the initial register configuration, from which the it87 driver decides whether using PWM or reconfiguring the chip (changing polarity) is safe or not. This is why it might help. With the dump you provided, we now know that the (new) it87 driver will accept PWM operations even when your BIOS was left in "smart guardian" mode.

I would like you to give a try to a recent version of the it87 driver (as found in 2.6.11-rc1-bk7 or 2.6.11-rc1-mm2). This will let us know which revision of the IT8712F you have (in case it matters), and will also let you experiment with manual PWM.

If manual PWM works, then the problem is in the way temperature interacts with PWM in automatic mode.

If manual PWM works the wrong way around (like it did for Simone) then it is a polarity issue (after all, maybe *you* need active low).

If manual PWM half works (fan speed changes but not as much as it should) it might be a problem of picking the correct base frequency for PWM.

So please let us know how manual PWM behaves, and I'll tell you what I think the problem is, and how I think it can be tinkered with (providing it can).

In the meantime, you could contact Gigabyte and explain about the problem. They better learn about the problem and fix their BIOS is needed.

Thanks,
--
Jean Delvare

Sensible.

It looks like only temp3 is used for the CPU temperature, fan1 is the CPU fan and fan2 the case fan.

I experimented with isaset tweaking individual bits in register 0x14 (blindly I confess, haven't read the datasheet) and flipping bit 3 from 0 to 1 (writing 0xdf) apparently reverses the behavior, i.e. the CPU fan speed now increases with the CPU temperature.

Will try to do soon. In the mean time I'm willing to try out things with isaset if you can suggest basic tests (easier than upgrading kernel for the time being).

Nicolas

Hi Nicolas,

This is coherent with your chip configuration.

That's odd. This bit isn't supposed to significantly change the behavior. When cleared (default), possible duty cycles range from 0 to 100%. When set, the possible duty cycles range from 20% to 100% (except for PWM=0 which still results in a 0% duty cycle). I hardly understand how setting this bit can result in the change you describe.

OK. Remember you better keep an eye on the CPU fan in case your tests stop it. I would also suggest that you take a look at the datasheet so that you better understand what you are doing:
http://www.iteusa.com/product_info/file/pc/IT8712F_V0.81.pdf
(page 79 of the document, which is 97 of the PDF file - don't ask)

The best test I can think of is to switch your CPU fan to manual PWM mode. To do that, write 0x40 to register 0x15. CPU fan should go to half speed. Write 0x7F and if should go to full speed, except if the polarity is not correct in which case 0x00 will do (and 0x7F will stop the fan completely so you don't want to keep it that way).

I suggest that you use the -y flag of isaset so that you can overwrite register values quickly if things turn bad.

Once you know if the polarity is correct, you can try different values of PWM between 0x00 and 0x7F and see how exactly your fan reacts to them. You can also study more precisely how bit 3 of register 0x14 (the one you played with already) affects the PWM vs speed curve.

Thanks,
--
Jean Delvare

I confirm that 0x7f is full speed.

That's where things get really really interesting. As mentioned above 0x7f drives the fan full speed (2596 RPM). Now lowering that value slows the CPU fan gradually down to a certain point. With a value of 0x3f the fan turns at 1041 RPM. But below 0x3f the fan starts speeding up again to reach a peak of 2280 RPM with a value of 0x31, then it slows down again toward 0 RPM as the register value is decreased down to 0.

Bit 3 of register 0x14, when set, only modifies the curve so the first minimum is instead reached at 0x30 then the peak occurs at 0x1d before dropping to 0.

Changing the PWM base clock select has no effect.

Nicolas

Hi Nicolas,

So at least the polarity bit is correct, and Gigabyte isn't to blame.

Wow! Unexpected, to say the least. First time I see such a behavior.

Could it be that your CPU fan isn't a simple passive device but one of these high-tech models with an embedded thermal sensor and automatic speed adjustment? This would possibly interact with the motherboard PWM capability and could explain the strange speed curve your obtained.

I would also like you to try a similar test with your case fan. Enable "smart guardian" mode for this one (by writing 0x73 to register 0x13), then scan the 0x7f-0x00 range (register 0x16) like you did for your CPU fan. I wonder if you will obtain the same kind of result or a standard linear curve.

(Note that PWM2 might not be wired at all on your motherboard, so don't be surprised if the case fan speed doesn't change at all.)

Thanks,

Jean Delvare
http://khali.linux-fr.org/