add PCI retry error handler

Index: linux/arch/mips/pci/fixup-cobalt.c
===================================================================
@@ -102,7 +102,14 @@
 		/* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */
 		timeo = GALILEO_INL(GT_PCI0_TOR_OFS);
 		/* Old Galileo, assumes PCI STOP line to VIA is disconnected. */
-		GALILEO_OUTL(0xffff, GT_PCI0_TOR_OFS);
+		GALILEO_OUTL(
+			(0xff << 16) |		/* retry count */
+			(0xff << 8) |		/* timeout 1   */
+			0xff,			/* timeout 0   */
+			GT_PCI0_TOR_OFS);
+
+		/* enable PCI retry exceeded interrupt */
+		GALILEO_OUTL(GALILEO_INTR_RETRY_CTR | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
 	}
 }
 

Index: linux/arch/mips/pci/ops-gt64111.c
===================================================================
@@ -18,21 +18,13 @@
 #include <asm/cobalt/cobalt.h>
 
 /*
- * Accessing device 31 hangs the GT64120.  Not sure if this will also hang
- * the GT64111, let's be paranoid for now.
- *
- * Accessing device COBALT_PCICONF_CPU hangs early units.
+ * Device 31 on the GT64111 is used to generate PCI special
+ * cycles, so we shouldn't expected to find a device there ...
  */
 static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
 {
-	unsigned slot;
-
-	if (bus->number == 0) {
-
-		slot = PCI_SLOT(devfn);
-		if (slot != COBALT_PCICONF_CPU && slot < 31)
-			return 0;
-	}
+	if (bus->number == 0 && PCI_SLOT(devfn) < 31)
+		return 0;
 
 	return -1;
 }

Index: linux/arch/mips/cobalt/irq.c
===================================================================
@@ -11,6 +11,7 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#include <linux/pci.h>
 
 #include <asm/i8259.h>
 #include <asm/irq_cpu.h>

@@ -45,7 +46,7 @@
 
 static inline void galileo_irq(struct pt_regs *regs)
 {
-	unsigned int mask, pending;
+	unsigned int mask, pending, devfn;
 
 	mask = GALILEO_INL(GT_INTRMASK_OFS);
 	pending = GALILEO_INL(GT_INTRCAUSE_OFS) & mask;

@@ -55,6 +56,13 @@
 		GALILEO_OUTL(~GALILEO_INTR_T0EXP, GT_INTRCAUSE_OFS);
 		do_IRQ(COBALT_GALILEO_IRQ, regs);
 
+	} else if (pending & GALILEO_INTR_RETRY_CTR) {
+
+		devfn = GALILEO_INL(GT_PCI0_CFGADDR_OFS) >> 8;
+		GALILEO_OUTL(~GALILEO_INTR_RETRY_CTR, GT_INTRCAUSE_OFS);
+		printk(KERN_WARNING "Galileo: PCI retry count exceeded (%02x.%u)\n",
+			PCI_SLOT(devfn), PCI_FUNC(devfn));
+
 	} else {
 
 		GALILEO_OUTL(mask & ~pending, GT_INTRMASK_OFS);

Index: linux/include/asm-mips/cobalt/cobalt.h
===================================================================
@@ -87,6 +87,7 @@
 } while (0)
 
 #define GALILEO_INTR_T0EXP	(1 << 8)
+#define GALILEO_INTR_RETRY_CTR	(1 << 20)
 
 #define GALILEO_ENTC0		0x01
 #define GALILEO_SELTC0		0x02