Latest bk can NOT compile on x86_64

PATCH New Nakajima, Jun 2 participants 2 messages May 31, 2005

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Nakajima, Jun

author

2005-05-31 21:35 UTC #0 lore raw

Quoted 30 lines · David F Barrera

Quoted 29 lines · Jun
Quoted 27 lines · David F Barrera
OK. This is the first time that I've been able to build Xen on SLES 9 x86_64. When attempting to boot, Dom0 crashes. Although there is already a defect open (Bugzilla #26) for a failure to boot Dom0 on x86_64 on FC4, I am opening a new defect (Bugzilla #65) since the failures appear different.
(XEN) Scrubbing Free RAM: ...........done.
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch
input to Xen). (XEN) CPU: 0
(XEN) EIP: e030:[<0000000000000000>]
(XEN) EFLAGS: 0000000000010282
(XEN) rax: 00000000ffffffea rbx: 00000000105f5000 rcx:
0000000000000000 rdx: 0000000000000000
(XEN) rsi: 0000000000000001 rdi: ffffffff804ebf40 rbp:
0000000000000808 rsp: ffffffff804ebf08
(XEN) r8: 0000000000000000 r9: 0000000000000000 r10:
0000000000007ff0 r11: 0000000000000282
(XEN) r12: 0000000000000000 r13: ffffffff805f4000 r14:
ffffffff80102000 r15: ffffffff804ebfb0
(XEN) Xen stack trace from rsp=ffffffff804ebf08:
(XEN) ffffffff80118d9d 0000000000000202 ffffffff80118da1
000000000001e030 0000000000010282 ffffffff804ebf40 000000000000e02b
00000000105f5808 (XEN) 0000000010101065 0000000000000000
ffffffff80115d08 0000000000000000 0000000000000000 ffffffff804d8080 ffffffff80 on CPU0: Domain 0 crashed!
****************************************

Quoted 8 lines

Quoted 7 lines
This is different from the other ones, but we need more hints as I don't see this problem on our machines. For example, can you show the instructions around 0xffffffff80118d9d? Please do like
1. objdump -d vmlinux > out (in linux-2.6.11-xen0)
2. search ffffffff80118d9d in 'out'
3. cut and send the disassembled instructions around ffffffff80118d9d.
OK. Here they are:(ffffffff80118d9d is in the middle)

Looks like xen_l1_entry_update is failing because xen did not like the page.

Can you do the same thing with 0xffffffff80115d08?

Jun
---
Intel Open Source Technology Center

Scott Parish

2005-05-31 23:28 UTC #1 lore raw

PATCH 1/1 "flags" bits need shifting (was Re: Latest bk can NOT compile on x86_64)

This patch gets me to a prompt on dom0 x86_64. Its probably not the perfect solution, but the hypercall interface is under discussion anyway.

Should be pretty self explanitory--l?e_create_phys is expecting flag bits in the scruntched format, and we were passing in the unscruntched format.

sRp

Signature · 2 lines

Scott Parish
Signed-off-by: [email protected]

xen/arch/x86/mm.c +7 -7

diff -rN -u -p old-xen-64-4/xen/arch/x86/mm.c new-xen-64-4/xen/arch/x86/mm.c
@@ -2029,7 +2029,7 @@ int do_mmu_update(
                     l1_pgentry_t l1e;
 
                     /* FIXME: doesn't work with PAE */
-                    l1e = l1e_create_phys(req.val, req.val);
+                    l1e = l1e_create_phys(req.val, get_pte_flags(req.val));
                     okay = mod_l1_entry(va, l1e);
                     if ( okay && unlikely(shadow_mode_enabled(d)) )
                         shadow_l1_normal_pt_update(d, req.ptr, l1e, &sh_mapcache);

@@ -2044,7 +2044,7 @@ int do_mmu_update(
                     l2_pgentry_t l2e;
 
                     /* FIXME: doesn't work with PAE */
-                    l2e = l2e_create_phys(req.val, req.val);
+                    l2e = l2e_create_phys(req.val, get_pte_flags(req.val));
                     okay = mod_l2_entry((l2_pgentry_t *)va, l2e, mfn, type_info);
                     if ( okay && unlikely(shadow_mode_enabled(d)) )
                         shadow_l2_normal_pt_update(d, req.ptr, l2e, &sh_mapcache);

@@ -2059,7 +2059,7 @@ int do_mmu_update(
                     l3_pgentry_t l3e;
 
                     /* FIXME: doesn't work with PAE */
-                    l3e = l3e_create_phys(req.val,req.val);
+                    l3e = l3e_create_phys(req.val, get_pte_flags(req.val));
                     okay = mod_l3_entry(va, l3e, mfn);
                     if ( okay && unlikely(shadow_mode_enabled(d)) )
                         shadow_l3_normal_pt_update(d, req.ptr, l3e, &sh_mapcache);

@@ -2074,7 +2074,7 @@ int do_mmu_update(
                 {
                     l4_pgentry_t l4e;
 
-                    l4e = l4e_create_phys(req.val,req.val);
+                    l4e = l4e_create_phys(req.val, get_pte_flags(req.val));
                     okay = mod_l4_entry(va, l4e, mfn);
                     if ( okay && unlikely(shadow_mode_enabled(d)) )
                         shadow_l4_normal_pt_update(d, req.ptr, l4e, &sh_mapcache);

@@ -2251,7 +2251,7 @@ int do_update_va_mapping(unsigned long v
                          unsigned long val32,
                          unsigned long flags)
 {
-    l1_pgentry_t       val  = l1e_create_phys(val32,val32);
+    l1_pgentry_t       val  = l1e_create_phys(val32, get_pte_flags(val32));
     struct exec_domain *ed  = current;
     struct domain      *d   = ed->domain;
     unsigned int        cpu = ed->processor;

@@ -2741,7 +2741,7 @@ static int ptwr_emulated_update(
     }
 
     /* Check the new PTE. */
-    nl1e = l1e_create_phys(val, val & ~PAGE_MASK);
+    nl1e = l1e_create_phys(val, get_pte_flags(val));
     if ( unlikely(!get_page_from_l1e(nl1e, d)) )
         return X86EMUL_UNHANDLEABLE;

@@ -2749,7 +2749,7 @@ static int ptwr_emulated_update(
     pl1e = map_domain_mem(page_to_phys(page) + (addr & ~PAGE_MASK));
     if ( do_cmpxchg )
     {
-        ol1e = l1e_create_phys(old, old & ~PAGE_MASK);
+        ol1e = l1e_create_phys(old, get_pte_flags(old));
         if ( cmpxchg((unsigned long *)pl1e, old, val) != old )
         {
             unmap_domain_mem(pl1e);

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