sil24: add constants
PATCH 1/1 sil24: add constants
Adds constants for ATAPI support to sata_sil24. This patch is originally from Jeff Garzik <[email protected]>.
Signed-off-by Tejun Heo <[email protected]>
drivers/scsi/sata_sil24.c +20 -1
@@ -139,6 +139,7 @@ enum {PORT_CS_DEV_RST = (1 <<1 ),/* device reset */ PORT_CS_INIT = (1 <<2 ),/* port initialize */ PORT_CS_IRQ_WOC = (1 <<3 ),/* interrupt write one to clear */ +PORT_CS_CDB16 = (1 <<5 ),/* 0=12b cdb, 1=16b cdb */ PORT_CS_RESUME = (1 <<6 ),/* port resume */ PORT_CS_32BIT_ACTV = (1 <<10 ),/* 32-bit activation */ PORT_CS_PM_EN = (1 << 13), /* port multiplier enable */
@@ -188,11 +189,29 @@ enum {PORT_CERR_XFR_PCIPERR =35 ,/* PSD ecode 11 - PCI prity err during transfer */ PORT_CERR_SENDSERVICE =36 ,/* FIS received while sending service */ +/* bits of PRB control field */ +PRB_CTRL_PROTOCOL = (1 <<0 ),/* override def. ATA protocol */ +PRB_CTRL_PACKET_READ = (1 <<4 ),/* PACKET cmd read */ +PRB_CTRL_PACKET_WRITE = (1 <<5 ),/* PACKET cmd write */ +PRB_CTRL_NIEN = (1 <<6 ),/* Mask completion irq */ +PRB_CTRL_SRST = (1 <<7 ),/* Soft reset request (ign BSY?) */ + +/* PRB protocol field */ +PRB_PROT_PACKET = (1 <<0 ), +PRB_PROT_TCQ = (1 <<1 ), +PRB_PROT_NCQ = (1 <<2 ), +PRB_PROT_READ = (1 <<3 ), +PRB_PROT_WRITE = (1 <<4 ), +PRB_PROT_TRANSPARENT = (1 <<5 ), +/* * Other constants */ SGE_TRM = (1 <<31 ),/* Last SGE in chain */ -PRB_SOFT_RST = (1 <<7 ),/* Soft reset request (ign BSY?) */ +SGE_LNK = (1 <<30 ),/* linked list +Points to SGT, not SGE */ +SGE_DRD = (1 <<29 ),/* discard data read (/dev/null) +data address ignored */ /* board id */ BID_SIL3124 = 0,
Jeff Garzik
AppliedQuoted 4 lines · Tejun Heo
Adds constants for ATAPI support to
sata_sil24. This patch is originally from Jeff Garzik <[email protected]>.Signed-off-by Tejun Heo <[email protected]>
applied
drivers/scsi/sata_sil24.c enum { · line 214
Quoted 2 lines · Tejun Heo
drivers/scsi/sata_sil24.c +2
-0+ SGE_DRD = (1 << 29), /* discard data read (/dev/null) +data address ignored */
BTW, I'm wondering if sil24 can implement ATAPI padding using this.
I'm willing to bet some other hardware will allow us to simply append a static S/G descriptor, pointing to zeroed memory, whose length is <4 bytes.
In both cases, we could avoid all the nasty pad handling code.
Jeff