PPC44x EMAC driver: disable TX status deferral in half-duplex mode

PATCH New Eugene Surovegin 1 participant 1 message Dec 27, 2005

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Eugene Surovegin

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2005-12-27 20:36 UTC #0 lore raw

PATCH 1/1 PPC44x EMAC driver: disable TX status deferral in half-duplex mode

Disable TX status deferral (EMACx_MR[MWSW=001]) in half-duplex mode. I have two reports when EMAC stops transmitting when connected to a hub. TX ring debug printouts show complete mess when this happens, probably hardware collision handling doesn't work quite well in this mode.

This is relevant only for SoCs with EMAC4 core (440GX, 440SP, 440SPe). Tested on 440GX.

Signed-off-by Eugene Surovegin <[email protected]>

---

 ibm_emac.h      |    3 ++-
 ibm_emac_core.c |    2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

drivers/net/ibm_emac/ibm_emac.h +2 -1

index 644edbf..c2dae60 100644
@@ -110,6 +110,7 @@ struct emac_regs {
 #define EMAC_MR1_TFS_2K			0x00080000
 #define EMAC_MR1_TR0_MULT		0x00008000
 #define EMAC_MR1_JPSM			0x00000000
+#define EMAC_MR1_MWSW_001		0x00000000
 #define EMAC_MR1_BASE(opb)		(EMAC_MR1_TFS_2K | EMAC_MR1_TR0_MULT)
 #else
 #define EMAC_MR1_RFS_4K			0x00180000

@@ -130,7 +131,7 @@ struct emac_regs {
 					 (freq) <= 83  ? EMAC_MR1_OBCI_83 : \
 					 (freq) <= 100 ? EMAC_MR1_OBCI_100 : EMAC_MR1_OBCI_100P)
 #define EMAC_MR1_BASE(opb)		(EMAC_MR1_TFS_2K | EMAC_MR1_TR | \
-					 EMAC_MR1_MWSW_001 | EMAC_MR1_OBCI(opb))
+					 EMAC_MR1_OBCI(opb))
 #endif
 
 /* EMACx_TMR0 */

drivers/net/ibm_emac/ibm_emac_core.c +1 -1

index 1da8a66..591c586 100644
@@ -408,7 +408,7 @@ static int emac_configure(struct ocp_ene
 	/* Mode register */
 	r = EMAC_MR1_BASE(emac_opb_mhz()) | EMAC_MR1_VLE | EMAC_MR1_IST;
 	if (dev->phy.duplex == DUPLEX_FULL)
-		r |= EMAC_MR1_FDE;
+		r |= EMAC_MR1_FDE | EMAC_MR1_MWSW_001;
 	dev->stop_timeout = STOP_TIMEOUT_10;
 	switch (dev->phy.speed) {
 	case SPEED_1000: