[PATCH] nvidiafb: Fix 6xxx/7xxx cards

Benjamin Herrenschmidt

author

2005-12-07 08:35 UTC #0 lore raw

PATCH 1/1 nvidiafb: Fix 6xxx/7xxx cards

Recent X "nv" driver was fixed for various issues with modern 6xxx and 7xxx cards. This patch ports those fixes to nvidiafb. This makes it work fine on the 6600 bundled with the newest G5 macs. I've verified it still works on the 5200FX of the iMacG5.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

drivers/video/nvidia/nv_hw.c +66 ~~-17~~

Index: linux-work/drivers/video/nvidia/nv_hw.c
===================================================================
@@ -848,7 +848,7 @@ void NVCalcStateExt(struct nvidia_par *p
 		    int width,
 		    int hDisplaySize, int height, int dotClock, int flags)
 {
-	int pixelDepth, VClk;
+	int pixelDepth, VClk = 0;
 	/*
 	 * Save mode parameters.
 	 */

@@ -938,17 +938,26 @@ void NVLoadStateExt(struct nvidia_par *p
 
 	if (par->Architecture == NV_ARCH_04) {
 		NV_WR32(par->PFB, 0x0200, state->config);
-	} else if ((par->Chipset & 0xfff0) == 0x0090) {
-		for (i = 0; i < 15; i++) {
-			NV_WR32(par->PFB, 0x0600 + (i * 0x10), 0);
-			NV_WR32(par->PFB, 0x0604 + (i * 0x10), par->FbMapSize - 1);
-		}
-	} else {
+	} else if ((par->Architecture < NV_ARCH_40) ||
+		   (par->Chipset & 0xfff0) == 0x0040) {
 		for (i = 0; i < 8; i++) {
 			NV_WR32(par->PFB, 0x0240 + (i * 0x10), 0);
-			NV_WR32(par->PFB, 0x0244 + (i * 0x10), par->FbMapSize - 1);
+			NV_WR32(par->PFB, 0x0244 + (i * 0x10),
+				par->FbMapSize - 1);
 		}
-	}
+	} else {
+		int regions = 12;
+  	 
+		if (((par->Chipset & 0xfff0) == 0x0090) ||
+		    ((par->Chipset & 0xfff0) == 0x01D0) ||
+		    ((par->Chipset & 0xfff0) == 0x0290))
+			regions = 15;  	 
+		for(i = 0; i < regions; i++) {
+			NV_WR32(par->PFB, 0x0600 + (i * 0x10), 0);
+			NV_WR32(par->PFB, 0x0604 + (i * 0x10),
+				par->FbMapSize - 1);
+		}
+	} 
 
 	if (par->Architecture >= NV_ARCH_40) {
 		NV_WR32(par->PRAMIN, 0x0000 * 4, 0x80000010);

@@ -1182,11 +1191,17 @@ void NVLoadStateExt(struct nvidia_par *p
 			NV_WR32(par->PGRAPH, 0x0608, 0xFFFFFFFF);
 		} else {
 			if (par->Architecture >= NV_ARCH_40) {
+				u32 tmp;
+
 				NV_WR32(par->PGRAPH, 0x0084, 0x401287c0);
 				NV_WR32(par->PGRAPH, 0x008C, 0x60de8051);
 				NV_WR32(par->PGRAPH, 0x0090, 0x00008000);
 				NV_WR32(par->PGRAPH, 0x0610, 0x00be3c5f);
 
+				tmp = NV_RD32(par->REGS, 0x1540) & 0xff;
+				for(i = 0; tmp && !(tmp & 1); tmp >>= 1, i++);
+				NV_WR32(par->PGRAPH, 0x5000, i);
+ 
 				if ((par->Chipset & 0xfff0) == 0x0040) {
 					NV_WR32(par->PGRAPH, 0x09b0,
 						0x83280fff);

@@ -1211,6 +1226,7 @@ void NVLoadStateExt(struct nvidia_par *p
 						0xffff7fff);
 					break;
 				case 0x00C0:
+				case 0x0120:
 					NV_WR32(par->PGRAPH, 0x0828,
 						0x007596ff);
 					NV_WR32(par->PGRAPH, 0x082C,

@@ -1245,6 +1261,7 @@ void NVLoadStateExt(struct nvidia_par *p
 						0x00100000);
 					break;
 				case 0x0090:
+				case 0x0290:
 					NV_WR32(par->PRAMDAC, 0x0608,
 						NV_RD32(par->PRAMDAC, 0x0608) |
 						0x00100000);

@@ -1310,14 +1327,44 @@ void NVLoadStateExt(struct nvidia_par *p
 				}
 			}
 
-			if ((par->Chipset & 0xfff0) == 0x0090) {
-				for (i = 0; i < 60; i++)
-					NV_WR32(par->PGRAPH, 0x0D00 + i,
-						NV_RD32(par->PFB, 0x0600 + i));
+			if ((par->Architecture < NV_ARCH_40) ||
+			    ((par->Chipset & 0xfff0) == 0x0040)) {
+				for (i = 0; i < 32; i++) {
+					NV_WR32(par->PGRAPH, 0x0900 + i*4,
+						NV_RD32(par->PFB, 0x0240 +i*4));
+					NV_WR32(par->PGRAPH, 0x6900 + i*4,
+						NV_RD32(par->PFB, 0x0240 +i*4));
+				}
 			} else {
-				for (i = 0; i < 32; i++)
-					NV_WR32(par->PGRAPH, 0x0900 + i,
-						NV_RD32(par->PFB, 0x0240 + i));
+				if (((par->Chipset & 0xfff0) == 0x0090) ||
+				    ((par->Chipset & 0xfff0) == 0x01D0) ||
+				    ((par->Chipset & 0xfff0) == 0x0290)) {
+					for (i = 0; i < 60; i++) {
+						NV_WR32(par->PGRAPH,
+							0x0D00 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+						NV_WR32(par->PGRAPH,
+							0x6900 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+					}
+				} else {
+					for (i = 0; i < 48; i++) {
+						NV_WR32(par->PGRAPH,
+							0x0900 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+						if(((par->Chipset & 0xfff0)
+						    != 0x0160) &&
+						   ((par->Chipset & 0xfff0)
+						    != 0x0220))
+							NV_WR32(par->PGRAPH,
+								0x6900 + i*4,
+								NV_RD32(par->PFB,
+									0x0600 + i*4));
+					}
+				}
 			}
 
 			if (par->Architecture >= NV_ARCH_40) {

@@ -1338,7 +1385,9 @@ void NVLoadStateExt(struct nvidia_par *p
 					NV_WR32(par->PGRAPH, 0x0868,
 						par->FbMapSize - 1);
 				} else {
-					if((par->Chipset & 0xfff0) == 0x0090) {
+					if ((par->Chipset & 0xfff0) == 0x0090 ||
+					    (par->Chipset & 0xfff0) == 0x01D0 ||
+					    (par->Chipset & 0xfff0) == 0x0290) {
 						NV_WR32(par->PGRAPH, 0x0DF0,
 							NV_RD32(par->PFB, 0x0200));
 						NV_WR32(par->PGRAPH, 0x0DF4,

drivers/video/nvidia/nv_setup.c +2 -1

Index: linux-work/drivers/video/nvidia/nv_setup.c
===================================================================
@@ -285,7 +285,6 @@ static void nv10GetConfig(struct nvidia_
 			par->CrystalFreqKHz = 27000;
 	}
 
-	par->CursorStart = (par->RamAmountKBytes - 96) * 1024;
 	par->CURSOR = NULL;	/* can't set this here */
 	par->MinVClockFreqKHz = 12000;
 	par->MaxVClockFreqKHz = par->twoStagePLL ? 400000 : 350000;

@@ -382,6 +381,8 @@ void NVCommonSetup(struct fb_info *info)
 	case 0x0146:
 	case 0x0147:
 	case 0x0148:
+	case 0x0098:
+	case 0x0099:
 		mobile = 1;
 		break;
 	default:

drivers/video/nvidia/nvidia.c +8 -1

Index: linux-work/drivers/video/nvidia/nvidia.c
===================================================================
@@ -1485,6 +1485,8 @@ static u32 __devinit nvidia_get_arch(str
 	case 0x0210:
 	case 0x0220:
 	case 0x0230:
+	case 0x0290:
+	case 0x0390:
 		arch = NV_ARCH_40;
 		break;
 	case 0x0020:		/* TNT, TNT2 */

@@ -1581,10 +1583,15 @@ static int __devinit nvidiafb_probe(stru
 	if (par->FbMapSize > 64 * 1024 * 1024)
 		par->FbMapSize = 64 * 1024 * 1024;
 
-	par->FbUsableSize = par->FbMapSize - (128 * 1024);
+	if(par->Architecture >= NV_ARCH_40)
+  	        par->FbUsableSize = par->FbMapSize - (560 * 1024);
+	else
+		par->FbUsableSize = par->FbMapSize - (128 * 1024);
 	par->ScratchBufferSize = (par->Architecture < NV_ARCH_10) ? 8 * 1024 :
 	    16 * 1024;
 	par->ScratchBufferStart = par->FbUsableSize - par->ScratchBufferSize;
+	par->CursorStart = par->FbUsableSize + (32 * 1024);
+
 	info->screen_base = ioremap(nvidiafb_fix.smem_start, par->FbMapSize);
 	info->screen_size = par->FbUsableSize;
 	nvidiafb_fix.smem_len = par->RamAmountKBytes * 1024;

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Antonino A. Daplas

Acked-by Antonino Daplas on v1 1/1

2005-12-08 21:24 UTC #1 lore raw

Quoted 4 lines · Benjamin Herrenschmidt

Recent X "nv" driver was fixed for various issues with modern 6xxx and 7xxx cards. This patch ports those fixes to nvidiafb. This makes it work fine on the 6600 bundled with the newest G5 macs. I've verified it still works on the 5200FX of the iMacG5.

Yes, I have a similar patch in my tree but I'm waiting for people to verify the patch.

(And I have I more patch for pci-e cards, and still waiting for testers to respond.)

Quoted 2 lines

Signed-off-by Benjamin Herrenschmidt <[email protected]>

Acked-by Antonino Daplas <[email protected]>

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Benjamin Herrenschmidt

author

2005-12-08 22:20 UTC #2 lore raw

Quoted 11 lines · Antonino A. Daplas

Quoted 4 lines · Benjamin Herrenschmidt
Recent X "nv" driver was fixed for various issues with modern 6xxx and 7xxx cards. This patch ports those fixes to nvidiafb. This makes it work fine on the 6600 bundled with the newest G5 macs. I've verified it still works on the 5200FX of the iMacG5.
Yes, I have a similar patch in my tree but I'm waiting for people to verify the patch.
(And I have I more patch for pci-e cards, and still waiting for testers to respond.)

Can you send me your version of the patch ? I spotted a couple of bugs in your previous code, I want to make sure it's all fixed :)

Ben.

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Antonino A. Daplas

2005-12-08 22:54 UTC #3 lore raw

Quoted 6 lines · Benjamin Herrenschmidt

Quoted 5 lines · Antonino A. Daplas
Quoted 4 lines · Benjamin Herrenschmidt
Recent X "nv" driver was fixed for various issues with modern 6xxx and 7xxx cards. This patch ports those fixes to nvidiafb. This makes it work fine on the 6600 bundled with the newest G5 macs. I've verified it still works on the 5200FX of the iMacG5.

Quoted 9 lines

Quoted 5 lines
Yes, I have a similar patch in my tree but I'm waiting for people to verify the patch.
(And I have I more patch for pci-e cards, and still waiting for testers to respond.)
Can you send me your version of the patch ? I spotted a couple of bugs in your previous code, I want to make sure it's all fixed :)

I already told akpm to drop mine and take yours instead as you already verified that it works. I'll send you the pci-e support patch, diffed against your patch if you want.

Tony

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Benjamin Herrenschmidt

author

2005-12-11 07:56 UTC #4 lore raw

Quoted 4 lines

I already told akpm to drop mine and take yours instead as you already verified that it works. I'll send you the pci-e support patch, diffed against your patch if you want.

That's fine, thanks.

Ben.

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Benjamin Herrenschmidt

author

2006-01-09 02:33 UTC #5 lore raw

Quoted 3 lines · Benjamin Herrenschmidt

Quoted 3 lines
I already told akpm to drop mine and take yours instead as you already verified that it works. I'll send you the pci-e support patch, diffed against your patch if you want.

It's not yet upstream and we are about to merge the new g5 support. Andrew, will you send it to Linus or was there some issues with the patch ?

Ben.

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Andrew Morton

2006-01-09 03:17 UTC #6 lore raw

Quoted 4 lines · Benjamin Herrenschmidt

Quoted 2 lines · Benjamin Herrenschmidt
Quoted 2 lines
I already told akpm to drop mine and take yours instead as you already verified that it works.

I didn't get that message..

Quoted 7 lines

I'll send you the pci-e support patch, diffed
Quoted 1 line
Quoted 1 line
against your patch if you want.
It's not yet upstream and we are about to merge the new g5 support. Andrew, will you send it to Linus or was there some issues with the patch ?

Current nvidia patches which I have are:

nvidiafb-i2c-bus-name-beautification.patch fbdev-nvidiafb-driver-cleanup.patch nvidiafb-add-support-for-some-pci-e-chipsets.patch nvidiafb-add-support-for-some-pci-e-chipsets-fix.patch nvidiafb-add-boot-option-bpp.patch nvidiafb-reduce-stack-usage.patch nvidia-agp-use-time_before_eq.patch

None of those appear to do the same thing as Ben's patch, so I don't know what's going on here.

Gad. It looks like a variant of Ben's patch is in the powerpc tree. wtf is it doing there?

Anyway, all of the above patches apply OK to whatever is in git-powerpc so I spose we can just merge git-powerpc and be happy. Soon, I hope - I have a few things held up by that tree.

Tell Paul to grovel appropriately to Linus when he sends it though - putting non-arch stuff into an arch tree tends to upset him.

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Benjamin Herrenschmidt

author

2006-01-09 04:29 UTC #7 lore raw

Quoted 3 lines

Gad. It looks like a variant of Ben's patch is in the powerpc tree. wtf is it doing there?

What's going on is that the powerpc tree contains that patch bcs it contains all the necessary bits to boot a new g5 and that includes it. However, paulus is currently cooking a merged tree for linus with all of that stuff, but not the nvidiafb patch since it's not the proper way to get it in sneaked inside a powerpc merge ;)

Quoted 3 lines

Anyway, all of the above patches apply OK to whatever is in git-powerpc so I spose we can just merge git-powerpc and be happy. Soon, I hope - I have a few things held up by that tree.

We are working on it.

Quoted 2 lines

Tell Paul to grovel appropriately to Linus when he sends it though - putting non-arch stuff into an arch tree tends to upset him.

Well, that's why we aren't sending it to Linus ourselves... I'll send it back to you separately.

Ben.

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Andrew Morton

2006-01-09 06:10 UTC #8 lore raw

Quoted 7 lines · Benjamin Herrenschmidt

Quoted 4 lines
Anyway, all of the above patches apply OK to whatever is in git-powerpc so I spose we can just merge git-powerpc and be happy. Soon, I hope - I have a few things held up by that tree.
We are working on it.

hm, OK.

You now shrink-dentry-struct-spufs-fix.patch, which I'll resend.

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Benjamin Herrenschmidt

author

2006-01-09 06:38 UTC #9 lore raw

Quoted 6 lines · Andrew Morton

Quoted 5 lines · Benjamin Herrenschmidt
Quoted 4 lines
Anyway, all of the above patches apply OK to whatever is in git-powerpc so I spose we can just merge git-powerpc and be happy. Soon, I hope - I have a few things held up by that tree.

Quoted 6 lines

Quoted 2 lines
We are working on it.
hm, OK.
You now shrink-dentry-struct-spufs-fix.patch, which I'll resend.

Ok. Paulus is just only back from vacation, so we have a big backlog of stuffs. Hopefully he'll have something for Linus to pull tonight or tomorrow.

Ben.

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Antonino A. Daplas

2006-01-10 01:23 UTC #10 lore raw

In reply to Andrew Morton

Quoted 6 lines · Andrew Morton

Quoted 3 lines · Benjamin Herrenschmidt
Quoted 2 lines · Benjamin Herrenschmidt
Quoted 2 lines
I already told akpm to drop mine and take yours instead as you already verified that it works.
I didn't get that message..

Probably got lost. You already accepted it, and most probably sent it to Linus, on Dec 10 and Dec 16 respectively. I have these in my inbox.

+ nvidiafb-fix-6xxx-7xxx-cards.patch added to -mm tree 12/10/2005
- nvidiafb-fix-6xxx-7xxx-cards.patch removed from -mm tree 12/16/2005

Tony

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Antonino A. Daplas

2006-01-10 01:26 UTC #11 lore raw

In reply to Andrew Morton

Quoted 6 lines · Andrew Morton

Quoted 3 lines · Benjamin Herrenschmidt
Quoted 2 lines · Benjamin Herrenschmidt
Quoted 2 lines
I already told akpm to drop mine and take yours instead as you already verified that it works.
I didn't get that message..

Probably got lost. You already accepted it, and most probably sent it to Linus, on Dec 10 and Dec 16 respectively. I have these in my inbox.

+ nvidiafb-fix-6xxx-7xxx-cards.patch added to -mm tree 12/10/2005
- nvidiafb-fix-6xxx-7xxx-cards.patch removed from -mm tree 12/16/2005

Tony

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Benjamin Herrenschmidt

author

2006-01-10 02:43 UTC #12 lore raw

Quoted 6 lines · Antonino A. Daplas

Quoted 5 lines · Andrew Morton
Quoted 3 lines · Benjamin Herrenschmidt
Quoted 2 lines · Benjamin Herrenschmidt
Quoted 2 lines
I already told akpm to drop mine and take yours instead as you already verified that it works.

Quoted 7 lines

Quoted 1 line
I didn't get that message..
Probably got lost. You already accepted it, and most probably sent it to Linus, on Dec 10 and Dec 16 respectively. I have these in my inbox.
+ nvidiafb-fix-6xxx-7xxx-cards.patch added to -mm tree 12/10/2005
- nvidiafb-fix-6xxx-7xxx-cards.patch removed from -mm tree 12/16/2005

Well it wasn't in Linus tree yesterday...

Ben.

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Andrew Morton

Acked-by Antonino A. Daplas

2006-01-10 03:15 UTC #13 lore raw

Quoted 10 lines · Benjamin Herrenschmidt

Quoted 8 lines · Antonino A. Daplas
Quoted 6 lines · Andrew Morton
Quoted 3 lines · Benjamin Herrenschmidt
Quoted 2 lines · Benjamin Herrenschmidt
Quoted 2 lines
I already told akpm to drop mine and take yours instead as you already verified that it works.
I didn't get that message..

Quoted 8 lines

Quoted 5 lines
Probably got lost. You already accepted it, and most probably sent it to Linus, on Dec 10 and Dec 16 respectively. I have these in my inbox.
+ nvidiafb-fix-6xxx-7xxx-cards.patch added to -mm tree 12/10/2005
- nvidiafb-fix-6xxx-7xxx-cards.patch removed from -mm tree 12/16/2005
Well it wasn't in Linus tree yesterday...

I'm about to send this:

From: Benjamin Herrenschmidt <[email protected]>

Recent X "nv" driver was fixed for various issues with modern 6xxx and 7xxx cards. This patch ports those fixes to nvidiafb. This makes it work fine on the 6600 bundled with the newest G5 macs. I've verified it still works on the 5200FX of the iMacG5.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

Acked-by "Antonino A. Daplas" <[email protected]>

Signed-off-by Andrew Morton <[email protected]>

---

 drivers/video/nvidia/nv_hw.c    |   81 ++++++++++++++++++++++++------
 drivers/video/nvidia/nv_setup.c |    3 -
 drivers/video/nvidia/nvidia.c   |    9 ++-
 3 files changed, 75 insertions(+), 18 deletions(-)

drivers/video/nvidia/nv_hw.c renamed from drivers/video/nvidia/nv_hw.c~nvidiafb-fixes-for-new-g5 +65 ~~-16~~

diff -puN drivers/video/nvidia/nv_hw.c~nvidiafb-fixes-for-new-g5 drivers/video/nvidia/nv_hw.c
@@ -848,7 +848,7 @@ void NVCalcStateExt(struct nvidia_par *p
 		    int width,
 		    int hDisplaySize, int height, int dotClock, int flags)
 {
-	int pixelDepth, VClk;
+	int pixelDepth, VClk = 0;
 	/*
 	 * Save mode parameters.
 	 */

@@ -938,15 +938,24 @@ void NVLoadStateExt(struct nvidia_par *p
 
 	if (par->Architecture == NV_ARCH_04) {
 		NV_WR32(par->PFB, 0x0200, state->config);
-	} else if ((par->Chipset & 0xfff0) == 0x0090) {
-		for (i = 0; i < 15; i++) {
-			NV_WR32(par->PFB, 0x0600 + (i * 0x10), 0);
-			NV_WR32(par->PFB, 0x0604 + (i * 0x10), par->FbMapSize - 1);
-		}
-	} else {
+	} else if ((par->Architecture < NV_ARCH_40) ||
+		   (par->Chipset & 0xfff0) == 0x0040) {
 		for (i = 0; i < 8; i++) {
 			NV_WR32(par->PFB, 0x0240 + (i * 0x10), 0);
-			NV_WR32(par->PFB, 0x0244 + (i * 0x10), par->FbMapSize - 1);
+			NV_WR32(par->PFB, 0x0244 + (i * 0x10),
+				par->FbMapSize - 1);
+		}
+	} else {
+		int regions = 12;
+
+		if (((par->Chipset & 0xfff0) == 0x0090) ||
+		    ((par->Chipset & 0xfff0) == 0x01D0) ||
+		    ((par->Chipset & 0xfff0) == 0x0290))
+			regions = 15;
+		for(i = 0; i < regions; i++) {
+			NV_WR32(par->PFB, 0x0600 + (i * 0x10), 0);
+			NV_WR32(par->PFB, 0x0604 + (i * 0x10),
+				par->FbMapSize - 1);
 		}
 	}

@@ -1182,11 +1191,17 @@ void NVLoadStateExt(struct nvidia_par *p
 			NV_WR32(par->PGRAPH, 0x0608, 0xFFFFFFFF);
 		} else {
 			if (par->Architecture >= NV_ARCH_40) {
+				u32 tmp;
+
 				NV_WR32(par->PGRAPH, 0x0084, 0x401287c0);
 				NV_WR32(par->PGRAPH, 0x008C, 0x60de8051);
 				NV_WR32(par->PGRAPH, 0x0090, 0x00008000);
 				NV_WR32(par->PGRAPH, 0x0610, 0x00be3c5f);
 
+				tmp = NV_RD32(par->REGS, 0x1540) & 0xff;
+				for(i = 0; tmp && !(tmp & 1); tmp >>= 1, i++);
+				NV_WR32(par->PGRAPH, 0x5000, i);
+
 				if ((par->Chipset & 0xfff0) == 0x0040) {
 					NV_WR32(par->PGRAPH, 0x09b0,
 						0x83280fff);

@@ -1211,6 +1226,7 @@ void NVLoadStateExt(struct nvidia_par *p
 						0xffff7fff);
 					break;
 				case 0x00C0:
+				case 0x0120:
 					NV_WR32(par->PGRAPH, 0x0828,
 						0x007596ff);
 					NV_WR32(par->PGRAPH, 0x082C,

@@ -1245,6 +1261,7 @@ void NVLoadStateExt(struct nvidia_par *p
 						0x00100000);
 					break;
 				case 0x0090:
+				case 0x0290:
 					NV_WR32(par->PRAMDAC, 0x0608,
 						NV_RD32(par->PRAMDAC, 0x0608) |
 						0x00100000);

@@ -1310,14 +1327,44 @@ void NVLoadStateExt(struct nvidia_par *p
 				}
 			}
 
-			if ((par->Chipset & 0xfff0) == 0x0090) {
-				for (i = 0; i < 60; i++)
-					NV_WR32(par->PGRAPH, 0x0D00 + i,
-						NV_RD32(par->PFB, 0x0600 + i));
+			if ((par->Architecture < NV_ARCH_40) ||
+			    ((par->Chipset & 0xfff0) == 0x0040)) {
+				for (i = 0; i < 32; i++) {
+					NV_WR32(par->PGRAPH, 0x0900 + i*4,
+						NV_RD32(par->PFB, 0x0240 +i*4));
+					NV_WR32(par->PGRAPH, 0x6900 + i*4,
+						NV_RD32(par->PFB, 0x0240 +i*4));
+				}
 			} else {
-				for (i = 0; i < 32; i++)
-					NV_WR32(par->PGRAPH, 0x0900 + i,
-						NV_RD32(par->PFB, 0x0240 + i));
+				if (((par->Chipset & 0xfff0) == 0x0090) ||
+				    ((par->Chipset & 0xfff0) == 0x01D0) ||
+				    ((par->Chipset & 0xfff0) == 0x0290)) {
+					for (i = 0; i < 60; i++) {
+						NV_WR32(par->PGRAPH,
+							0x0D00 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+						NV_WR32(par->PGRAPH,
+							0x6900 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+					}
+				} else {
+					for (i = 0; i < 48; i++) {
+						NV_WR32(par->PGRAPH,
+							0x0900 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+						if(((par->Chipset & 0xfff0)
+						    != 0x0160) &&
+						   ((par->Chipset & 0xfff0)
+						    != 0x0220))
+							NV_WR32(par->PGRAPH,
+								0x6900 + i*4,
+								NV_RD32(par->PFB,
+									0x0600 + i*4));
+					}
+				}
 			}
 
 			if (par->Architecture >= NV_ARCH_40) {

@@ -1338,7 +1385,9 @@ void NVLoadStateExt(struct nvidia_par *p
 					NV_WR32(par->PGRAPH, 0x0868,
 						par->FbMapSize - 1);
 				} else {
-					if((par->Chipset & 0xfff0) == 0x0090) {
+					if ((par->Chipset & 0xfff0) == 0x0090 ||
+					    (par->Chipset & 0xfff0) == 0x01D0 ||
+					    (par->Chipset & 0xfff0) == 0x0290) {
 						NV_WR32(par->PGRAPH, 0x0DF0,
 							NV_RD32(par->PFB, 0x0200));
 						NV_WR32(par->PGRAPH, 0x0DF4,

drivers/video/nvidia/nvidia.c renamed from drivers/video/nvidia/nvidia.c~nvidiafb-fixes-for-new-g5 +8 -1

diff -puN drivers/video/nvidia/nvidia.c~nvidiafb-fixes-for-new-g5 drivers/video/nvidia/nvidia.c
@@ -1485,6 +1485,8 @@ static u32 __devinit nvidia_get_arch(str
 	case 0x0210:
 	case 0x0220:
 	case 0x0230:
+	case 0x0290:
+	case 0x0390:
 		arch = NV_ARCH_40;
 		break;
 	case 0x0020:		/* TNT, TNT2 */

@@ -1581,10 +1583,15 @@ static int __devinit nvidiafb_probe(stru
 	if (par->FbMapSize > 64 * 1024 * 1024)
 		par->FbMapSize = 64 * 1024 * 1024;
 
-	par->FbUsableSize = par->FbMapSize - (128 * 1024);
+	if(par->Architecture >= NV_ARCH_40)
+  	        par->FbUsableSize = par->FbMapSize - (560 * 1024);
+	else
+		par->FbUsableSize = par->FbMapSize - (128 * 1024);
 	par->ScratchBufferSize = (par->Architecture < NV_ARCH_10) ? 8 * 1024 :
 	    16 * 1024;
 	par->ScratchBufferStart = par->FbUsableSize - par->ScratchBufferSize;
+	par->CursorStart = par->FbUsableSize + (32 * 1024);
+
 	info->screen_base = ioremap(nvidiafb_fix.smem_start, par->FbMapSize);
 	info->screen_size = par->FbUsableSize;
 	nvidiafb_fix.smem_len = par->RamAmountKBytes * 1024;

drivers/video/nvidia/nv_setup.c renamed from drivers/video/nvidia/nv_setup.c~nvidiafb-fixes-for-new-g5 +2 -1

diff -puN drivers/video/nvidia/nv_setup.c~nvidiafb-fixes-for-new-g5 drivers/video/nvidia/nv_setup.c
@@ -285,7 +285,6 @@ static void nv10GetConfig(struct nvidia_
 			par->CrystalFreqKHz = 27000;
 	}
 
-	par->CursorStart = (par->RamAmountKBytes - 96) * 1024;
 	par->CURSOR = NULL;	/* can't set this here */
 	par->MinVClockFreqKHz = 12000;
 	par->MaxVClockFreqKHz = par->twoStagePLL ? 400000 : 350000;

@@ -382,6 +381,8 @@ void NVCommonSetup(struct fb_info *info)
 	case 0x0146:
 	case 0x0147:
 	case 0x0148:
+	case 0x0098:
+	case 0x0099:
 		mobile = 1;
 		break;
 	default:

_

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Benjamin Herrenschmidt

author

2006-01-10 03:28 UTC #14 lore raw

Quoted 1 line · Andrew Morton

I'm about to send this:

Looks good to me.

Thanks !

Ben.

Quoted 208 lines

From: Benjamin Herrenschmidt <[email protected]>

Recent X "nv" driver was fixed for various issues with modern 6xxx and 7xxx cards. This patch ports those fixes to nvidiafb. This makes it work fine on the 6600 bundled with the newest G5 macs. I've verified it still works on the 5200FX of the iMacG5.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

Acked-by "Antonino A. Daplas" <[email protected]>

Signed-off-by Andrew Morton <[email protected]>

---

 drivers/video/nvidia/nv_hw.c    |   81 ++++++++++++++++++++++++------
 drivers/video/nvidia/nv_setup.c |    3 -
 drivers/video/nvidia/nvidia.c   |    9 ++-
 3 files changed, 75 insertions(+), 18 deletions(-)

diff -puN drivers/video/nvidia/nv_hw.c~nvidiafb-fixes-for-new-g5 drivers/video/nvidia/nv_hw.c

drivers/video/nvidia/nv_hw.c renamed from drivers/video/nvidia/nv_hw.c~nvidiafb-fixes-for-new-g5 +65 ~~-16~~

@@ -848,7 +848,7 @@ void NVCalcStateExt(struct nvidia_par *p
 		    int width,
 		    int hDisplaySize, int height, int dotClock, int flags)
 {
-	int pixelDepth, VClk;
+	int pixelDepth, VClk = 0;
 	/*
 	 * Save mode parameters.
 	 */

@@ -938,15 +938,24 @@ void NVLoadStateExt(struct nvidia_par *p
 
 	if (par->Architecture == NV_ARCH_04) {
 		NV_WR32(par->PFB, 0x0200, state->config);
-	} else if ((par->Chipset & 0xfff0) == 0x0090) {
-		for (i = 0; i < 15; i++) {
-			NV_WR32(par->PFB, 0x0600 + (i * 0x10), 0);
-			NV_WR32(par->PFB, 0x0604 + (i * 0x10), par->FbMapSize - 1);
-		}
-	} else {
+	} else if ((par->Architecture < NV_ARCH_40) ||
+		   (par->Chipset & 0xfff0) == 0x0040) {
 		for (i = 0; i < 8; i++) {
 			NV_WR32(par->PFB, 0x0240 + (i * 0x10), 0);
-			NV_WR32(par->PFB, 0x0244 + (i * 0x10), par->FbMapSize - 1);
+			NV_WR32(par->PFB, 0x0244 + (i * 0x10),
+				par->FbMapSize - 1);
+		}
+	} else {
+		int regions = 12;
+
+		if (((par->Chipset & 0xfff0) == 0x0090) ||
+		    ((par->Chipset & 0xfff0) == 0x01D0) ||
+		    ((par->Chipset & 0xfff0) == 0x0290))
+			regions = 15;
+		for(i = 0; i < regions; i++) {
+			NV_WR32(par->PFB, 0x0600 + (i * 0x10), 0);
+			NV_WR32(par->PFB, 0x0604 + (i * 0x10),
+				par->FbMapSize - 1);
 		}
 	}

@@ -1182,11 +1191,17 @@ void NVLoadStateExt(struct nvidia_par *p
 			NV_WR32(par->PGRAPH, 0x0608, 0xFFFFFFFF);
 		} else {
 			if (par->Architecture >= NV_ARCH_40) {
+				u32 tmp;
+
 				NV_WR32(par->PGRAPH, 0x0084, 0x401287c0);
 				NV_WR32(par->PGRAPH, 0x008C, 0x60de8051);
 				NV_WR32(par->PGRAPH, 0x0090, 0x00008000);
 				NV_WR32(par->PGRAPH, 0x0610, 0x00be3c5f);
 
+				tmp = NV_RD32(par->REGS, 0x1540) & 0xff;
+				for(i = 0; tmp && !(tmp & 1); tmp >>= 1, i++);
+				NV_WR32(par->PGRAPH, 0x5000, i);
+
 				if ((par->Chipset & 0xfff0) == 0x0040) {
 					NV_WR32(par->PGRAPH, 0x09b0,
 						0x83280fff);

@@ -1211,6 +1226,7 @@ void NVLoadStateExt(struct nvidia_par *p
 						0xffff7fff);
 					break;
 				case 0x00C0:
+				case 0x0120:
 					NV_WR32(par->PGRAPH, 0x0828,
 						0x007596ff);
 					NV_WR32(par->PGRAPH, 0x082C,

@@ -1245,6 +1261,7 @@ void NVLoadStateExt(struct nvidia_par *p
 						0x00100000);
 					break;
 				case 0x0090:
+				case 0x0290:
 					NV_WR32(par->PRAMDAC, 0x0608,
 						NV_RD32(par->PRAMDAC, 0x0608) |
 						0x00100000);

@@ -1310,14 +1327,44 @@ void NVLoadStateExt(struct nvidia_par *p
 				}
 			}
 
-			if ((par->Chipset & 0xfff0) == 0x0090) {
-				for (i = 0; i < 60; i++)
-					NV_WR32(par->PGRAPH, 0x0D00 + i,
-						NV_RD32(par->PFB, 0x0600 + i));
+			if ((par->Architecture < NV_ARCH_40) ||
+			    ((par->Chipset & 0xfff0) == 0x0040)) {
+				for (i = 0; i < 32; i++) {
+					NV_WR32(par->PGRAPH, 0x0900 + i*4,
+						NV_RD32(par->PFB, 0x0240 +i*4));
+					NV_WR32(par->PGRAPH, 0x6900 + i*4,
+						NV_RD32(par->PFB, 0x0240 +i*4));
+				}
 			} else {
-				for (i = 0; i < 32; i++)
-					NV_WR32(par->PGRAPH, 0x0900 + i,
-						NV_RD32(par->PFB, 0x0240 + i));
+				if (((par->Chipset & 0xfff0) == 0x0090) ||
+				    ((par->Chipset & 0xfff0) == 0x01D0) ||
+				    ((par->Chipset & 0xfff0) == 0x0290)) {
+					for (i = 0; i < 60; i++) {
+						NV_WR32(par->PGRAPH,
+							0x0D00 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+						NV_WR32(par->PGRAPH,
+							0x6900 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+					}
+				} else {
+					for (i = 0; i < 48; i++) {
+						NV_WR32(par->PGRAPH,
+							0x0900 + i*4,
+							NV_RD32(par->PFB,
+								0x0600 + i*4));
+						if(((par->Chipset & 0xfff0)
+						    != 0x0160) &&
+						   ((par->Chipset & 0xfff0)
+						    != 0x0220))
+							NV_WR32(par->PGRAPH,
+								0x6900 + i*4,
+								NV_RD32(par->PFB,
+									0x0600 + i*4));
+					}
+				}
 			}
 
 			if (par->Architecture >= NV_ARCH_40) {

@@ -1338,7 +1385,9 @@ void NVLoadStateExt(struct nvidia_par *p
 					NV_WR32(par->PGRAPH, 0x0868,
 						par->FbMapSize - 1);
 				} else {
-					if((par->Chipset & 0xfff0) == 0x0090) {
+					if ((par->Chipset & 0xfff0) == 0x0090 ||
+					    (par->Chipset & 0xfff0) == 0x01D0 ||
+					    (par->Chipset & 0xfff0) == 0x0290) {
 						NV_WR32(par->PGRAPH, 0x0DF0,
 							NV_RD32(par->PFB, 0x0200));
 						NV_WR32(par->PGRAPH, 0x0DF4,

diff -puN drivers/video/nvidia/nvidia.c~nvidiafb-fixes-for-new-g5 drivers/video/nvidia/nvidia.c

drivers/video/nvidia/nvidia.c renamed from drivers/video/nvidia/nvidia.c~nvidiafb-fixes-for-new-g5 +8 -1

@@ -1485,6 +1485,8 @@ static u32 __devinit nvidia_get_arch(str
 	case 0x0210:
 	case 0x0220:
 	case 0x0230:
+	case 0x0290:
+	case 0x0390:
 		arch = NV_ARCH_40;
 		break;
 	case 0x0020:		/* TNT, TNT2 */

@@ -1581,10 +1583,15 @@ static int __devinit nvidiafb_probe(stru
 	if (par->FbMapSize > 64 * 1024 * 1024)
 		par->FbMapSize = 64 * 1024 * 1024;
 
-	par->FbUsableSize = par->FbMapSize - (128 * 1024);
+	if(par->Architecture >= NV_ARCH_40)
+  	        par->FbUsableSize = par->FbMapSize - (560 * 1024);
+	else
+		par->FbUsableSize = par->FbMapSize - (128 * 1024);
 	par->ScratchBufferSize = (par->Architecture < NV_ARCH_10) ? 8 * 1024 :
 	    16 * 1024;
 	par->ScratchBufferStart = par->FbUsableSize - par->ScratchBufferSize;
+	par->CursorStart = par->FbUsableSize + (32 * 1024);
+
 	info->screen_base = ioremap(nvidiafb_fix.smem_start, par->FbMapSize);
 	info->screen_size = par->FbUsableSize;
 	nvidiafb_fix.smem_len = par->RamAmountKBytes * 1024;

diff -puN drivers/video/nvidia/nv_setup.c~nvidiafb-fixes-for-new-g5 drivers/video/nvidia/nv_setup.c

drivers/video/nvidia/nv_setup.c renamed from drivers/video/nvidia/nv_setup.c~nvidiafb-fixes-for-new-g5 +2 -1

@@ -285,7 +285,6 @@ static void nv10GetConfig(struct nvidia_
 			par->CrystalFreqKHz = 27000;
 	}
 
-	par->CursorStart = (par->RamAmountKBytes - 96) * 1024;
 	par->CURSOR = NULL;	/* can't set this here */
 	par->MinVClockFreqKHz = 12000;
 	par->MaxVClockFreqKHz = par->twoStagePLL ? 400000 : 350000;

@@ -382,6 +381,8 @@ void NVCommonSetup(struct fb_info *info)
 	case 0x0146:
 	case 0x0147:
 	case 0x0148:
+	case 0x0098:
+	case 0x0099:
 		mobile = 1;
 		break;
 	default:

Quoted 1 line

_

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