Au1550/1200: add missing PSC #define's and make OSS drivers use the proper ones

PATCH In review Sergei Shtylylov 2 participants 5 messages Mar 13, 2006 – Mar 24, 2006

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Sergei Shtylylov

author

2006-03-13 17:56 UTC #0 lore raw

PATCH 1/1 Au1550/1200: add missing PSC #define's and make OSS drivers use the proper ones

Hello.

Add missing PSC #define's required for the drivers using PSC on DBAu1550
board and all Au1200-based boards as well. Make OSS drivers use the correct PSC definitions fo each board.

WBR, Sergei

include/asm-mips/mach-au1x00/au1xxx_psc.h +4 -1

index 8e5fb3c..8d1f3d1 100644
@@ -36,11 +36,14 @@
 #include <linux/config.h>
 
 /* The PSC base addresses.  */
-#ifdef CONFIG_SOC_AU1550
+#if defined(CONFIG_SOC_AU1550)
 #define PSC0_BASE_ADDR		0xb1a00000
 #define PSC1_BASE_ADDR		0xb1b00000
 #define PSC2_BASE_ADDR		0xb0a00000
 #define PSC3_BASE_ADDR		0xb0d00000
+#elif defined(CONFIG_SOC_AU1200)
+#define PSC0_BASE_ADDR		0xb1a00000
+#define PSC1_BASE_ADDR		0xb1b00000
 #endif
 
 /* The PSC select and control registers are common to

include/asm-mips/mach-db1x00/db1x00.h +12 -0

index 7b28b23..4bbfcaf 100644
@@ -31,8 +31,20 @@
 #include <linux/config.h>
 
 #ifdef CONFIG_MIPS_DB1550
+
+#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+#define DBDMA_I2S_TX_CHAN  DSCR_CMD0_PSC3_TX
+#define DBDMA_I2S_RX_CHAN  DSCR_CMD0_PSC3_RX
+
+#define SPI_PSC_BASE       PSC0_BASE_ADDR
+#define AC97_PSC_BASE      PSC1_BASE_ADDR
+#define SMBUS_PSC_BASE     PSC2_BASE_ADDR
+#define I2S_PSC_BASE       PSC3_BASE_ADDR
+
 #define BCSR_KSEG1_ADDR 0xAF000000
 #define NAND_PHYS_ADDR  0x20000000
+
 #else
 #define BCSR_KSEG1_ADDR 0xAE000000
 #endif

sound/oss/au1550_ac97.c +1 -2

index 64e2e46..fd40962 100644
@@ -55,10 +55,9 @@
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

sound/oss/au1550_i2s.c +1 -2

index 529b625..8addad2 100644
@@ -63,10 +63,9 @@
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
 
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

Jordan Crouse

Acked-by on v1 1/1

2006-03-13 18:25 UTC #1 lore raw

Looks good to me as a quick glance. I'll trust that Sergei got the addresses right, so..

Acked-by Jordan Crouse <[email protected]>

Quoted 90 lines · Sergei Shtylylov

Hello.

Add missing PSC #define's required for the drivers using PSC on DBAu1550
board and all Au1200-based boards as well. Make OSS drivers use the correct PSC definitions fo each board.

WBR, Sergei

include/asm-mips/mach-au1x00/au1xxx_psc.h +4 -1

index 8e5fb3c..8d1f3d1 100644
@@ -36,11 +36,14 @@
 #include <linux/config.h>
 
 /* The PSC base addresses.  */
-#ifdef CONFIG_SOC_AU1550
+#if defined(CONFIG_SOC_AU1550)
 #define PSC0_BASE_ADDR		0xb1a00000
 #define PSC1_BASE_ADDR		0xb1b00000
 #define PSC2_BASE_ADDR		0xb0a00000
 #define PSC3_BASE_ADDR		0xb0d00000
+#elif defined(CONFIG_SOC_AU1200)
+#define PSC0_BASE_ADDR		0xb1a00000
+#define PSC1_BASE_ADDR		0xb1b00000
 #endif
 
 /* The PSC select and control registers are common to

include/asm-mips/mach-db1x00/db1x00.h +12 -0

index 7b28b23..4bbfcaf 100644
@@ -31,8 +31,20 @@
 #include <linux/config.h>
 
 #ifdef CONFIG_MIPS_DB1550
+
+#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+#define DBDMA_I2S_TX_CHAN  DSCR_CMD0_PSC3_TX
+#define DBDMA_I2S_RX_CHAN  DSCR_CMD0_PSC3_RX
+
+#define SPI_PSC_BASE       PSC0_BASE_ADDR
+#define AC97_PSC_BASE      PSC1_BASE_ADDR
+#define SMBUS_PSC_BASE     PSC2_BASE_ADDR
+#define I2S_PSC_BASE       PSC3_BASE_ADDR
+
 #define BCSR_KSEG1_ADDR 0xAF000000
 #define NAND_PHYS_ADDR  0x20000000
+
 #else
 #define BCSR_KSEG1_ADDR 0xAE000000
 #endif

sound/oss/au1550_ac97.c +1 -2

index 64e2e46..fd40962 100644
@@ -55,10 +55,9 @@
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

sound/oss/au1550_i2s.c +1 -2

index 529b625..8addad2 100644
@@ -63,10 +63,9 @@
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
 
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

Signature · 4 lines

Jordan Crouse
Senior Linux Engineer
AMD - Personal Connectivity Solutions Group
<www.amd.com/embeddedprocessors>

Sergei Shtylylov

author

2006-03-13 21:32 UTC #2 lore raw

Hello.

Quoted 2 lines · Jordan Crouse

Looks good to me as a quick glance. I'll trust that Sergei got the addresses right, so..

Well, they weren't right but that wasn't my fault. :-)
I guess nobody tried using I2S driver on Au1550 so far -- if they did, it
wouldn't work because the PSC3 address #define was initially wrong.

Quoted 8 lines

Acked-by Jordan Crouse <[email protected]>
Quoted 4 lines · Sergei Shtylylov
Hello.
Add missing PSC #define's required for the drivers using PSC on DBAu1550
board and all Au1200-based boards as well.

Now I've copied Au1200 part from 2.4 tree where this have been already fixed.

Quoted 1 line

Quoted 1 line
Make OSS drivers use the correct PSC definitions fo each board.

And fix PSC3 address for Au1550.

WBR, Sergei

include/asm-mips/mach-au1x00/au1xxx_psc.h +8 -1

index 8e5fb3c..faa5ffe 100644
@@ -40,7 +40,12 @@
 #define PSC0_BASE_ADDR		0xb1a00000
 #define PSC1_BASE_ADDR		0xb1b00000
 #define PSC2_BASE_ADDR		0xb0a00000
-#define PSC3_BASE_ADDR		0xb0d00000
+#define PSC3_BASE_ADDR		0xb0b00000
+#endif
+
+#ifdef CONFIG_SOC_AU1200
+#define PSC0_BASE_ADDR		0xb1a00000
+#define PSC1_BASE_ADDR		0xb1b00000
 #endif
 
 /* The PSC select and control registers are common to

@@ -228,6 +233,8 @@ typedef struct	psc_i2s {
 #define PSC_I2SCFG_DD_DISABLE	(1 << 27)
 #define PSC_I2SCFG_DE_ENABLE	(1 << 26)
 #define PSC_I2SCFG_SET_WS(x)	(((((x) / 2) - 1) & 0x7f) << 16)
+#define PSC_I2SCFG_WS(n)	((n & 0xFF) << 16)
+#define PSC_I2SCFG_WS_MASK	(PSC_I2SCFG_WS(0x3F))
 #define PSC_I2SCFG_WI		(1 << 15)
 
 #define PSC_I2SCFG_DIV_MASK	(3 << 13)

include/asm-mips/mach-db1x00/db1x00.h +12 -0

index 7b28b23..4bbfcaf 100644
@@ -31,8 +31,20 @@
 #include <linux/config.h>
 
 #ifdef CONFIG_MIPS_DB1550
+
+#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+#define DBDMA_I2S_TX_CHAN  DSCR_CMD0_PSC3_TX
+#define DBDMA_I2S_RX_CHAN  DSCR_CMD0_PSC3_RX
+
+#define SPI_PSC_BASE       PSC0_BASE_ADDR
+#define AC97_PSC_BASE      PSC1_BASE_ADDR
+#define SMBUS_PSC_BASE     PSC2_BASE_ADDR
+#define I2S_PSC_BASE       PSC3_BASE_ADDR
+
 #define BCSR_KSEG1_ADDR 0xAF000000
 #define NAND_PHYS_ADDR  0x20000000
+
 #else
 #define BCSR_KSEG1_ADDR 0xAE000000
 #endif

sound/oss/au1550_ac97.c +1 -2

index 64e2e46..fd40962 100644
@@ -55,10 +55,9 @@
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

sound/oss/au1550_i2s.c +1 -2

index 529b625..8addad2 100644
@@ -63,10 +63,9 @@
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
 
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

Sergei Shtylylov

author

2006-03-13 23:15 UTC #3 lore raw

In reply to Jordan Crouse

Hello.

Forgot the darn signoff line, reporting... :-(

Quoted 2 lines · Jordan Crouse

Looks good to me as a quick glance. I'll trust that Sergei got the addresses right, so..

Well, they weren't right but that wasn't my fault. :-)
I guess nobody tried using I2S driver on Au1550 so far -- if they did, it
wouldn't work because the PSC3 address #define was initially wrong.

Quoted 8 lines

Acked-by Jordan Crouse <[email protected]>
Quoted 4 lines · Sergei Shtylylov
Hello.
Add missing PSC #define's required for the drivers using PSC on DBAu1550
board and all Au1200-based boards as well.

Now I've copied Au1200 part from 2.4 tree where this have been already
fixed.

Quoted 1 line

Quoted 1 line
Make OSS drivers use the correct PSC definitions fo each board.

And fix PSC3 address for Au1550.

WBR, Sergei

Signed-off-by Sergei Shtylyov <[email protected]>

include/asm-mips/mach-au1x00/au1xxx_psc.h +8 -1

index 8e5fb3c..faa5ffe 100644
@@ -40,7 +40,12 @@
 #define PSC0_BASE_ADDR		0xb1a00000
 #define PSC1_BASE_ADDR		0xb1b00000
 #define PSC2_BASE_ADDR		0xb0a00000
-#define PSC3_BASE_ADDR		0xb0d00000
+#define PSC3_BASE_ADDR		0xb0b00000
+#endif
+
+#ifdef CONFIG_SOC_AU1200
+#define PSC0_BASE_ADDR		0xb1a00000
+#define PSC1_BASE_ADDR		0xb1b00000
 #endif
 
 /* The PSC select and control registers are common to

@@ -228,6 +233,8 @@ typedef struct	psc_i2s {
 #define PSC_I2SCFG_DD_DISABLE	(1 << 27)
 #define PSC_I2SCFG_DE_ENABLE	(1 << 26)
 #define PSC_I2SCFG_SET_WS(x)	(((((x) / 2) - 1) & 0x7f) << 16)
+#define PSC_I2SCFG_WS(n)	((n & 0xFF) << 16)
+#define PSC_I2SCFG_WS_MASK	(PSC_I2SCFG_WS(0x3F))
 #define PSC_I2SCFG_WI		(1 << 15)
 
 #define PSC_I2SCFG_DIV_MASK	(3 << 13)

include/asm-mips/mach-db1x00/db1x00.h +12 -0

index 7b28b23..4bbfcaf 100644
@@ -31,8 +31,20 @@
 #include <linux/config.h>
 
 #ifdef CONFIG_MIPS_DB1550
+
+#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+#define DBDMA_I2S_TX_CHAN  DSCR_CMD0_PSC3_TX
+#define DBDMA_I2S_RX_CHAN  DSCR_CMD0_PSC3_RX
+
+#define SPI_PSC_BASE       PSC0_BASE_ADDR
+#define AC97_PSC_BASE      PSC1_BASE_ADDR
+#define SMBUS_PSC_BASE     PSC2_BASE_ADDR
+#define I2S_PSC_BASE       PSC3_BASE_ADDR
+
 #define BCSR_KSEG1_ADDR 0xAF000000
 #define NAND_PHYS_ADDR  0x20000000
+
 #else
 #define BCSR_KSEG1_ADDR 0xAE000000
 #endif

sound/oss/au1550_ac97.c +1 -2

index 64e2e46..fd40962 100644
@@ -55,10 +55,9 @@
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

sound/oss/au1550_i2s.c +1 -2

index 529b625..8addad2 100644
@@ -63,10 +63,9 @@
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
 
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

Sergei Shtylylov

author

2006-03-24 20:36 UTC #4 lore raw

In reply to Jordan Crouse

Hello.

Add missing PSC #define's required for the drivers using PSC on DBAu1550
board (fixing PSC3 address for Au1550) and all Au1200-based boards as well. Make OSS drivers use the correct PSC definitions fo each board.

WBR, Sergei

PS: Looks like this one is stuck too. Reposting with clear description.

Signed-off-by Sergei Shtylyov <[email protected]>

include/asm-mips/mach-au1x00/au1xxx_psc.h +8 -1

index 8e5fb3c..faa5ffe 100644
@@ -40,7 +40,12 @@
 #define PSC0_BASE_ADDR		0xb1a00000
 #define PSC1_BASE_ADDR		0xb1b00000
 #define PSC2_BASE_ADDR		0xb0a00000
-#define PSC3_BASE_ADDR		0xb0d00000
+#define PSC3_BASE_ADDR		0xb0b00000
+#endif
+
+#ifdef CONFIG_SOC_AU1200
+#define PSC0_BASE_ADDR		0xb1a00000
+#define PSC1_BASE_ADDR		0xb1b00000
 #endif
 
 /* The PSC select and control registers are common to

@@ -228,6 +233,8 @@ typedef struct	psc_i2s {
 #define PSC_I2SCFG_DD_DISABLE	(1 << 27)
 #define PSC_I2SCFG_DE_ENABLE	(1 << 26)
 #define PSC_I2SCFG_SET_WS(x)	(((((x) / 2) - 1) & 0x7f) << 16)
+#define PSC_I2SCFG_WS(n)	((n & 0xFF) << 16)
+#define PSC_I2SCFG_WS_MASK	(PSC_I2SCFG_WS(0x3F))
 #define PSC_I2SCFG_WI		(1 << 15)
 
 #define PSC_I2SCFG_DIV_MASK	(3 << 13)

include/asm-mips/mach-db1x00/db1x00.h +12 -0

index 7b28b23..4bbfcaf 100644
@@ -31,8 +31,20 @@
 #include <linux/config.h>
 
 #ifdef CONFIG_MIPS_DB1550
+
+#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+#define DBDMA_I2S_TX_CHAN  DSCR_CMD0_PSC3_TX
+#define DBDMA_I2S_RX_CHAN  DSCR_CMD0_PSC3_RX
+
+#define SPI_PSC_BASE       PSC0_BASE_ADDR
+#define AC97_PSC_BASE      PSC1_BASE_ADDR
+#define SMBUS_PSC_BASE     PSC2_BASE_ADDR
+#define I2S_PSC_BASE       PSC3_BASE_ADDR
+
 #define BCSR_KSEG1_ADDR 0xAF000000
 #define NAND_PHYS_ADDR  0x20000000
+
 #else
 #define BCSR_KSEG1_ADDR 0xAE000000
 #endif

sound/oss/au1550_ac97.c +1 -2

index 64e2e46..fd40962 100644
@@ -55,10 +55,9 @@
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS

sound/oss/au1550_i2s.c +1 -2

index 529b625..8addad2 100644
@@ -63,10 +63,9 @@
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
 
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS