patches for fsample/850
Subsystems (8)
Attached is a set of patches to start support for the omap850 and specifically the f-sample development board from TI.
Features:
- machine ID 970 as registered with the arm machine registery:
http://www.arm.linux.org.uk/developer/machines/?action=list&id=970
- initial support for the FPGA on fsample
- adjustment to the 'p2' lcd driver so that it correctly initializes the display on fsample (which involves using the FPGA interface)
- some adjustment to clock.h/clock.c to avoid disabling the baseband side of the world on 730/850 as a sideeffect of other clock changes
arch/arm/mach-omap1/Kconfig +7 -0
@@ -63,6 +63,13 @@ Support for TI OMAP 730 Perseus2 board. Say Y here if you have such a board. +config MACH_OMAP_FSAMPLE + bool "TI F-Sample" + depends on ARCH_OMAP1 && ARCH_OMAP730 + help + Support for TI OMAP 850 F-Sample board. Say Y here if you have such + a board. + config MACH_VOICEBLUE bool "Voiceblue" depends on ARCH_OMAP1 && ARCH_OMAP15XX
arch/arm/mach-omap1/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o +obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
arch/arm/mach-omap1/clock.c +1 -1
@@ -761,7 +761,7 @@ ck_dpll1.rate /1000000 , (ck_dpll1.rate /100000 ) %10 , arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); -#ifdef CONFIG_MACH_OMAP_PERSEUS2 +#if defined(CONFIG_MACH_OMAP_PERSEUS2 ) || defined(CONFIG_MACH_OMAP_FSAMPLE )/* Select slicer output as OMAP input clock */ omap_writew (omap_readw (OMAP730_PCC_UPLD_CTRL ) & ~0x1 ,OMAP730_PCC_UPLD_CTRL );#endif
arch/arm/mach-omap1/clock.h +20 -14
@@ -101,44 +101,50 @@/*------------------------------------------------------------------------- * Omap1 MPU rate table *-------------------------------------------------------------------------*/ +#if defined(CONFIG_ARCH_OMAP730 ) +#define CKCTL_RESERVED_1_MASK (0x2000) +#else +#define CKCTL_RESERVED_1_MASK (0x0000) +#endif + static struct mpu_rate rate_table[] = {/* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL * NOTE: Comment order here is different from bits in CKCTL value: * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv */ #if defined(CONFIG_OMAP_ARM_216MHZ) - { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */ + { 216000000, 12000000, 216000000, CKCTL_RESERVED_1_MASK | 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */ #endif #if defined(CONFIG_OMAP_ARM_195MHZ) - { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */ + { 195000000, 13000000, 195000000, CKCTL_RESERVED_1_MASK | 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */ #endif #if defined(CONFIG_OMAP_ARM_192MHZ) - { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ - { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ - { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ - { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */ - { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ + { 192000000, 19200000, 192000000, CKCTL_RESERVED_1_MASK | 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ + { 192000000, 12000000, 192000000, CKCTL_RESERVED_1_MASK | 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ + { 96000000, 12000000, 192000000, CKCTL_RESERVED_1_MASK | 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ + { 48000000, 12000000, 192000000, CKCTL_RESERVED_1_MASK | 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */ + { 24000000, 12000000, 192000000, CKCTL_RESERVED_1_MASK | 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ #endif #if defined(CONFIG_OMAP_ARM_182MHZ) - { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */ + { 182000000, 13000000, 182000000, CKCTL_RESERVED_1_MASK | 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */ #endif #if defined(CONFIG_OMAP_ARM_168MHZ) - { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ + { 168000000, 12000000, 168000000, CKCTL_RESERVED_1_MASK | 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ #endif #if defined(CONFIG_OMAP_ARM_150MHZ) - { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ + { 150000000, 12000000, 150000000, CKCTL_RESERVED_1_MASK | 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ #endif #if defined(CONFIG_OMAP_ARM_120MHZ) - { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ + { 120000000, 12000000, 120000000, CKCTL_RESERVED_1_MASK | 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ #endif #if defined(CONFIG_OMAP_ARM_96MHZ) - { 96000000, 12000000, 96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */ + { 96000000, 12000000, 96000000, CKCTL_RESERVED_1_MASK | 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */ #endif #if defined(CONFIG_OMAP_ARM_60MHZ) - { 60000000, 12000000, 60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */ + { 60000000, 12000000, 60000000, CKCTL_RESERVED_1_MASK | 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */ #endif #if defined(CONFIG_OMAP_ARM_30MHZ) - { 30000000, 12000000, 60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */ + { 30000000, 12000000, 60000000, CKCTL_RESERVED_1_MASK | 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */ #endif { 0, 0, 0, 0, 0 }, };
arch/arm/mach-omap1/pm.c +2 -0
@@ -326,8 +326,10 @@/* stop DSP */ omap_writew (omap_readw (ARM_RSTCT1 ) & ~(1 <<DSP_EN ),ARM_RSTCT1 ); +#if !defined(CONFIG_ARCH_OMAP730 )/* shut down dsp_ck */ omap_writew (omap_readw (ARM_CKCTL ) & ~(1 <<EN_DSPCK ),ARM_CKCTL ); +#endif /* temporarily enabling api_ck to access DSP registers */ omap_writew (omap_readw (ARM_IDLECT2 ) |1 <<EN_APICK ,ARM_IDLECT2 );
arch/arm/mach-omap1/time.c +1 -1
@@ -94,7 +94,7 @@* will break. On P2, the timer count rate is 6.5 MHz after programming PTV * with 0. This divides the 13MHz input by 2, and is undocumented. */ -#ifdef CONFIG_MACH_OMAP_PERSEUS2 +#if defined(CONFIG_MACH_OMAP_PERSEUS2 ) || defined(CONFIG_MACH_OMAP_FSAMPLE )/* REVISIT: This ifdef construct should be replaced by a query to clock * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz. */
arch/arm/plat-omap/devices.c +1 -1
@@ -105,7 +105,7 @@omap_cfg_reg (E20_1610_KBR3 );omap_cfg_reg (E19_1610_KBR4 );omap_cfg_reg (N19_1610_KBR5 ); - }else if (machine_is_omap_perseus2 ()) { + }else if (machine_is_omap_perseus2 () ||machine_is_omap_fsample ()) {omap_cfg_reg (E2_730_KBR0 );omap_cfg_reg (J7_730_KBR1 );omap_cfg_reg (E1_730_KBR2 );
arch/arm/tools/mach-types +2 -0
@@ -969,3 +969,5 @@ fujitsu_wimaxsoc MACH_FUJITSU_WIMAXSOC FUJITSU_WIMAXSOC 956 dualpcmodem MACH_DUALPCMODEM DUALPCMODEM 957 gesbc9312 MACH_GESBC9312 GESBC9312 958 +omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970 +
drivers/input/keyboard/omap-keypad.c +1 -1
@@ -376,7 +376,7 @@input_register_device (omap_kp->input);if (machine_is_omap_h2 () ||machine_is_omap_h3 () || -machine_is_omap_perseus2 ()) { +machine_is_omap_perseus2 () ||machine_is_omap_fsample ()) {omap_writew (0xff ,OMAP_MPUIO_BASE +OMAP_MPUIO_GPIO_DEBOUNCING ); }/* scan current status and enable interrupt */
drivers/spi/omap_uwire.c +1 -1
@@ -495,7 +495,7 @@omap_cfg_reg (N14_1610_UWIRE_CS0 );omap_cfg_reg (N15_1610_UWIRE_CS1 ); } -if (machine_is_omap_perseus2 ()) { +if (machine_is_omap_perseus2 () ||machine_is_omap_fsample ()) {/* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ int val =omap_readl (OMAP730_IO_CONF_9 ) & ~0x00EEE000 ;omap_writel (val |0x00AAA000 ,OMAP730_IO_CONF_9 );
drivers/ssi/omap-uwire.c +1 -1
@@ -212,7 +212,7 @@omap_cfg_reg (N14_1610_UWIRE_CS0 );omap_cfg_reg (P15_1610_UWIRE_CS3 ); } -if (machine_is_omap_perseus2 ()) { +if (machine_is_omap_perseus2 () ||machine_is_omap_fsample ()) {/* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ int val =omap_readl (OMAP730_IO_CONF_9 ) & ~0x00EEE000 ;omap_writel (val |0x00AAA000 ,OMAP730_IO_CONF_9 );
drivers/video/omap/Makefile +1 -0
@@ -22,6 +22,7 @@ objs-$(CONFIG_ARCH_OMAP15XX)$(CONFIG_MACH_OMAP_INNOVATOR) += lcd_inn1510.o objs-y$(CONFIG_MACH_OMAP_OSK) += lcd_osk.o objs-y$(CONFIG_MACH_OMAP_PERSEUS2) += lcd_p2.o +objs-y$(CONFIG_MACH_OMAP_FSAMPLE) += lcd_p2.o objs-y$(CONFIG_MACH_OMAP_APOLLON) += lcd_apollon.o objs-y$(CONFIG_FB_OMAP_LCD_LPH8923) += lcd_lph8923.o
drivers/video/omap/lcd_p2.c +14 -4
@@ -31,6 +31,8 @@#include <asm/arch/gpio.h> #include <asm/arch/omapfb.h> +#include <asm/arch/hardware.h> +/* * File: epson-md-tft.h *
@@ -173,11 +175,17 @@DBGENTER (1 );/* thwack the reset line */ +#ifdef CONFIG_MACH_OMAP_FSAMPLE +fsample_cpld_clear (FSAMPLE_CPLD_BIT_LCD_RESET ); +mdelay (5 ); +fsample_cpld_set (FSAMPLE_CPLD_BIT_LCD_RESET ); +#else omap_set_gpio_direction (19 ,0 );omap_set_gpio_dataout (19 ,0 );mdelay (2 );omap_set_gpio_dataout (19 ,1 ); - +#endif +/* bits 31:28 -> 0 LCD_PXL_15 .. 12 */ value =omap_readl (OMAP730_IO_CONF_3 ) &0x0FFFFFFF ;omap_writel (value,OMAP730_IO_CONF_3 );
@@ -189,8 +197,6 @@omap_writel (value,OMAP730_IO_CONF_4 );omap_uwire_configure_mode (0 ,16 ); - -omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISOFF ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_SLPIN ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISNOR ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_GSSET ,9 ,0 ,NULL ,1 );
@@ -265,9 +271,13 @@omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISON ,9 ,0 ,NULL ,1 );/* enable backlight */ +#ifdef CONFIG_MACH_OMAP_FSAMPLE +fsample_cpld_set (FSAMPLE_CPLD_BIT_BACKLIGHT ); +#else omap_set_gpio_direction (134 ,0 );omap_set_gpio_dataout (134 ,1 ); - +#endif +DBGLEAVE (1 );return 0 ; }
include/asm-arm/arch-omap/board-fsample.h +51 -0
51 lines not on this page · raw message
include/asm-arm/arch-omap/hardware.h +4 -0
@@ -298,6 +298,10 @@#include "board-perseus2.h" #endif +#ifdef CONFIG_MACH_OMAP_FSAMPLE +#include "board-fsample.h" +#endif +#ifdef CONFIG_MACH_OMAP_H3 #include "board-h3.h" #endif
Quoted 6 lines · --- Brian Swetland
Attached is a set of patches to start support for the omap850 and specifically the f-sample development board from TI.
Features:
Quoted 7 lines
- machine ID 970 as registered with the arm machine registery:
http://www.arm.linux.org.uk/developer/machines/?action=list&id=970
- initial support for the FPGA on fsample
- adjustment to the 'p2' lcd driver so that it correctly initializes the display on fsample (which involves using the FPGA interface)
- some adjustment toclock.h/clock.cto avoid disabling the baseband side of the world on 730/850 as a sideeffect of other clock changes
Are you using u-boot as bootloader and where you will make it available?
Better place to put it is linux.omap.com.
Quoted 1 line
+obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o
Your patch is not having board-fsample.c.
---Komal Shah
http://komalshah.blogspot.com/
__________________________________________________
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[Komal Shah <[email protected]>]
Quoted 15 lines
Quoted 6 lines · --- Brian Swetland
Attached is a set of patches to start support for the omap850 and specifically the f-sample development board from TI.
Features:
Quoted 7 lines
- machine ID 970 as registered with the arm machine registery:
http://www.arm.linux.org.uk/developer/machines/?action=list&id=970
- initial support for the FPGA on fsample
- adjustment to the 'p2' lcd driver so that it correctly initializes the display on fsample (which involves using the FPGA interface)
- some adjustment toclock.h/clock.cto avoid disabling the baseband side of the world on 730/850 as a sideeffect of other clock changes
Quoted 3 lines
Are you using u-boot as bootloader and where you will make it available?
Better place to put it is linux.omap.com.
I'm using a bootloader I wrote that takes advantage of the download over USB facility of the on-die ROM. I'm waiting for some confirmation from TI before making the boot code available. We have an agreement allowing us to use their documentation under NDA to write open source drivers but there are exclusions regarding some security features of OMAP, etc, that I need to be sure we are in compliance with.
It shouldn't be too hard to modify u-boot to work with fsample, but it is not something I've done.
Quoted 3 lines
Quoted 1 line
+obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o
Your patch is not having
board-fsample.c.
Oops -- I missed that one. Attached is an updated patch that includes board-fsample.c as well.
Brian
arch/arm/mach-omap1/Kconfig +7 -0
@@ -63,6 +63,13 @@ Support for TI OMAP 730 Perseus2 board. Say Y here if you have such a board. +config MACH_OMAP_FSAMPLE + bool "TI F-Sample" + depends on ARCH_OMAP1 && ARCH_OMAP730 + help + Support for TI OMAP 850 F-Sample board. Say Y here if you have such + a board. + config MACH_VOICEBLUE bool "Voiceblue" depends on ARCH_OMAP1 && ARCH_OMAP15XX
arch/arm/mach-omap1/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o +obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
arch/arm/mach-omap1/board-fsample.c +319 -0
319 lines not on this page · raw message
arch/arm/mach-omap1/clock.c +1 -1
@@ -761,7 +761,7 @@ ck_dpll1.rate /1000000 , (ck_dpll1.rate /100000 ) %10 , arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); -#ifdef CONFIG_MACH_OMAP_PERSEUS2 +#if defined(CONFIG_MACH_OMAP_PERSEUS2 ) || defined(CONFIG_MACH_OMAP_FSAMPLE )/* Select slicer output as OMAP input clock */ omap_writew (omap_readw (OMAP730_PCC_UPLD_CTRL ) & ~0x1 ,OMAP730_PCC_UPLD_CTRL );#endif
arch/arm/mach-omap1/clock.h +20 -14
@@ -101,44 +101,50 @@/*------------------------------------------------------------------------- * Omap1 MPU rate table *-------------------------------------------------------------------------*/ +#if defined(CONFIG_ARCH_OMAP730 ) +#define CKCTL_RESERVED_1_MASK (0x2000) +#else +#define CKCTL_RESERVED_1_MASK (0x0000) +#endif + static struct mpu_rate rate_table[] = {/* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL * NOTE: Comment order here is different from bits in CKCTL value: * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv */ #if defined(CONFIG_OMAP_ARM_216MHZ) - { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */ + { 216000000, 12000000, 216000000, CKCTL_RESERVED_1_MASK | 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */ #endif #if defined(CONFIG_OMAP_ARM_195MHZ) - { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */ + { 195000000, 13000000, 195000000, CKCTL_RESERVED_1_MASK | 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */ #endif #if defined(CONFIG_OMAP_ARM_192MHZ) - { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ - { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ - { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ - { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */ - { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ + { 192000000, 19200000, 192000000, CKCTL_RESERVED_1_MASK | 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ + { 192000000, 12000000, 192000000, CKCTL_RESERVED_1_MASK | 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ + { 96000000, 12000000, 192000000, CKCTL_RESERVED_1_MASK | 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ + { 48000000, 12000000, 192000000, CKCTL_RESERVED_1_MASK | 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */ + { 24000000, 12000000, 192000000, CKCTL_RESERVED_1_MASK | 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ #endif #if defined(CONFIG_OMAP_ARM_182MHZ) - { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */ + { 182000000, 13000000, 182000000, CKCTL_RESERVED_1_MASK | 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */ #endif #if defined(CONFIG_OMAP_ARM_168MHZ) - { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ + { 168000000, 12000000, 168000000, CKCTL_RESERVED_1_MASK | 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ #endif #if defined(CONFIG_OMAP_ARM_150MHZ) - { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ + { 150000000, 12000000, 150000000, CKCTL_RESERVED_1_MASK | 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ #endif #if defined(CONFIG_OMAP_ARM_120MHZ) - { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ + { 120000000, 12000000, 120000000, CKCTL_RESERVED_1_MASK | 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ #endif #if defined(CONFIG_OMAP_ARM_96MHZ) - { 96000000, 12000000, 96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */ + { 96000000, 12000000, 96000000, CKCTL_RESERVED_1_MASK | 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */ #endif #if defined(CONFIG_OMAP_ARM_60MHZ) - { 60000000, 12000000, 60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */ + { 60000000, 12000000, 60000000, CKCTL_RESERVED_1_MASK | 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */ #endif #if defined(CONFIG_OMAP_ARM_30MHZ) - { 30000000, 12000000, 60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */ + { 30000000, 12000000, 60000000, CKCTL_RESERVED_1_MASK | 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */ #endif { 0, 0, 0, 0, 0 }, };
arch/arm/mach-omap1/pm.c +2 -0
@@ -326,8 +326,10 @@/* stop DSP */ omap_writew (omap_readw (ARM_RSTCT1 ) & ~(1 <<DSP_EN ),ARM_RSTCT1 ); +#if !defined(CONFIG_ARCH_OMAP730 )/* shut down dsp_ck */ omap_writew (omap_readw (ARM_CKCTL ) & ~(1 <<EN_DSPCK ),ARM_CKCTL ); +#endif /* temporarily enabling api_ck to access DSP registers */ omap_writew (omap_readw (ARM_IDLECT2 ) |1 <<EN_APICK ,ARM_IDLECT2 );
arch/arm/mach-omap1/time.c +1 -1
@@ -94,7 +94,7 @@* will break. On P2, the timer count rate is 6.5 MHz after programming PTV * with 0. This divides the 13MHz input by 2, and is undocumented. */ -#ifdef CONFIG_MACH_OMAP_PERSEUS2 +#if defined(CONFIG_MACH_OMAP_PERSEUS2 ) || defined(CONFIG_MACH_OMAP_FSAMPLE )/* REVISIT: This ifdef construct should be replaced by a query to clock * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz. */
arch/arm/plat-omap/devices.c +1 -1
@@ -105,7 +105,7 @@omap_cfg_reg (E20_1610_KBR3 );omap_cfg_reg (E19_1610_KBR4 );omap_cfg_reg (N19_1610_KBR5 ); - }else if (machine_is_omap_perseus2 ()) { + }else if (machine_is_omap_perseus2 () ||machine_is_omap_fsample ()) {omap_cfg_reg (E2_730_KBR0 );omap_cfg_reg (J7_730_KBR1 );omap_cfg_reg (E1_730_KBR2 );
arch/arm/tools/mach-types +2 -0
@@ -969,3 +969,5 @@ fujitsu_wimaxsoc MACH_FUJITSU_WIMAXSOC FUJITSU_WIMAXSOC 956 dualpcmodem MACH_DUALPCMODEM DUALPCMODEM 957 gesbc9312 MACH_GESBC9312 GESBC9312 958 +omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970 +
drivers/input/keyboard/omap-keypad.c +1 -1
@@ -376,7 +376,7 @@input_register_device (omap_kp->input);if (machine_is_omap_h2 () ||machine_is_omap_h3 () || -machine_is_omap_perseus2 ()) { +machine_is_omap_perseus2 () ||machine_is_omap_fsample ()) {omap_writew (0xff ,OMAP_MPUIO_BASE +OMAP_MPUIO_GPIO_DEBOUNCING ); }/* scan current status and enable interrupt */
drivers/spi/omap_uwire.c +1 -1
@@ -495,7 +495,7 @@omap_cfg_reg (N14_1610_UWIRE_CS0 );omap_cfg_reg (N15_1610_UWIRE_CS1 ); } -if (machine_is_omap_perseus2 ()) { +if (machine_is_omap_perseus2 () ||machine_is_omap_fsample ()) {/* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ int val =omap_readl (OMAP730_IO_CONF_9 ) & ~0x00EEE000 ;omap_writel (val |0x00AAA000 ,OMAP730_IO_CONF_9 );
drivers/ssi/omap-uwire.c +1 -1
@@ -212,7 +212,7 @@omap_cfg_reg (N14_1610_UWIRE_CS0 );omap_cfg_reg (P15_1610_UWIRE_CS3 ); } -if (machine_is_omap_perseus2 ()) { +if (machine_is_omap_perseus2 () ||machine_is_omap_fsample ()) {/* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ int val =omap_readl (OMAP730_IO_CONF_9 ) & ~0x00EEE000 ;omap_writel (val |0x00AAA000 ,OMAP730_IO_CONF_9 );
drivers/video/omap/Makefile +1 -0
@@ -22,6 +22,7 @@ objs-$(CONFIG_ARCH_OMAP15XX)$(CONFIG_MACH_OMAP_INNOVATOR) += lcd_inn1510.o objs-y$(CONFIG_MACH_OMAP_OSK) += lcd_osk.o objs-y$(CONFIG_MACH_OMAP_PERSEUS2) += lcd_p2.o +objs-y$(CONFIG_MACH_OMAP_FSAMPLE) += lcd_p2.o objs-y$(CONFIG_MACH_OMAP_APOLLON) += lcd_apollon.o objs-y$(CONFIG_FB_OMAP_LCD_LPH8923) += lcd_lph8923.o
drivers/video/omap/lcd_p2.c +14 -4
@@ -31,6 +31,8 @@#include <asm/arch/gpio.h> #include <asm/arch/omapfb.h> +#include <asm/arch/hardware.h> +/* * File: epson-md-tft.h *
@@ -173,11 +175,17 @@DBGENTER (1 );/* thwack the reset line */ +#ifdef CONFIG_MACH_OMAP_FSAMPLE +fsample_cpld_clear (FSAMPLE_CPLD_BIT_LCD_RESET ); +mdelay (5 ); +fsample_cpld_set (FSAMPLE_CPLD_BIT_LCD_RESET ); +#else omap_set_gpio_direction (19 ,0 );omap_set_gpio_dataout (19 ,0 );mdelay (2 );omap_set_gpio_dataout (19 ,1 ); - +#endif +/* bits 31:28 -> 0 LCD_PXL_15 .. 12 */ value =omap_readl (OMAP730_IO_CONF_3 ) &0x0FFFFFFF ;omap_writel (value,OMAP730_IO_CONF_3 );
@@ -189,8 +197,6 @@omap_writel (value,OMAP730_IO_CONF_4 );omap_uwire_configure_mode (0 ,16 ); - -omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISOFF ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_SLPIN ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISNOR ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_GSSET ,9 ,0 ,NULL ,1 );
@@ -265,9 +271,13 @@omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISON ,9 ,0 ,NULL ,1 );/* enable backlight */ +#ifdef CONFIG_MACH_OMAP_FSAMPLE +fsample_cpld_set (FSAMPLE_CPLD_BIT_BACKLIGHT ); +#else omap_set_gpio_direction (134 ,0 );omap_set_gpio_dataout (134 ,1 ); - +#endif +DBGLEAVE (1 );return 0 ; }
include/asm-arm/arch-omap/board-fsample.h +51 -0
51 lines not on this page · raw message
include/asm-arm/arch-omap/hardware.h +4 -0
@@ -298,6 +298,10 @@#include "board-perseus2.h" #endif +#ifdef CONFIG_MACH_OMAP_FSAMPLE +#include "board-fsample.h" +#endif +#ifdef CONFIG_MACH_OMAP_H3 #include "board-h3.h" #endif
[email protected]
reviewerHi,
Few comments below.
arch/arm/mach-omap1/clock.h line 108
Quoted 11 lines · Brian Swetland
arch/arm/mach-omap1/clock.h +5
-0@@ -101,44 +101,50 @@/*------------------------------------------------------------------------- * Omap1 MPU rate table *-------------------------------------------------------------------------*/ +#if defined(CONFIG_ARCH_OMAP730 ) +#define CKCTL_RESERVED_1_MASK (0x2000) +#else +#define CKCTL_RESERVED_1_MASK (0x0000) +#endif
This addds yet another extra hurdle compiling 730 in with 15xx and 16xx. Although we cannot do it because of the interrupt handler, maybe we'll fix that someday. So let's try not to add more hurdles if we can avoid it.
How about doing the masking when the CKCTL value is written based on the cpu_is_omap730()?
arch/arm/mach-omap1/pm.c line 332
Quoted 10 lines
arch/arm/mach-omap1/pm.c +2
-0@@ -326,8 +326,10 @@/* stop DSP */ omap_writew (omap_readw (ARM_RSTCT1 ) & ~(1 <<DSP_EN ),ARM_RSTCT1 ); +#if !defined(CONFIG_ARCH_OMAP730 )/* shut down dsp_ck */ omap_writew (omap_readw (ARM_CKCTL ) & ~(1 <<EN_DSPCK ),ARM_CKCTL ); +#endif
This too would be better with if (!cpu_is_omap730()).
arch/arm/mach-omap1/pm.c line 202
Quoted 9 lines
arch/arm/mach-omap1/pm.c +0
-2@@ -189,8 +197,6 @@omap_writel (value,OMAP730_IO_CONF_4 );omap_uwire_configure_mode (0 ,16 ); - -omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISOFF ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_SLPIN ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISNOR ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_GSSET ,9 ,0 ,NULL ,1 );
Is the removal of one of the omap_uwire_data_transfer() calls intended?
Then does it compile and boot for p2 and fsample both selected?
Also, could you please do one patch for the core support, and then another patch for files that don't touch the omap core files?
That way we can send you patch directly upstream when we merge next time. Otherwise I have to redo the patch to strip out the drivers when we merge as not many omap drivers are yet merged with the mainline tree.
Core files being arch/arm/*omap* and include/asm-arm/arch-omap:
arch/arm/mach-omap1/Kconfigarch/arm/mach-omap1/Makefilearch/arm/mach-omap1/board-fsample.carch/arm/mach-omap1/clock.carch/arm/mach-omap1/clock.harch/arm/mach-omap1/pm.carch/arm/mach-omap1/time.carch/arm/plat-omap/devices.cinclude/asm-arm/arch-omap/board-fsample.hinclude/asm-arm/arch-omap/hardware.h
Regards,
Tony
Quoted 22 lines
Hi,
Few comments below.
arch/arm/mach-omap1/clock.h line 108
Quoted 11 lines · Brian Swetland
arch/arm/mach-omap1/clock.h +5
-0@@ -101,44 +101,50 @@/*------------------------------------------------------------------------- * Omap1 MPU rate table *-------------------------------------------------------------------------*/ +#if defined(CONFIG_ARCH_OMAP730 ) +#define CKCTL_RESERVED_1_MASK (0x2000) +#else +#define CKCTL_RESERVED_1_MASK (0x0000) +#endif This addds yet another extra hurdle compiling 730 in with 15xx and 16xx. Although we cannot do it because of the interrupt handler, maybe we'll fix that someday. So let's try not to add more hurdles if we can avoid it.
Quoted 2 lines
How about doing the masking when the CKCTL value is written based on the
cpu_is_omap730()?
We can do that. I'll change it.
Quoted 6 lines
Quoted 6 lines
arch/arm/mach-omap1/pm.c +0
-0@@ -326,8 +326,10 @@/* stop DSP */ omap_writew (omap_readw (ARM_RSTCT1 ) & ~(1 <<DSP_EN ),ARM_RSTCT1 );
Quoted 6 lines
arch/arm/mach-omap1/pm.c line 332
Quoted 4 lines
arch/arm/mach-omap1/pm.c +2
-0+#if !defined(CONFIG_ARCH_OMAP730 )/* shut down dsp_ck */ omap_writew (omap_readw (ARM_CKCTL ) & ~(1 <<EN_DSPCK ),ARM_CKCTL ); +#endif This too would be better with if (!cpu_is_omap730()).
Okay.
Quoted 11 lines
arch/arm/mach-omap1/pm.c line 202
Quoted 9 lines
arch/arm/mach-omap1/pm.c +0
-2@@ -189,8 +197,6 @@omap_writel (value,OMAP730_IO_CONF_4 );omap_uwire_configure_mode (0 ,16 ); - -omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISOFF ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_SLPIN ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_DISNOR ,9 ,0 ,NULL ,1 );omap_uwire_data_transfer (LCD_UWIRE_CS ,LCD_GSSET ,9 ,0 ,NULL ,1 );Is the removal of one of the
omap_uwire_data_transfer()calls intended?
Oops. That was unintentional.
Quoted 1 line
Then does it compile and boot for p2 and fsample both selected?
Probably not -- is there something like cpu_is_*() that I could use to make this conditional at runtime?
Quoted 6 lines
Also, could you please do one patch for the core support, and then another patch for files that don't touch the omap core files?
That way we can send you patch directly upstream when we merge next time. Otherwise I have to redo the patch to strip out the drivers when we merge as not many omap drivers are yet merged with the mainline tree.
Sure. I'll clean up the above and break it into two pieces.
Brian
[email protected]
reviewerQuoted 6 lines · Brian Swetland
Quoted 1 line
Then does it compile and boot for p2 and fsample both selected?
Probably not -- is there something like cpu_is_*() that I could use to make this conditional at runtime?
You can use machine_is_xxx() which also work during runtime based on the machine id.
Quoted 8 lines
Quoted 6 lines
Also, could you please do one patch for the core support, and then another patch for files that don't touch the omap core files?
That way we can send you patch directly upstream when we merge next time. Otherwise I have to redo the patch to strip out the drivers when we merge as not many omap drivers are yet merged with the mainline tree.
Sure. I'll clean up the above and break it into two pieces.
Great, thanks.
Tony
Quoted 10 lines · Brian Swetland
Quoted 6 lines
Quoted 1 line
Then does it compile and boot for p2 and fsample both selected?
Probably not -- is there something like cpu_is_*() that I could use to make this conditional at runtime?
You can use
machine_is_xxx()which also work during runtime based on the machine id.
Excellent.
How does one arrange the Makefile so that it will build lcd_p2.c if either FSAMPLE or PERSEUS2 are being built, but not build it twice?
Brian, not wise in the ways of Kconfig and linux builds