Updates for WRS SBC82xx boards
PATCH 3/5 Updates for WRS SBC82xx boards
patch3: sbc82xx-CONFIG.diff1
- add CONFIG_SBC82xx alongside CONFIG_PQ2FADS where required.
Signed-off-by Paul Gortmaker <[email protected]>
arch/ppc/syslib/m82xx_pci.c renamed from arch/ppc/syslib/m82xx_pci.c.orig +5 -2
@@ -238,7 +238,7 @@SIUMCR_APPC10 |SIUMCR_CS10PC00 |SIUMCR_BCTLC00 |SIUMCR_MMR11 ; -#elif definedCONFIG_PQ2FADS +#elif defined(CONFIG_PQ2FADS ) || defined(CONFIG_SBC82xx)/* * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), * and local bus for PCI (SIUMCR [LBPC]).
@@ -292,7 +292,7 @@#if definedCONFIG_ADS8272 /* PCI int highest prio */ immap->im_siu_conf.siu_82xx.sc_ppc_alrh =0x01236745 ; -#elif definedCONFIG_PQ2FADS +#elif defined(CONFIG_PQ2FADS ) || defined(CONFIG_SBC82xx) immap->im_siu_conf.siu_82xx.sc_ppc_alrh =0x03124567 ;#endif /* park bus on PCI */
@@ -380,7 +380,10 @@ IORESOURCE_IO | 1, "PCI I/O"); ppc_md.pci_exclude_device = pq2pci_exclude_device; + +#ifndef CONFIG_SBC82xx hose->last_busno =pciauto_bus_scan (hose, hose->first_busno); +#endif ppc_md.pci_map_irq = pq2pci_map_irq; ppc_md.pcibios_fixup =NULL ;