ppc32: board-specific part of fs_enet update
Subsystems (2)
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PATCH 3/3 ppc32: board-specific part of fs_enet update
Jeff,
This is the same as previous, but with a number of indentation issues addressed
in arch/ppc/platforms/mpc*. I think it makes sense to do it right now, since all the files are touched anyway. Haven't noticed before, sorry about that. Please find the patch inlined below.
This contains board-specific portion to respect driver changes (for 8272ads , 885ads and 866ads). Altered platform_data structures as well as initial setup routines relevant to fs_enet.
Signed-off-by Vitaly Bordug <[email protected]>
---
arch/ppc/platforms/85xx/mpc8560_ads.c | 89 ++++++++++++ arch/ppc/platforms/85xx/mpc85xx_ads_common.h | 19 +++ arch/ppc/platforms/mpc8272ads_setup.c | 154 ++++++++++++--------- arch/ppc/platforms/mpc866ads_setup.c | 192 +++++++++++++------------- arch/ppc/platforms/mpc885ads_setup.c | 175 +++++++++--------------- arch/ppc/platforms/pq2ads_pd.h | 82 ----------- arch/ppc/syslib/mpc85xx_devices.c | 89 ++++++++++++ arch/ppc/syslib/mpc8xx_devices.c | 8 + arch/ppc/syslib/mpc8xx_sys.c | 6 + arch/ppc/syslib/pq2_devices.c | 5 + arch/ppc/syslib/pq2_sys.c | 3 include/asm-ppc/cpm2.h | 95 +++++++++++++ include/asm-ppc/mpc8260.h | 1 include/asm-ppc/mpc8xx.h | 1 include/linux/fs_enet_pd.h | 50 +++---- 15 files changed, 578 insertions(+), 391 deletions(-)
arch/ppc/platforms/85xx/mpc8560_ads.c +89 -0
@@ -29,6 +29,7 @@ #include <linux/serial_core.h>#include <linux/initrd.h> #include <linux/module.h> #include <linux/fsl_devices.h> +#include <linux/fs_enet_pd.h> #include <asm/system.h> #include <asm/pgtable.h>
@@ -58,6 +59,71 @@ #include <syslib/ppc85xx_setup.h>* Setup the architecture * */ +static void init_fcc_ioports (void ) +{ +struct immap *immap; +struct io_port *io; +u32 tempval; + + immap = cpm2_immr; + + io = &immap->im_ioport; +/* FCC2/3 are on the ports B/C. */ + tempval =in_be32 (&io->iop_pdirb); + tempval &= ~PB2_DIRB0 ; + tempval |=PB2_DIRB1 ; +out_be32 (&io->iop_pdirb, tempval); + + tempval =in_be32 (&io->iop_psorb); + tempval &= ~PB2_PSORB0 ; + tempval |=PB2_PSORB1 ; +out_be32 (&io->iop_psorb, tempval); + + tempval =in_be32 (&io->iop_pparb); + tempval |= (PB2_DIRB0 |PB2_DIRB1 ); +out_be32 (&io->iop_pparb, tempval); + + tempval =in_be32 (&io->iop_pdirb); + tempval &= ~PB3_DIRB0 ; + tempval |=PB3_DIRB1 ; +out_be32 (&io->iop_pdirb, tempval); + + tempval =in_be32 (&io->iop_psorb); + tempval &= ~PB3_PSORB0 ; + tempval |=PB3_PSORB1 ; +out_be32 (&io->iop_psorb, tempval); + + tempval =in_be32 (&io->iop_pparb); + tempval |= (PB3_DIRB0 |PB3_DIRB1 ); +out_be32 (&io->iop_pparb, tempval); + + tempval =in_be32 (&io->iop_pdirc); + tempval |=PC3_DIRC1 ; +out_be32 (&io->iop_pdirc, tempval); + + tempval =in_be32 (&io->iop_pparc); + tempval |=PC3_DIRC1 ; +out_be32 (&io->iop_pparc, tempval); + +/* Port C has clocks...... */ + tempval =in_be32 (&io->iop_psorc); + tempval &= ~(CLK_TRX ); +out_be32 (&io->iop_psorc, tempval); + + tempval =in_be32 (&io->iop_pdirc); + tempval &= ~(CLK_TRX ); +out_be32 (&io->iop_pdirc, tempval); + tempval =in_be32 (&io->iop_pparc); + tempval |= (CLK_TRX ); +out_be32 (&io->iop_pparc, tempval); + +/* Configure Serial Interface clock routing. +* First, clear all FCC bits to zero, +* then set the ones we want. +*/ + immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK ); + immap->im_cpmux.cmx_fcr |=CPMUX_CLK_ROUTE ; +}static void __init mpc8560ads_setup_arch (void )
@@ -66,6 +132,7 @@ mpc8560ads_setup_arch(void)unsigned int freq;struct gianfar_platform_data *pdata;struct gianfar_mdio_data *mdata; +struct fs_platform_info *fpi;cpm2_reset ();
@@ -110,6 +177,28 @@ #endifmemcpy (pdata->mac_addr, binfo->bi_enet1addr,6 ); } +init_fcc_ioports (); +ppc_sys_device_remove (MPC85xx_CPM_FCC1); + + fpi = (struct fs_platform_info *)ppc_sys_get_pdata (MPC85xx_CPM_FCC2); +if (fpi) { +memcpy (fpi->macaddr, binfo->bi_enet2addr,6 ); + fpi->bus_id ="0:02" ; + fpi->phy_addr =2 ; + fpi->dpram_offset = (u32 )cpm2_immr->im_dprambase; + fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[1 ]; + } + + fpi = (struct fs_platform_info *)ppc_sys_get_pdata (MPC85xx_CPM_FCC3); +if (fpi) { +memcpy (fpi->macaddr, binfo->bi_enet2addr,6 ); + fpi->macaddr[5 ] +=1 ; + fpi->bus_id ="0:03" ; + fpi->phy_addr =3 ; + fpi->dpram_offset = (u32 )cpm2_immr->im_dprambase; + fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[2 ]; + } +#ifdef CONFIG_BLK_DEV_INITRD if (initrd_start)ROOT_DEV = Root_RAM0;
arch/ppc/platforms/85xx/mpc85xx_ads_common.h +19 -0
@@ -45,4 +45,23 @@ #define MPC85XX_PCI1_MEM_OFFSET 0x000000#define MPC85XX_PCI1_IO_SIZE 0x01000000 +/* FCC1 Clock Source Configuration. These can be +* redefined in the board specific file. +* Can only choose from CLK9-12 */ +#define F1_RXCLK 12 +#define F1_TXCLK 11 + +/* FCC2 Clock Source Configuration. These can be +* redefined in the board specific file. +* Can only choose from CLK13-16 */ +#define F2_RXCLK 13 +#define F2_TXCLK 14 + +/* FCC3 Clock Source Configuration. These can be +* redefined in the board specific file. +* Can only choose from CLK13-16 */ +#define F3_RXCLK 15 +#define F3_TXCLK 16 + +#endif /* __MACH_MPC85XX_ADS_H__ */
arch/ppc/platforms/mpc8272ads_setup.c +85 -69
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arch/ppc/platforms/mpc866ads_setup.c +96 -96
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arch/ppc/platforms/mpc885ads_setup.c +66 -109
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arch/ppc/platforms/pq2ads_pd.h +0 -82
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arch/ppc/syslib/mpc85xx_devices.c +86 -3
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arch/ppc/syslib/mpc8xx_devices.c +8 -0
@@ -218,6 +218,14 @@ struct platform_device ppc_sys_platform_ }, }, }, + + [MPC8xx_MDIO_FEC] = { + .name ="fsl-cpm-fec-mdio" , + .id =0 , + .num_resources =0 , + + }, + };static int __init mach_mpc8xx_fixup (struct platform_device *pdev)
arch/ppc/syslib/mpc8xx_sys.c +4 -2
@@ -22,7 +22,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { .ppc_sys_name = "MPC86X", .mask = 0xFFFFFFFF, .value = 0x00000000, - .num_devices = 7, + .num_devices = 8, .device_list = (enum ppc_sys_devices []) { MPC8xx_CPM_FEC1,
@@ -32,13 +32,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { MPC8xx_CPM_SCC4, MPC8xx_CPM_SMC1, MPC8xx_CPM_SMC2, + MPC8xx_MDIO_FEC, }, }, { .ppc_sys_name ="MPC885" , .mask = 0xFFFFFFFF, .value = 0x00000000, - .num_devices = 8, + .num_devices = 9, .device_list = (enum ppc_sys_devices[]) { MPC8xx_CPM_FEC1,
@@ -49,6 +50,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { MPC8xx_CPM_SCC4, MPC8xx_CPM_SMC1, MPC8xx_CPM_SMC2, + MPC8xx_MDIO_FEC, }, }, { /* default match */
arch/ppc/syslib/pq2_devices.c +5 -0
@@ -369,6 +369,11 @@ struct platform_device ppc_sys_platform_ }, }, }, + [MPC82xx_MDIO_BB] = { + .name ="fsl-bb-mdio" , + .id =0 , + .num_resources =0 , + }, };static int __init mach_mpc82xx_fixup (struct platform_device *pdev)
arch/ppc/syslib/pq2_sys.c +2 -1
@@ -139,13 +139,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { .ppc_sys_name = "8272", .mask = 0x0000ff00, .value = 0x00000c00, - .num_devices = 12, + .num_devices = 13, .device_list = (enum ppc_sys_devices []) { MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1, + MPC82xx_MDIO_BB, }, },/* below is a list of the 8280 family of processors */
include/asm-ppc/cpm2.h +95 -0
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include/asm-ppc/mpc8260.h +1 -0
@@ -82,6 +82,7 @@ enum ppc_sys_devices { MPC82xx_CPM_SMC2, MPC82xx_CPM_USB, MPC82xx_SEC1, + MPC82xx_MDIO_BB, NUM_PPC_SYS_DEVS, };
include/asm-ppc/mpc8xx.h +1 -0
@@ -110,6 +110,7 @@ enum ppc_sys_devices { MPC8xx_CPM_SMC1, MPC8xx_CPM_SMC2, MPC8xx_CPM_USB, + MPC8xx_MDIO_FEC, NUM_PPC_SYS_DEVS, };
include/linux/fs_enet_pd.h +21 -29
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