bcm43xx-d80211: New DMA engine code
Subsystems (3)
PATCH 1/1 bcm43xx-d80211: New DMA engine code
Hi John,
Please apply this to wireless-dev.
Larry, nothing interresting in here to backport. ;)
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This is a rewrite of the bcm43xx DMA engine. It adds support for >1G of memory (for chips that support the extension bits) and 64-bit DMA (for chips that support it).
Signed-off-by Michael Buesch <[email protected]>
drivers/net/wireless/d80211/bcm43xx/bcm43xx.h +42 -16
@@ -35,14 +35,18 @@#define BCM43xx_PCICFG_ICR 0x94/* MMIO offsets */ -#define BCM43xx_MMIO_DMA1_REASON 0x20 -#define BCM43xx_MMIO_DMA1_IRQ_MASK 0x24 -#define BCM43xx_MMIO_DMA2_REASON 0x28 -#define BCM43xx_MMIO_DMA2_IRQ_MASK 0x2C -#define BCM43xx_MMIO_DMA3_REASON 0x30 -#define BCM43xx_MMIO_DMA3_IRQ_MASK 0x34 -#define BCM43xx_MMIO_DMA4_REASON 0x38 -#define BCM43xx_MMIO_DMA4_IRQ_MASK 0x3C +#define BCM43xx_MMIO_DMA0_REASON 0x20 +#define BCM43xx_MMIO_DMA0_IRQ_MASK 0x24 +#define BCM43xx_MMIO_DMA1_REASON 0x28 +#define BCM43xx_MMIO_DMA1_IRQ_MASK 0x2C +#define BCM43xx_MMIO_DMA2_REASON 0x30 +#define BCM43xx_MMIO_DMA2_IRQ_MASK 0x34 +#define BCM43xx_MMIO_DMA3_REASON 0x38 +#define BCM43xx_MMIO_DMA3_IRQ_MASK 0x3C +#define BCM43xx_MMIO_DMA4_REASON 0x40 +#define BCM43xx_MMIO_DMA4_IRQ_MASK 0x44 +#define BCM43xx_MMIO_DMA5_REASON 0x48 +#define BCM43xx_MMIO_DMA5_IRQ_MASK 0x4C#define BCM43xx_MMIO_STATUS_BITFIELD 0x120#define BCM43xx_MMIO_STATUS2_BITFIELD 0x124#define BCM43xx_MMIO_GEN_IRQ_REASON 0x128
@@ -58,14 +62,27 @@#define BCM43xx_MMIO_XMITSTAT_1 0x174#define BCM43xx_MMIO_REV3PLUS_TSF_LOW 0x180/* core rev >= 3 only */ #define BCM43xx_MMIO_REV3PLUS_TSF_HIGH 0x184/* core rev >= 3 only */ -#define BCM43xx_MMIO_DMA1_BASE 0x200 -#define BCM43xx_MMIO_DMA2_BASE 0x220 -#define BCM43xx_MMIO_DMA3_BASE 0x240 -#define BCM43xx_MMIO_DMA4_BASE 0x260 + +/* 32-bit DMA */ +#define BCM43xx_MMIO_DMA32_BASE0 0x200 +#define BCM43xx_MMIO_DMA32_BASE1 0x220 +#define BCM43xx_MMIO_DMA32_BASE2 0x240 +#define BCM43xx_MMIO_DMA32_BASE3 0x260 +#define BCM43xx_MMIO_DMA32_BASE4 0x280 +#define BCM43xx_MMIO_DMA32_BASE5 0x2A0 +/* 64-bit DMA */ +#define BCM43xx_MMIO_DMA64_BASE0 0x200 +#define BCM43xx_MMIO_DMA64_BASE1 0x240 +#define BCM43xx_MMIO_DMA64_BASE2 0x280 +#define BCM43xx_MMIO_DMA64_BASE3 0x2C0 +#define BCM43xx_MMIO_DMA64_BASE4 0x300 +#define BCM43xx_MMIO_DMA64_BASE5 0x340 +/* PIO */ #define BCM43xx_MMIO_PIO1_BASE 0x300#define BCM43xx_MMIO_PIO2_BASE 0x310#define BCM43xx_MMIO_PIO3_BASE 0x320#define BCM43xx_MMIO_PIO4_BASE 0x330 +#define BCM43xx_MMIO_PHY_VER 0x3E0#define BCM43xx_MMIO_PHY_RADIO 0x3E2#define BCM43xx_MMIO_ANTENNA 0x3E8
@@ -234,8 +251,14 @@#define BCM43xx_SBTMSTATELOW_FORCE_GATE_CLOCK 0x20000/* sbtmstatehigh state flags */ -#define BCM43xx_SBTMSTATEHIGH_SERROR 0x1 -#define BCM43xx_SBTMSTATEHIGH_BUSY 0x4 +#define BCM43xx_SBTMSTATEHIGH_SERROR 0x00000001 +#define BCM43xx_SBTMSTATEHIGH_BUSY 0x00000004 +#define BCM43xx_SBTMSTATEHIGH_TIMEOUT 0x00000020 +#define BCM43xx_SBTMSTATEHIGH_COREFLAGS 0x1FFF0000 +#define BCM43xx_SBTMSTATEHIGH_DMA64BIT 0x10000000 +#define BCM43xx_SBTMSTATEHIGH_GATEDCLK 0x20000000 +#define BCM43xx_SBTMSTATEHIGH_BISTFAILED 0x40000000 +#define BCM43xx_SBTMSTATEHIGH_BISTCOMPLETE 0x80000000/* sbimstate flags */ #define BCM43xx_SBIMSTATE_IB_ERROR 0x20000
@@ -564,8 +587,11 @@struct bcm43xx_dmaring *tx_ring1;struct bcm43xx_dmaring *tx_ring2;struct bcm43xx_dmaring *tx_ring3; +struct bcm43xx_dmaring *tx_ring4; +struct bcm43xx_dmaring *tx_ring5; +struct bcm43xx_dmaring *rx_ring0; -struct bcm43xx_dmaring *rx_ring1;/* only available on core.rev < 5 */ +struct bcm43xx_dmaring *rx_ring3;/* only available on core.rev < 5 */ };/* Data structures for PIO transmission, per 80211 core. */
@@ -758,7 +784,7 @@/* Reason code of the last interrupt. */ u32 irq_reason; -u32 dma_reason[4 ]; +u32 dma_reason[6 ];/* saved irq enable/disable state bitfield. */ u32 irq_savedstate;/* Link Quality calculation context. */
drivers/net/wireless/d80211/bcm43xx/bcm43xx_dma.c +537 -278
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drivers/net/wireless/d80211/bcm43xx/bcm43xx_dma.h +218 -79
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drivers/net/wireless/d80211/bcm43xx/bcm43xx_main.c +61 -45
177 lines not on this page · raw message
drivers/net/wireless/d80211/bcm43xx/bcm43xx_pio.c +2 -3
@@ -186,9 +186,8 @@assert (skb_shinfo (skb)->nr_frags ==0 );bcm43xx_generate_txhdr (queue->bcm, &txhdr, skb->data, skb->len, - packet->txstat.control.first_fragment, -generate_cookie (queue, packet), - &packet->txstat.control); + &packet->txstat.control, +generate_cookie (queue, packet));tx_start (queue); octets = skb->len +sizeof (txhdr);
drivers/net/wireless/d80211/bcm43xx/bcm43xx_xmit.c +3 -4
@@ -275,9 +275,8 @@struct bcm43xx_txhdr *txhdr, const unsigned char *fragment_data, const unsigned int fragment_len, - const int is_first_fragment, - const u16 cookie, - struct ieee80211_tx_control *txctl) + struct ieee80211_tx_control *txctl, + const u16 cookie) { const struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);const struct ieee80211_hdr *wireless_header = (const struct ieee80211_hdr *)fragment_data;
@@ -347,7 +346,7 @@ flags |=0x10 ;// FIXME: unknown meaning. if (fallback_ofdm_modulation) flags |= BCM43xx_TXHDRFLAG_FALLBACKOFDM; -if (is_first_fragment) +if (txctl->first_fragment) flags |= BCM43xx_TXHDRFLAG_FIRSTFRAGMENT;/* Set WSEC/RATE field */
drivers/net/wireless/d80211/bcm43xx/bcm43xx_xmit.h +2 -3
@@ -82,9 +82,8 @@struct bcm43xx_txhdr *txhdr, const unsigned char *fragment_data, const unsigned int fragment_len, - const int is_first_fragment, - const u16 cookie, - struct ieee80211_tx_control *txctl); + struct ieee80211_tx_control *txctl, + const u16 cookie);/* RX header as received from the hardware. */ struct bcm43xx_rxhdr {
Signature · 1 line
Greetings Michael.