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rt2x00: Misc fixes

PATCH In review Ivo van Doorn 1 participant 1 message Aug 27, 2006

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PATCH 10/10 rt2x00: Misc fixes

EEPROM_SIZE should be a value dividable by sizeof(u16) CSR_REG_SIZE should be dividable by sizeof(u32)

In USB adapters the eeprom offset is in bytes and not words.

Short slot time is 9 instead of 7

Signed-off-by Ivo van Doorn <[email protected]>

---

drivers/net/wireless/d80211/rt2x00/rt2400pci.h +1 -1
diff -rU3 wireless-dev-rt2x00-txd/drivers/net/wireless/d80211/rt2x00/rt2400pci.h wireless-dev-rt2x00-misc/drivers/net/wireless/d80211/rt2x00/rt2400pci.h
@@ -44,7 +44,7 @@
 #define CSR_REG_BASE			0x0000
 #define CSR_REG_SIZE			0x014c
 #define EEPROM_BASE			0x0000
-#define EEPROM_SIZE			0x00ff
+#define EEPROM_SIZE			0x0100
 
 /*
  * Control/Status Registers(CSR).
drivers/net/wireless/d80211/rt2x00/rt2500pci.h +2 -2
diff -rU3 wireless-dev-rt2x00-txd/drivers/net/wireless/d80211/rt2x00/rt2500pci.h wireless-dev-rt2x00-misc/drivers/net/wireless/d80211/rt2x00/rt2500pci.h
@@ -55,7 +55,7 @@
 #define CSR_REG_BASE			0x0000
 #define CSR_REG_SIZE			0x0174
 #define EEPROM_BASE			0x0000
-#define EEPROM_SIZE			0x01ff
+#define EEPROM_SIZE			0x0200
 
 /*
  * Control/Status Registers(CSR).
@@ -542,7 +542,7 @@
  */
 
 /*
- * PCISR: PCI control register.
+ * PCICSR: PCI control register.
  * BIG_ENDIAN: 1: big endian, 0: little endian.
  * RX_TRESHOLD: Rx threshold in dw to start pci access
  * 0: 16dw (default), 1: 8dw, 2: 4dw, 3: 32dw.
drivers/net/wireless/d80211/rt2x00/rt2500usb.c +1 -1
diff -rU3 wireless-dev-rt2x00-txd/drivers/net/wireless/d80211/rt2x00/rt2500usb.c wireless-dev-rt2x00-misc/drivers/net/wireless/d80211/rt2x00/rt2500usb.c
@@ -270,7 +270,7 @@
 	eeprom->magic = 0xbad;
 
 	rt2x00_eeprom_multiread(rt2x00dev,
-		eeprom->offset / sizeof(u16), (void*)data, eeprom->len);
+		eeprom->offset, (void*)data, eeprom->len);
 
 	return 0;
 }
drivers/net/wireless/d80211/rt2x00/rt2500usb.h +1 -1
diff -rU3 wireless-dev-rt2x00-txd/drivers/net/wireless/d80211/rt2x00/rt2500usb.h wireless-dev-rt2x00-misc/drivers/net/wireless/d80211/rt2x00/rt2500usb.h
@@ -46,7 +46,7 @@
  * Register layout information.
  */
 #define CSR_REG_BASE			0x0400
-#define CSR_REG_SIZE			0x00ff
+#define CSR_REG_SIZE			0x0100
 #define EEPROM_BASE			0x0000
 #define EEPROM_SIZE			0x006a
 
drivers/net/wireless/d80211/rt2x00/rt2x00.h +1 -1
diff -rU3 wireless-dev-rt2x00-txd/drivers/net/wireless/d80211/rt2x00/rt2x00.h wireless-dev-rt2x00-misc/drivers/net/wireless/d80211/rt2x00/rt2x00.h
@@ -117,7 +117,7 @@
 #define PREAMBLE		144
 #define SHORT_PREAMBLE		72
 #define SLOT_TIME		20
-#define SHORT_SLOT_TIME		7
+#define SHORT_SLOT_TIME		9
 
 /*
  * TX result flags.
drivers/net/wireless/d80211/rt2x00/rt61pci.h +1 -1
diff -rU3 wireless-dev-rt2x00-txd/drivers/net/wireless/d80211/rt2x00/rt61pci.h wireless-dev-rt2x00-misc/drivers/net/wireless/d80211/rt2x00/rt61pci.h
@@ -48,7 +48,7 @@
 #define CSR_REG_BASE			0x3000
 #define CSR_REG_SIZE			0x04b0
 #define EEPROM_BASE			0x0000
-#define EEPROM_SIZE			0x00ff
+#define EEPROM_SIZE			0x0100
 
 /*
  * PCI registers.
drivers/net/wireless/d80211/rt2x00/rt73usb.c +1 -1
diff -rU3 wireless-dev-rt2x00-txd/drivers/net/wireless/d80211/rt2x00/rt73usb.c wireless-dev-rt2x00-misc/drivers/net/wireless/d80211/rt2x00/rt73usb.c
@@ -271,7 +271,7 @@
 	eeprom->magic = 0xbad;
 
 	rt2x00_eeprom_multiread(rt2x00dev,
-		eeprom->offset / sizeof(u16), (void*)data, eeprom->len);
+		eeprom->offset, (void*)data, eeprom->len);
 
 	return 0;
 }
drivers/net/wireless/d80211/rt2x00/rt73usb.h +1 -1
diff -rU3 wireless-dev-rt2x00-txd/drivers/net/wireless/d80211/rt2x00/rt73usb.h wireless-dev-rt2x00-misc/drivers/net/wireless/d80211/rt2x00/rt73usb.h
@@ -46,7 +46,7 @@
 #define CSR_REG_BASE			0x3000
 #define CSR_REG_SIZE			0x04b0
 #define EEPROM_BASE			0x0000
-#define EEPROM_SIZE			0x00ff
+#define EEPROM_SIZE			0x0100
 
 /*
  * USB registers.