Skip to contentSkip to conversation

probing issue when using physmap platform device

PATCH Matthias Fuchs 1 participant 1 message Sep 18, 2006 Memory technology devices (MTD)

lore
Share & tools
lore
#0 lore raw

Hi,

below you find my implementation of the platform device code for a physmapped flash part on a CPCI405 board. As I understood this is the recommended way to add memory mapped flash to platforms instead of adding maps to drivers/mtd/maps.

All tests were done with 2.6.18-rc7.

When using the code on a board with two SST39VF1601 flashes everything is fine. Here is the bootlog:

physmap platform flash device: 00400000 at ffc00000
CFI: Found no physmap-flash.0 device at location zero
Found: SST 39VF1601
physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank physmap-flash.0: Found 1 x16 devices at 0x200000 in 16-bit bank number of JEDEC chips: 2
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness. RedBoot partition parsing not available
Using physmap partition information
Creating 4 MTD partitions on "physmap-flash.0":
0x00000000-0x00100000 : "kernel"
0x00100000-0x00280000 : "initrd"
0x00280000-0x003c0000 : "data"
0x003c0000-0x00400000 : "u-boot"

When I use the same code on a board with 8MB flash (2 x SST39CF3201), SST49LF080A devices are detected. This might be the case because the product ids of the two devices are identical in the last byte.

physmap platform flash device: 00800000 at ff800000
Found: SST 49LF080A
physmap-flash.0: Found 2 x8 devices at 0x0 in 16-bit bank physmap-flash.0: Found 2 x8 devices at 0x400000 in 16-bit bank number of JEDEC chips: 2
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness. RedBoot partition parsing not available
Using physmap partition information
Creating 4 MTD partitions on "physmap-flash.0":
0x00000000-0x00140000 : "kernel"
0x00140000-0x002c0000 : "initrd"
0x002c0000-0x007c0000 : "data"
mtd: partition "data" extends beyond the end of device "physmap-flash.0" -- size truncated to 0x140000
0x007c0000-0x00800000 : "u-boot"
mtd: partition "u-boot" is out of reach -- disabled

I can avoid this issue by enabling the "Flash chip driver advanced config options" and selecting nothing but 16-bit buswidth and 1-chip interleave. Is there any other way to get it work correctly?

physmap platform flash device: 00800000 at ff800000
Found: SST 39VF3201
physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank physmap-flash.0: Found 1 x16 devices at 0x400000 in 16-bit bank number of JEDEC chips: 2
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness. RedBoot partition parsing not available
Using physmap partition information
Creating 4 MTD partitions on "physmap-flash.0":
0x00000000-0x00140000 : "kernel"
0x00140000-0x002c0000 : "initrd"
0x002c0000-0x007c0000 : "data"
0x007c0000-0x00800000 : "u-boot"

The patch I used to add the SST39CF3201 can be found below. I posted it a while ago to the list.

Matthias

(quoted diff) +0 -0

b/arch/ppc/platforms/4xx/cpci405.c
index 3674309..0cefb86 100644

arch/ppc/platforms/4xx/cpci405.c +87 -0

96 lines not on this page · raw message

bd->bi_flashsiz
e - 1;
+
+ if (platform_device_register(&cpci405_physmap_flash) < 0) {
+ printk("TEST: platform_device_register() failed\n");
+ }
+
+ return 0;
+}
+arch_initcall(cpci405_setup_mtd);
+#endif /* CONFIG_MTD_PHYSMAP */
+
+
void __init
cpci405_setup_arch(void)
{

drivers/mtd/chips/jedec_probe.c +17 -0
index 8f39d0a..6fa3b7d 100644
@@ -146,6 +146,7 @@ #define SST29LE512  0x003d
 #define SST39LF800     0x2781
 #define SST39LF160     0x2782
 #define SST39VF1601    0x234b
+#define SST39VF3201    0x235b
 #define SST39LF512     0x00D4
 #define SST39LF010     0x00D5
 #define SST39LF020     0x00D6
@@ -1482,6 +1483,22 @@ static const struct amd_flash_info jedec
                }
 
        }, {
+               .mfr_id         = MANUFACTURER_SST,     /* should be CFI */
+               .dev_id         = SST39VF3201,
+               .name           = "SST 39VF3201",
+               .uaddr          = {
+                       [0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
+                       [1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
+               },
+               .DevSize        = SIZE_4MiB,
+               .CmdSet         = P_ID_AMD_STD,
+               .NumEraseRegions= 2,
+               .regions        = {
+                       ERASEINFO(0x1000,512),
+                       ERASEINFO(0x1000,512)
+               }
+
+       }, {
                .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? 

*
/

                .dev_id         = M29W800DT,
                .name           = "ST M29W800DT",