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Kill dma_is_consistent()

PATCH In review Ralf Baechle 3 participants 4 messages Nov 23, 2006

Subsystems (7)
Documentation SCSI MIPS Generic include/asm header files +3 more subsystems
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Ralf Baechle

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#0 lore raw

PATCH 1/1 Kill dma_is_consistent()

dma_is_consistent() is ill-designed in that it does not have a struct device argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. There also is just a single user, a BUG_ON() call in the 53c700.c SCSI driver so removing instead of fixing it up seems to be the thing to do.

Signed-off-by Ralf Baechle <[email protected]>
---
 Documentation/DMA-API.txt         |    6 ------
 arch/mips/mm/dma-coherent.c       |    7 -------
 arch/mips/mm/dma-ip27.c           |    7 -------
 arch/mips/mm/dma-ip32.c           |    7 -------
 arch/mips/mm/dma-noncoherent.c    |    7 -------
 drivers/scsi/53c700.c             |    3 ---
 include/asm-alpha/dma-mapping.h   |    1 -
 include/asm-arm/dma-mapping.h     |    5 -----
 include/asm-avr32/dma-mapping.h   |    5 -----
 include/asm-cris/dma-mapping.h    |    2 --
 include/asm-frv/dma-mapping.h     |    2 --
 include/asm-generic/dma-mapping.h |    1 -
 include/asm-i386/dma-mapping.h    |    2 --
 include/asm-ia64/dma-mapping.h    |    2 --
 include/asm-m68k/dma-mapping.h    |    5 -----
 include/asm-mips/dma-mapping.h    |    2 --
 include/asm-parisc/dma-mapping.h  |    6 ------
 include/asm-powerpc/dma-mapping.h |    5 -----
 include/asm-sparc64/dma-mapping.h |    1 -
 include/asm-um/dma-mapping.h      |    1 -
 include/asm-x86_64/dma-mapping.h  |    2 --
 include/asm-xtensa/dma-mapping.h  |    2 --
 22 files changed, 0 insertions(+), 81 deletions(-)
Documentation/DMA-API.txt +0 -6
index 2ffb0d6..9c68a03 100644
@@ -431,12 +431,6 @@ be identical to those passed in (and ret
 dma_alloc_noncoherent()).
 
 int
-dma_is_consistent(dma_addr_t dma_handle)
-
-returns true if the memory pointed to by the dma_handle is actually
-consistent.
-
-int
 dma_get_cache_alignment(void)
 
 returns the processor cache alignment.  This is the absolute minimum
arch/mips/mm/dma-coherent.c +0 -7
index 7fa5fd1..e67c840 100644
@@ -190,13 +190,6 @@ int dma_supported(struct device *dev, u6
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(dma_addr_t dma_addr)
-{
-	return 1;
-}
-
-EXPORT_SYMBOL(dma_is_consistent);
-
 void dma_cache_sync(void *vaddr, size_t size,
 	       enum dma_data_direction direction)
 {
arch/mips/mm/dma-ip27.c +0 -7
index 8da19fd..9347068 100644
@@ -197,13 +197,6 @@ int dma_supported(struct device *dev, u6
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(dma_addr_t dma_addr)
-{
-	return 1;
-}
-
-EXPORT_SYMBOL(dma_is_consistent);
-
 void dma_cache_sync(void *vaddr, size_t size,
 	       enum dma_data_direction direction)
 {
arch/mips/mm/dma-ip32.c +0 -7
index ec54ed0..5884e26 100644
@@ -363,13 +363,6 @@ int dma_supported(struct device *dev, u6
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(dma_addr_t dma_addr)
-{
-	return 1;
-}
-
-EXPORT_SYMBOL(dma_is_consistent);
-
 void dma_cache_sync(void *vaddr, size_t size, enum dma_data_direction direction)
 {
 	if (direction == DMA_NONE)
arch/mips/mm/dma-noncoherent.c +0 -7
index 2eeffe5..e6f4779 100644
@@ -299,13 +299,6 @@ int dma_supported(struct device *dev, u6
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(dma_addr_t dma_addr)
-{
-	return 1;
-}
-
-EXPORT_SYMBOL(dma_is_consistent);
-
 void dma_cache_sync(void *vaddr, size_t size, enum dma_data_direction direction)
 {
 	if (direction == DMA_NONE)
drivers/scsi/53c700.c +0 -3
index 562432d..ad799b2 100644
@@ -311,9 +311,6 @@ NCR_700_detect(struct scsi_host_template
 	hostdata->msgin = memory + MSGIN_OFFSET;
 	hostdata->msgout = memory + MSGOUT_OFFSET;
 	hostdata->status = memory + STATUS_OFFSET;
-	/* all of these offsets are L1_CACHE_BYTES separated.  It is fatal
-	 * if this isn't sufficient separation to avoid dma flushing issues */
-	BUG_ON(!dma_is_consistent(pScript) && L1_CACHE_BYTES < dma_get_cache_alignment());
 	hostdata->slots = (struct NCR_700_command_slot *)(memory + SLOTS_OFFSET);
 	hostdata->dev = dev;
include/asm-alpha/dma-mapping.h +0 -1
index b9ff4d8..2e02d64 100644
@@ -51,7 +51,6 @@ #endif	/* !CONFIG_PCI */
 
 #define dma_alloc_noncoherent(d, s, h, f)	dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h)	dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(dev)			(1)
 
 int dma_set_mask(struct device *dev, u64 mask);
include/asm-arm/dma-mapping.h +0 -5
index 55eb4dc..1bca4e3 100644
@@ -44,11 +44,6 @@ static inline int dma_get_cache_alignmen
 	return 32;
 }
 
-static inline int dma_is_consistent(dma_addr_t handle)
-{
-	return !!arch_is_coherent();
-}
-
 /*
  * DMA errors are defined by all-bits-set in the DMA address.
  */
include/asm-avr32/dma-mapping.h +0 -5
index 4c40cb4..11b8bcb 100644
@@ -307,11 +307,6 @@ dma_sync_sg_for_device(struct device *de
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 
-static inline int dma_is_consistent(dma_addr_t dma_addr)
-{
-	return 1;
-}
-
 static inline int dma_get_cache_alignment(void)
 {
 	return boot_cpu_data.dcache.linesz;
include/asm-cris/dma-mapping.h +0 -2
index cbf1a98..71be55d 100644
@@ -156,8 +156,6 @@ dma_get_cache_alignment(void)
 	return (1 << INTERNODE_CACHE_SHIFT);
 }
 
-#define dma_is_consistent(d)	(1)
-
 static inline void
 dma_cache_sync(void *vaddr, size_t size,
 	       enum dma_data_direction direction)
include/asm-frv/dma-mapping.h +0 -2
index e9fc1d4..d791019 100644
@@ -172,8 +172,6 @@ int dma_get_cache_alignment(void)
 	return 1 << L1_CACHE_SHIFT;
 }
 
-#define dma_is_consistent(d)	(1)
-
 static inline
 void dma_cache_sync(void *vaddr, size_t size,
 		    enum dma_data_direction direction)
include/asm-generic/dma-mapping.h +0 -1
index b541e48..7534c47 100644
@@ -266,7 +266,6 @@ #endif
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d)	(1)
 
 static inline int
 dma_get_cache_alignment(void)
include/asm-i386/dma-mapping.h +0 -2
index 81999a3..15741f4 100644
@@ -156,8 +156,6 @@ dma_get_cache_alignment(void)
 	return (1 << INTERNODE_CACHE_SHIFT);
 }
 
-#define dma_is_consistent(d)	(1)
-
 static inline void
 dma_cache_sync(void *vaddr, size_t size,
 	       enum dma_data_direction direction)
include/asm-ia64/dma-mapping.h +0 -2
index 99a8f8e..b6ebad9 100644
@@ -59,6 +59,4 @@ dma_cache_sync (void *vaddr, size_t size
 	mb();
 }
 
-#define dma_is_consistent(dma_handle)	(1)	/* all we do is coherent memory... */
-
 #endif /* _ASM_IA64_DMA_MAPPING_H */
include/asm-m68k/dma-mapping.h +0 -5
index d90d841..8722b5a 100644
@@ -21,11 +21,6 @@ static inline int dma_get_cache_alignmen
 	return 1 << L1_CACHE_SHIFT;
 }
 
-static inline int dma_is_consistent(dma_addr_t dma_addr)
-{
-	return 0;
-}
-
 extern void *dma_alloc_coherent(struct device *, size_t,
 				dma_addr_t *, gfp_t);
 extern void dma_free_coherent(struct device *, size_t,
include/asm-mips/dma-mapping.h +0 -2
index 4328863..531563b 100644
@@ -63,8 +63,6 @@ dma_get_cache_alignment(void)
 	return 128;
 }
 
-extern int dma_is_consistent(dma_addr_t dma_addr);
-
 extern void dma_cache_sync(void *vaddr, size_t size,
 	       enum dma_data_direction direction);
include/asm-parisc/dma-mapping.h +0 -6
index 1e387e1..9e196bc 100644
@@ -190,12 +190,6 @@ dma_get_cache_alignment(void)
 	return dcache_stride;
 }
 
-static inline int
-dma_is_consistent(dma_addr_t dma_addr)
-{
-	return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
-}
-
 static inline void
 dma_cache_sync(void *vaddr, size_t size,
 	       enum dma_data_direction direction)
include/asm-powerpc/dma-mapping.h +0 -5
index 2ab9baf..e9e3ddd 100644
@@ -217,11 +217,6 @@ #endif
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#ifdef CONFIG_NOT_COHERENT_CACHE
-#define dma_is_consistent(d)	(0)
-#else
-#define dma_is_consistent(d)	(1)
-#endif
 
 static inline int dma_get_cache_alignment(void)
 {
include/asm-sparc64/dma-mapping.h +0 -1
index 27c46fb..0b3cc27 100644
@@ -181,7 +181,6 @@ #endif /* PCI */
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d)	(1)
 
 static inline int
 dma_get_cache_alignment(void)
include/asm-um/dma-mapping.h +0 -1
index babd298..f472e6f 100644
@@ -94,7 +94,6 @@ dma_sync_sg(struct device *dev, struct s
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d) (1)
 
 static inline int
 dma_get_cache_alignment(void)
include/asm-x86_64/dma-mapping.h +0 -2
index 10174b1..77ff135 100644
@@ -180,8 +180,6 @@ static inline int dma_get_cache_alignmen
 	return boot_cpu_data.x86_clflush_size;
 }
 
-#define dma_is_consistent(h) 1
-
 extern int dma_set_mask(struct device *dev, u64 mask);
 
 static inline void
include/asm-xtensa/dma-mapping.h +0 -2
index c39c91d..cdd75af 100644
@@ -170,8 +170,6 @@ dma_get_cache_alignment(void)
 	return L1_CACHE_BYTES;
 }
 
-#define dma_is_consistent(d)	(1)
-
 static inline void
 dma_cache_sync(void *vaddr, size_t size,
 	       enum dma_data_direction direction)
#1 lore raw
Quoted 3 lines · Ralf Baechle

dma_is_consistent() is ill-designed in that it does not have a struct device argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard.

At the time the interface was designed, the general consensus was that it was easier to recognise incoherent memory regions by their address range than by which device they came from. The main proponent of this being arm, if I remember rightly.

Quoted 3 lines

There also is just a single
user, a BUG_ON() call in the 53c700.c SCSI driver so removing instead of fixing it up seems to be the thing to do.

Really, no, this is a bad idea. However, if you want to make it per device as well as per dma_addr_t, please feel free ... the patch will be marginally smaller than the one you just submitted ...

drivers/scsi/53c700.c NCR_700_detect(struct scsi_host_template · line 316

Quoted 3 lines
drivers/scsi/53c700.c +0 -3
-	/* all of these offsets are L1_CACHE_BYTES separated.  It is fatal
-	 * if this isn't sufficient separation to avoid dma flushing issues */
-	BUG_ON(!dma_is_consistent(pScript) && L1_CACHE_BYTES < dma_get_cache_alignment());

Really, this is a good BUG_ON; it detects a condition that would cause incredibly subtle and extremely hard to diagnose data corruption problems in the driver caused by mixed cacheline incoherency. It's the price I paid in the driver for having my data separations for the mailboxes determined at compile time rather than runtime. If you want to take this out, we need to use dma_get_cache_alignment() to determine the mailbox separations and set them up accordingly at runtime.

James

#2 lore raw
Quoted 9 lines · James Bottomley
Quoted 3 lines · Ralf Baechle

dma_is_consistent() is ill-designed in that it does not have a struct device argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard.

At the time the interface was designed, the general consensus was that it was easier to recognise incoherent memory regions by their address range than by which device they came from. The main proponent of this being arm, if I remember rightly.

I don't remember that being particularly discussed, and it seems that no one has implemented it (but possibly implemented their own stuff in arch private code.)

Signature · 3 lines
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:
author
#3 lore raw

PATCH 1/1 Add struct dev pointer to dma_is_consistent()

In reply to James Bottomley

So here's take 2 integrating James' suggestions.

Add struct dev pointer to dma_is_consistent()

dma_is_consistent() is ill-designed in that it does not have a struct device pointer argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. Change dma_is_consistent to take a struct device pointer as first argument and fix the sole caller to pass it.

Signed-off-by Ralf Baechle <[email protected]>
---
 Documentation/DMA-API.txt         |    6 +++---
 arch/mips/mm/dma-coherent.c       |    2 +-
 arch/mips/mm/dma-ip27.c           |    2 +-
 arch/mips/mm/dma-ip32.c           |    2 +-
 arch/mips/mm/dma-noncoherent.c    |    2 +-
 drivers/scsi/53c700.c             |    2 +-
 include/asm-alpha/dma-mapping.h   |    2 +-
 include/asm-arm/dma-mapping.h     |    2 +-
 include/asm-avr32/dma-mapping.h   |    2 +-
 include/asm-cris/dma-mapping.h    |    2 +-
 include/asm-frv/dma-mapping.h     |    2 +-
 include/asm-generic/dma-mapping.h |    2 +-
 include/asm-i386/dma-mapping.h    |    2 +-
 include/asm-ia64/dma-mapping.h    |    2 +-
 include/asm-m68k/dma-mapping.h    |    2 +-
 include/asm-mips/dma-mapping.h    |    2 +-
 include/asm-parisc/dma-mapping.h  |    2 +-
 include/asm-powerpc/dma-mapping.h |    4 ++--
 include/asm-sparc64/dma-mapping.h |    2 +-
 include/asm-um/dma-mapping.h      |    2 +-
 include/asm-x86_64/dma-mapping.h  |    2 +-
 include/asm-xtensa/dma-mapping.h  |    2 +-
 22 files changed, 25 insertions(+), 25 deletions(-)
Documentation/DMA-API.txt +3 -3
index 2ffb0d6..6e826f4 100644
@@ -431,10 +431,10 @@ be identical to those passed in (and ret
 dma_alloc_noncoherent()).
 
 int
-dma_is_consistent(dma_addr_t dma_handle)
+dma_is_consistent(struct device *dev, dma_addr_t dma_handle)
 
-returns true if the memory pointed to by the dma_handle is actually
-consistent.
+returns true if the device dev is performing consistent DMA on the memory
+area pointed to by the dma_handle.
 
 int
 dma_get_cache_alignment(void)
arch/mips/mm/dma-coherent.c +1 -1
index 7fa5fd1..18bc83e 100644
@@ -190,7 +190,7 @@ int dma_supported(struct device *dev, u6
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(dma_addr_t dma_addr)
+int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
 {
 	return 1;
 }
arch/mips/mm/dma-ip27.c +1 -1
index 8da19fd..8e9a5a8 100644
@@ -197,7 +197,7 @@ int dma_supported(struct device *dev, u6
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(dma_addr_t dma_addr)
+int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
 {
 	return 1;
 }
arch/mips/mm/dma-ip32.c +1 -1
index ec54ed0..08720a4 100644
@@ -363,7 +363,7 @@ int dma_supported(struct device *dev, u6
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(dma_addr_t dma_addr)
+int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
 {
 	return 1;
 }
arch/mips/mm/dma-noncoherent.c +1 -1
index 2eeffe5..4a3efc6 100644
@@ -299,7 +299,7 @@ int dma_supported(struct device *dev, u6
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(dma_addr_t dma_addr)
+int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
 {
 	return 1;
 }
drivers/scsi/53c700.c +1 -1
index 562432d..3741f92 100644
@@ -313,7 +313,7 @@ NCR_700_detect(struct scsi_host_template
 	hostdata->status = memory + STATUS_OFFSET;
 	/* all of these offsets are L1_CACHE_BYTES separated.  It is fatal
 	 * if this isn't sufficient separation to avoid dma flushing issues */
-	BUG_ON(!dma_is_consistent(pScript) && L1_CACHE_BYTES < dma_get_cache_alignment());
+	BUG_ON(!dma_is_consistent(hostdata->dev, pScript) && L1_CACHE_BYTES < dma_get_cache_alignment());
 	hostdata->slots = (struct NCR_700_command_slot *)(memory + SLOTS_OFFSET);
 	hostdata->dev = dev;
include/asm-alpha/dma-mapping.h +1 -1
index b9ff4d8..b274bf6 100644
@@ -51,7 +51,7 @@ #endif	/* !CONFIG_PCI */
 
 #define dma_alloc_noncoherent(d, s, h, f)	dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h)	dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(dev)			(1)
+#define dma_is_consistent(d, h)			(1)
 
 int dma_set_mask(struct device *dev, u64 mask);
include/asm-arm/dma-mapping.h +1 -1
index 55eb4dc..f3e0327 100644
@@ -44,7 +44,7 @@ static inline int dma_get_cache_alignmen
 	return 32;
 }
 
-static inline int dma_is_consistent(dma_addr_t handle)
+static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
 {
 	return !!arch_is_coherent();
 }
include/asm-avr32/dma-mapping.h +1 -1
index 4c40cb4..44630be 100644
@@ -307,7 +307,7 @@ dma_sync_sg_for_device(struct device *de
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 
-static inline int dma_is_consistent(dma_addr_t dma_addr)
+static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
 {
 	return 1;
 }
include/asm-cris/dma-mapping.h +1 -1
index cbf1a98..af704fd 100644
@@ -156,7 +156,7 @@ dma_get_cache_alignment(void)
 	return (1 << INTERNODE_CACHE_SHIFT);
 }
 
-#define dma_is_consistent(d)	(1)
+#define dma_is_consistent(d, h)	(1)
 
 static inline void
 dma_cache_sync(void *vaddr, size_t size,
include/asm-frv/dma-mapping.h +1 -1
index e9fc1d4..7b97fc7 100644
@@ -172,7 +172,7 @@ int dma_get_cache_alignment(void)
 	return 1 << L1_CACHE_SHIFT;
 }
 
-#define dma_is_consistent(d)	(1)
+#define dma_is_consistent(d, h)	(1)
 
 static inline
 void dma_cache_sync(void *vaddr, size_t size,
include/asm-generic/dma-mapping.h +1 -1
index b541e48..b9be3fc 100644
@@ -266,7 +266,7 @@ #endif
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d)	(1)
+#define dma_is_consistent(d, h)	(1)
 
 static inline int
 dma_get_cache_alignment(void)
include/asm-i386/dma-mapping.h +1 -1
index 81999a3..7da64c9 100644
@@ -156,7 +156,7 @@ dma_get_cache_alignment(void)
 	return (1 << INTERNODE_CACHE_SHIFT);
 }
 
-#define dma_is_consistent(d)	(1)
+#define dma_is_consistent(d, h)	(1)
 
 static inline void
 dma_cache_sync(void *vaddr, size_t size,
include/asm-ia64/dma-mapping.h +1 -1
index 99a8f8e..4b075bc 100644
@@ -59,6 +59,6 @@ dma_cache_sync (void *vaddr, size_t size
 	mb();
 }
 
-#define dma_is_consistent(dma_handle)	(1)	/* all we do is coherent memory... */
+#define dma_is_consistent(d, h)	(1)	/* all we do is coherent memory... */
 
 #endif /* _ASM_IA64_DMA_MAPPING_H */
include/asm-m68k/dma-mapping.h +1 -1
index d90d841..efc89c1 100644
@@ -21,7 +21,7 @@ static inline int dma_get_cache_alignmen
 	return 1 << L1_CACHE_SHIFT;
 }
 
-static inline int dma_is_consistent(dma_addr_t dma_addr)
+static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
 {
 	return 0;
 }
include/asm-mips/dma-mapping.h +1 -1
index 4328863..e17f70d 100644
@@ -63,7 +63,7 @@ dma_get_cache_alignment(void)
 	return 128;
 }
 
-extern int dma_is_consistent(dma_addr_t dma_addr);
+extern int dma_is_consistent(struct device *dev, dma_addr_t dma_addr);
 
 extern void dma_cache_sync(void *vaddr, size_t size,
 	       enum dma_data_direction direction);
include/asm-parisc/dma-mapping.h +1 -1
index 1e387e1..c40d48a 100644
@@ -191,7 +191,7 @@ dma_get_cache_alignment(void)
 }
 
 static inline int
-dma_is_consistent(dma_addr_t dma_addr)
+dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
 {
 	return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
 }
include/asm-powerpc/dma-mapping.h +2 -2
index 2ab9baf..3487a4b 100644
@@ -218,9 +218,9 @@ #endif
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 #ifdef CONFIG_NOT_COHERENT_CACHE
-#define dma_is_consistent(d)	(0)
+#define dma_is_consistent(d, h)	(0)
 #else
-#define dma_is_consistent(d)	(1)
+#define dma_is_consistent(d, h)	(1)
 #endif
 
 static inline int dma_get_cache_alignment(void)
include/asm-sparc64/dma-mapping.h +1 -1
index 27c46fb..5fe0072 100644
@@ -181,7 +181,7 @@ #endif /* PCI */
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d)	(1)
+#define dma_is_consistent(d, h)	(1)
 
 static inline int
 dma_get_cache_alignment(void)
include/asm-um/dma-mapping.h +1 -1
index babd298..defb5b8 100644
@@ -94,7 +94,7 @@ dma_sync_sg(struct device *dev, struct s
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d) (1)
+#define dma_is_consistent(d, h) (1)
 
 static inline int
 dma_get_cache_alignment(void)
include/asm-x86_64/dma-mapping.h +1 -1
index 10174b1..c8cc488 100644
@@ -180,7 +180,7 @@ static inline int dma_get_cache_alignmen
 	return boot_cpu_data.x86_clflush_size;
 }
 
-#define dma_is_consistent(h) 1
+#define dma_is_consistent(d, h) 1
 
 extern int dma_set_mask(struct device *dev, u64 mask);
include/asm-xtensa/dma-mapping.h +1 -1
index c39c91d..827d1df 100644
@@ -170,7 +170,7 @@ dma_get_cache_alignment(void)
 	return L1_CACHE_BYTES;
 }
 
-#define dma_is_consistent(d)	(1)
+#define dma_is_consistent(d, h)	(1)
 
 static inline void
 dma_cache_sync(void *vaddr, size_t size,