KVM: cr3 cache support
PATCH 1/1 KVM: cr3 cache support
Subject: [patch] KVM: cr3 cache support
From: Ingo Molnar <[email protected]>
this enables a KVM-aware Linux guest to make use of VMX CPU's cr3 cache feature. The result is cheaper context-switches and faster TLB flushes.
Signed-off-by Ingo Molnar <[email protected]>
--- drivers/kvm/kvm.h | 17 ++- drivers/kvm/kvm_main.c | 2 drivers/kvm/mmu.c | 123 +++++++++++++++++-------- drivers/kvm/paging_tmpl.h | 2 drivers/kvm/vmx.c | 224 ++++++++++++++++++++++++++++++++++++++-------- drivers/kvm/vmx.h | 1 6 files changed, 283 insertions(+), 86 deletions(-)
drivers/kvm/kvm.h +11 -6
@@ -52,8 +52,8 @@#define KVM_MAX_VCPUS 1#define KVM_MEMORY_SLOTS 4 -#define KVM_NUM_MMU_PAGES 256 -#define KVM_MIN_FREE_MMU_PAGES 5 +#define KVM_NUM_MMU_PAGES 1024 +#define KVM_MIN_FREE_MMU_PAGES 10#define KVM_REFILL_PAGES 25#define FX_IMAGE_SIZE 512
@@ -166,7 +166,7 @@ struct kvm_mmu {int root_level;int shadow_root_level; -u64 *pae_root; +u64 *pae_root[KVM_CR3_CACHE_SIZE ]; };#define KVM_NR_MEM_OBJS 20
@@ -240,6 +240,9 @@ struct kvm_vcpu {unsigned long cr3;struct kvm_vcpu_para_state *para_state;hpa_t vm_syscall_hpa; +unsigned int cr3_cache_idx; +unsigned int cr3_cache_limit; +gpa_t guest_cr3_gpa[KVM_CR3_CACHE_SIZE ];unsigned long cr4;unsigned long cr8;u64 pdptrs[4 ];/* pae */
@@ -400,6 +403,8 @@ int kvm_mmu_setup(struct kvm_vcpu *vcpu)int kvm_mmu_reset_context (struct kvm_vcpu *vcpu);void kvm_mmu_slot_remove_write_access (struct kvm_vcpu *vcpu,int slot); +void kvm_cr3_cache_clear (struct kvm_vcpu *vcpu); +hpa_t gpa_to_hpa (struct kvm_vcpu *vcpu,gpa_t gpa);#define HPA_MSB ((sizeof(hpa_t) * 8) - 1)#define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
@@ -445,9 +450,9 @@ int emulator_set_dr(struct x86_emulate_c unsigned long value);void set_cr0 (struct kvm_vcpu *vcpu,unsigned long cr0); -void set_cr3 (struct kvm_vcpu *vcpu,unsigned long cr0); -void set_cr4 (struct kvm_vcpu *vcpu,unsigned long cr0); -void set_cr8 (struct kvm_vcpu *vcpu,unsigned long cr0); +void set_cr3 (struct kvm_vcpu *vcpu,unsigned long cr3); +void set_cr4 (struct kvm_vcpu *vcpu,unsigned long cr4); +void set_cr8 (struct kvm_vcpu *vcpu,unsigned long cr8);void lmsw (struct kvm_vcpu *vcpu,unsigned long msw);int kvm_get_msr_common (struct kvm_vcpu *vcpu,u32 msr,u64 *pdata);
drivers/kvm/kvm_main.c +1 -1
@@ -447,7 +447,7 @@ EXPORT_SYMBOL_GPL(set_cr4);void set_cr3 (struct kvm_vcpu *vcpu,unsigned long cr3) {if (is_long_mode (vcpu)) { -if ( cr3 &CR3_L_MODE_RESEVED_BITS ) { +if (cr3 &CR3_L_MODE_RESEVED_BITS ) {printk (KERN_DEBUG "set_cr3: #GP, reserved bits\n" );inject_gp (vcpu);return ;
drivers/kvm/mmu.c +83 -40
206 lines not on this page · raw message
drivers/kvm/paging_tmpl.h +1 -1
@@ -197,7 +197,7 @@ static u64 *FNAME(fetch)(struct kvm_vcpu shadow_addr = vcpu->mmu.root_hpa; level = vcpu->mmu.shadow_root_level;if (level ==PT32E_ROOT_LEVEL ) { - shadow_addr = vcpu->mmu.pae_root[(addr >>30 ) &3 ]; + shadow_addr = vcpu->mmu.pae_root[vcpu->cr3_cache_idx][(addr >>30 ) &3 ]; shadow_addr &=PT64_BASE_ADDR_MASK ; --level; }
drivers/kvm/vmx.c +186 -38
299 lines not on this page · raw message
drivers/kvm/vmx.h +1 -0
@@ -292,5 +292,6 @@ enum vmcs_field {#define MSR_IA32_VMX_PROCBASED_CTLS 0x482#define MSR_IA32_VMX_EXIT_CTLS 0x483#define MSR_IA32_VMX_ENTRY_CTLS 0x484 +#define MSR_IA32_VMX_MISC 0x485#endif
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