PMC-related cleanups [v2]
cover PMC-related cleanups [v2]
The following short series contains a few patches to abstract and clean up some of the PMC handling on powerpc, followed by the introduction of the sysfs support for PMCs on PA6T.
Edits since last submit:
* Setting .owner in the sysdev_attr patch
* Using intvec_top instead of intvec_base for setting "soft" vectors
* Fix patch badness with duplicate .pmc_type for one entry
Thanks,
Olof
PATCH 1/4 powerpc: Oprofile cleanup [v2]
Clean up the ctr_read/write a bit. It's currently defined in the include but only used in one C file each. The only exception is the classic version, so keep that in the include and define in the C file as appropriate.
arch/powerpc/oprofile/op_model_7450.c +5 -5
@@ -137,9 +137,9 @@ static void fsl7450_start(struct op_counfor (i =0 ; i <NUM_CTRS ; ++i) {if (ctr[i].enabled) -ctr_write (i, reset_value[i]); +classic_ctr_write (i, reset_value[i]);else -ctr_write (i,0 ); +classic_ctr_write (i,0 ); }/* Clear the freeze bit, and enable the interrupt.
@@ -179,13 +179,13 @@ static void fsl7450_handle_interrupt(str is_kernel =is_kernel_addr (pc);for (i =0 ; i <NUM_CTRS ; ++i) { - val =ctr_read (i); + val =classic_ctr_read (i);if (val <0 ) {if (oprofile_running && ctr[i].enabled) {oprofile_add_ext_sample (pc, regs, i, is_kernel); -ctr_write (i, reset_value[i]); +classic_ctr_write (i, reset_value[i]); }else { -ctr_write (i,0 ); +classic_ctr_write (i,0 ); } } }
arch/powerpc/oprofile/op_model_fsl_booke.c +81 -0
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arch/powerpc/oprofile/op_model_power4.c +5 -5
@@ -121,9 +121,9 @@ static void power4_start(struct op_countfor (i =0 ; i < cur_cpu_spec->num_pmcs; ++i) {if (ctr[i].enabled) { -ctr_write (i, reset_value[i]); +classic_ctr_write (i, reset_value[i]); }else { -ctr_write (i,0 ); +classic_ctr_write (i,0 ); } }
@@ -254,13 +254,13 @@ static void power4_handle_interrupt(strumtmsrd (mfmsr () |MSR_PMM );for (i =0 ; i < cur_cpu_spec->num_pmcs; ++i) { - val =ctr_read (i); + val =classic_ctr_read (i);if (val <0 ) {if (oprofile_running && ctr[i].enabled) {oprofile_add_ext_sample (pc, regs, i, is_kernel); -ctr_write (i, reset_value[i]); +classic_ctr_write (i, reset_value[i]); }else { -ctr_write (i,0 ); +classic_ctr_write (i,0 ); } } }
arch/powerpc/oprofile/op_model_rs64.c +5 -5
@@ -137,10 +137,10 @@ static void rs64_start(struct op_counterfor (i =0 ; i < num_counters; ++i) {if (ctr[i].enabled) { -ctr_write (i, reset_value[i]); +classic_ctr_write (i, reset_value[i]);ctrl_write (i, ctr[i].event); }else { -ctr_write (i,0 ); +classic_ctr_write (i,0 ); } }
@@ -186,13 +186,13 @@ static void rs64_handle_interrupt(structmtmsrd (mfmsr () |MSR_PMM );for (i =0 ; i < num_counters; ++i) { - val =ctr_read (i); + val =classic_ctr_read (i);if (val <0 ) {if (ctr[i].enabled) {oprofile_add_ext_sample (pc, regs, i, is_kernel); -ctr_write (i, reset_value[i]); +classic_ctr_write (i, reset_value[i]); }else { -ctr_write (i,0 ); +classic_ctr_write (i,0 ); } } }
include/asm-powerpc/oprofile_impl.h +2 -87
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PATCH 2/4 powerpc: Add PMC type to cputable [v2]
In reply to Olof JohanssonAdd cputable entries for which type of PMC implementation the processor has.
I've only filled in the current 64-bit processors, the unfilled default value will have same behaviour as before so it can be done over time as needed.
Also tidy up the dummy_perf implementation a bit, aggregating it into one function with ifdefs instead of several.
arch/powerpc/kernel/pmc.c +9 -26
@@ -19,38 +19,21 @@#include <asm/processor.h> #include <asm/pmc.h> -#if defined(CONFIG_FSL_BOOKE ) && !defined(CONFIG_E200 ) -static void dummy_perf (struct pt_regs *regs) -{ -unsigned int pmgc0 =mfpmr (PMRN_PMGC0 ); - - pmgc0 &= ~PMGC0_PMIE ; -mtpmr (PMRN_PMGC0 , pmgc0); -} -#elif defined(CONFIG_PPC64 ) || defined(CONFIG_6xx) - -#ifndef MMCR0_PMAO -#define MMCR0_PMAO 0 +#ifndef MMCR0_PMA0 +#define MMCR0_PMA0 0#endif -/* Ensure exceptions are disabled */ static void dummy_perf (struct pt_regs *regs) { -unsigned int mmcr0 =mfspr (SPRN_MMCR0 ); - - mmcr0 &= ~(MMCR0_PMXE |MMCR0_PMAO ); -mtspr (SPRN_MMCR0 , mmcr0); -} +#if defined(CONFIG_FSL_BOOKE ) && !defined(CONFIG_E200 ) +mtpmr (PMRN_PMGC0 ,mfpmr (PMRN_PMGC0 ) & ~PMGC0_PMIE ); +#elif defined(CONFIG_PPC64 ) || defined(CONFIG_6xx) +mtspr (SPRN_MMCR0 ,mfspr (SPRN_MMCR0 ) & ~(MMCR0_PMXE |MMCR0_PMA0 ));#else -/* Ensure exceptions are disabled */ -static void dummy_perf (struct pt_regs *regs) -{ -unsigned int mmcr0 =mfspr (SPRN_MMCR0 ); - - mmcr0 &= ~(MMCR0_PMXE ); -mtspr (SPRN_MMCR0 , mmcr0); -} +mtspr (SPRN_MMCR0 ,mfspr (SPRN_MMCR0 ) & ~MMCR0_PMXE );#endif +} +static DEFINE_SPINLOCK (pmc_owner_lock);static void *pmc_owner_caller;/* mostly for debugging */
include/asm-powerpc/cputable.h +7 -0
@@ -50,6 +50,12 @@ enum powerpc_oprofile_type { PPC_OPROFILE_CELL = 5, }; +enum powerpc_pmc_type { +PPC_PMC_DEFAULT =0 , +PPC_PMC_IBM =1 , +PPC_PMC_PA6T =2 , +}; +struct cpu_spec {/* CPU is matched via (PVR & pvr_mask) == pvr_value */ unsigned int pvr_mask;
@@ -65,6 +71,7 @@ struct cpu_spec {/* number of performance monitor counters */ unsigned int num_pmcs; +enum powerpc_pmc_type pmc_type;/* this is called to initialize various CPU bits like L1 cache, * BHT, SPD, etc... from head.S before branching to identify_machine
arch/powerpc/kernel/cputable.c +17 -0
@@ -86,6 +86,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/power3", .oprofile_type = PPC_OPROFILE_RS64, .platform = "power3",
@@ -99,6 +100,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/power3", .oprofile_type = PPC_OPROFILE_RS64, .platform = "power3",
@@ -112,6 +114,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/rs64", .oprofile_type = PPC_OPROFILE_RS64, .platform = "rs64",
@@ -125,6 +128,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/rs64", .oprofile_type = PPC_OPROFILE_RS64, .platform = "rs64",
@@ -138,6 +142,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/rs64", .oprofile_type = PPC_OPROFILE_RS64, .platform = "rs64",
@@ -151,6 +156,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/rs64", .oprofile_type = PPC_OPROFILE_RS64, .platform = "rs64",
@@ -164,6 +170,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/power4", .oprofile_type = PPC_OPROFILE_POWER4, .platform = "power4",
@@ -177,6 +184,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/power4", .oprofile_type = PPC_OPROFILE_POWER4, .platform = "power4",
@@ -191,6 +199,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .cpu_setup = __setup_cpu_ppc970, .cpu_restore = __restore_cpu_ppc970, .oprofile_cpu_type = "ppc64/970",
@@ -207,6 +216,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .cpu_setup = __setup_cpu_ppc970, .cpu_restore = __restore_cpu_ppc970, .oprofile_cpu_type = "ppc64/970",
@@ -239,6 +250,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, + .pmc_type = PPC_PMC_IBM, .cpu_setup = __setup_cpu_ppc970, .oprofile_cpu_type = "ppc64/970", .oprofile_type = PPC_OPROFILE_POWER4,
@@ -253,6 +265,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 6, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/power5", .oprofile_type = PPC_OPROFILE_POWER4,/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
@@ -271,6 +284,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 6, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/power5+", .oprofile_type = PPC_OPROFILE_POWER4, .oprofile_mmcra_sihv = MMCRA_SIHV,
@@ -321,6 +335,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 6, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/power6", .oprofile_type = PPC_OPROFILE_POWER4, .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
@@ -340,6 +355,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 4, + .pmc_type = PPC_PMC_IBM, .oprofile_cpu_type = "ppc64/cell-be", .oprofile_type = PPC_OPROFILE_CELL, .platform = "ppc-cell-be",
@@ -353,6 +369,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 64, .dcache_bsize = 64, .num_pmcs = 6, + .pmc_type = PPC_PMC_PA6T, .platform = "pa6t", }, {/* default match */
@@ -364,6 +381,7 @@ static struct cpu_spec cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 6, + .pmc_type = PPC_PMC_IBM, .platform = "power4", }#endif /* CONFIG_PPC64 */
PATCH 3/4 Introduce _SYSDEV_ATTR
In reply to Olof JohanssonIntroduce _SYSDEV_ATTR(), to be used to just define the struct, and not a named variable with the attribute. Useful for arrays of sysdev_attributes.
include/linux/sysdev.h +8 -4
@@ -98,12 +98,16 @@ struct sysdev_attribute { }; -#define SYSDEV_ATTR (_name,_mode,_show,_store) \ -struct sysdev_attribute attr_##_name = { \ - .attr = {.name = __stringify(_name), .mode = _mode }, \ +#define _SYSDEV_ATTR (_name,_mode,_show,_store) \ +{ \ + .attr = { .name = __stringify(_name), .mode = _mode, \ + .owner = THIS_MODULE }, \ .show = _show, \ .store = _store, \ -}; +} + +#define SYSDEV_ATTR (_name,_mode,_show,_store) \ +struct sysdev_attribute attr_##_name = _SYSDEV_ATTR(_name,_mode,_show,_store);extern int sysdev_create_file (struct sys_device *,struct sysdev_attribute *);extern void sysdev_remove_file (struct sys_device *,struct sysdev_attribute *);
PATCH 4/4 powerpc: PA6T PMC support [v2]
In reply to Olof JohanssonSupport for PA6T-style PMC registers.
PMCs are completely implementation-dependent on PPC, and PA6T numbers them differently from the IBM model.
arch/powerpc/kernel/sysfs.c +92 -49
@@ -169,6 +169,11 @@ static ssize_t __attribute_used__ \return count; \ } + +/* Let's define all possible registers, we'll only hook up the ones +* that are implemented on the current processor +*/ +SYSFS_PMCSETUP (mmcr0,SPRN_MMCR0 );SYSFS_PMCSETUP (mmcr1,SPRN_MMCR1 );SYSFS_PMCSETUP (mmcra,SPRN_MMCRA );
@@ -184,55 +189,87 @@ SYSFS_PMCSETUP(purr, SPRN_PURR);SYSFS_PMCSETUP (spurr,SPRN_SPURR );SYSFS_PMCSETUP (dscr,SPRN_DSCR ); -static SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0); -static SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1); +SYSFS_PMCSETUP (pa6t_pmc0,PA6T_SPRN_PMC0 ); +SYSFS_PMCSETUP (pa6t_pmc1,PA6T_SPRN_PMC1 ); +SYSFS_PMCSETUP (pa6t_pmc2,PA6T_SPRN_PMC2 ); +SYSFS_PMCSETUP (pa6t_pmc3,PA6T_SPRN_PMC3 ); +SYSFS_PMCSETUP (pa6t_pmc4,PA6T_SPRN_PMC4 ); +SYSFS_PMCSETUP (pa6t_pmc5,PA6T_SPRN_PMC5 ); + + static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra); -static SYSDEV_ATTR(pmc1, 0600, show_pmc1, store_pmc1); -static SYSDEV_ATTR(pmc2, 0600, show_pmc2, store_pmc2); -static SYSDEV_ATTR(pmc3, 0600, show_pmc3, store_pmc3); -static SYSDEV_ATTR(pmc4, 0600, show_pmc4, store_pmc4); -static SYSDEV_ATTR(pmc5, 0600, show_pmc5, store_pmc5); -static SYSDEV_ATTR(pmc6, 0600, show_pmc6, store_pmc6); -static SYSDEV_ATTR(pmc7, 0600, show_pmc7, store_pmc7); -static SYSDEV_ATTR(pmc8, 0600, show_pmc8, store_pmc8); -static SYSDEV_ATTR(purr, 0600, show_purr, NULL); static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL); static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr); +static SYSDEV_ATTR(purr, 0600, show_purr, store_purr); + +static struct sysdev_attribute ibm_common_attrs[] = { +_SYSDEV_ATTR (mmcr0,0600 , show_mmcr0, store_mmcr0), +_SYSDEV_ATTR (mmcr1,0600 , show_mmcr1, store_mmcr1), +}; + +static struct sysdev_attribute ibm_pmc_attrs[] = { +_SYSDEV_ATTR (pmc1,0600 , show_pmc1, store_pmc1), +_SYSDEV_ATTR (pmc2,0600 , show_pmc2, store_pmc2), +_SYSDEV_ATTR (pmc3,0600 , show_pmc3, store_pmc3), +_SYSDEV_ATTR (pmc4,0600 , show_pmc4, store_pmc4), +_SYSDEV_ATTR (pmc5,0600 , show_pmc5, store_pmc5), +_SYSDEV_ATTR (pmc6,0600 , show_pmc6, store_pmc6), +_SYSDEV_ATTR (pmc7,0600 , show_pmc7, store_pmc7), +_SYSDEV_ATTR (pmc8,0600 , show_pmc8, store_pmc8), +}; + +static struct sysdev_attribute pa6t_attrs[] = { +_SYSDEV_ATTR (mmcr0,0600 , show_mmcr0, store_mmcr0), +_SYSDEV_ATTR (mmcr1,0600 , show_mmcr1, store_mmcr1), +_SYSDEV_ATTR (pmc0,0600 , show_pa6t_pmc0, store_pa6t_pmc0), +_SYSDEV_ATTR (pmc1,0600 , show_pa6t_pmc1, store_pa6t_pmc1), +_SYSDEV_ATTR (pmc2,0600 , show_pa6t_pmc2, store_pa6t_pmc2), +_SYSDEV_ATTR (pmc3,0600 , show_pa6t_pmc3, store_pa6t_pmc3), +_SYSDEV_ATTR (pmc4,0600 , show_pa6t_pmc4, store_pa6t_pmc4), +_SYSDEV_ATTR (pmc5,0600 , show_pa6t_pmc5, store_pa6t_pmc5), +}; +static void register_cpu_online (unsigned int cpu) {struct cpu *c = &per_cpu (cpu_devices, cpu);struct sys_device *s = &c->sysdev; +struct sysdev_attribute *attrs, *pmc_attrs; +int i, nattrs;if (!firmware_has_feature (FW_FEATURE_ISERIES ) &&cpu_has_feature (CPU_FTR_SMT ))sysdev_create_file (s, &attr_smt_snooze_delay);/* PMC stuff */ +switch (cur_cpu_spec->pmc_type) { +case PPC_PMC_IBM : + attrs = ibm_common_attrs; + nattrs =sizeof (ibm_common_attrs) /sizeof (struct sysdev_attribute ); + pmc_attrs = ibm_pmc_attrs; +break ; +case PPC_PMC_PA6T : +/* PA Semi starts counting at PMC0 */ + attrs = pa6t_attrs; + nattrs =sizeof (pa6t_attrs) /sizeof (struct sysdev_attribute ); + pmc_attrs =NULL ; +break ; +default : + attrs =NULL ; + nattrs =0 ; + pmc_attrs =NULL ; + } -sysdev_create_file (s, &attr_mmcr0); -sysdev_create_file (s, &attr_mmcr1); +for (i =0 ; i < nattrs; i++) +sysdev_create_file (s, &attrs[i]); + +if (pmc_attrs) +for (i =0 ; i < cur_cpu_spec->num_pmcs; i++) +sysdev_create_file (s, &pmc_attrs[i]);if (cpu_has_feature (CPU_FTR_MMCRA ))sysdev_create_file (s, &attr_mmcra); -if (cur_cpu_spec->num_pmcs >=1 ) -sysdev_create_file (s, &attr_pmc1); -if (cur_cpu_spec->num_pmcs >=2 ) -sysdev_create_file (s, &attr_pmc2); -if (cur_cpu_spec->num_pmcs >=3 ) -sysdev_create_file (s, &attr_pmc3); -if (cur_cpu_spec->num_pmcs >=4 ) -sysdev_create_file (s, &attr_pmc4); -if (cur_cpu_spec->num_pmcs >=5 ) -sysdev_create_file (s, &attr_pmc5); -if (cur_cpu_spec->num_pmcs >=6 ) -sysdev_create_file (s, &attr_pmc6); -if (cur_cpu_spec->num_pmcs >=7 ) -sysdev_create_file (s, &attr_pmc7); -if (cur_cpu_spec->num_pmcs >=8 ) -sysdev_create_file (s, &attr_pmc8); -if (cpu_has_feature (CPU_FTR_PURR ))sysdev_create_file (s, &attr_purr);
@@ -248,6 +285,8 @@ static void unregister_cpu_online(unsign {struct cpu *c = &per_cpu (cpu_devices, cpu);struct sys_device *s = &c->sysdev; +struct sysdev_attribute *attrs, *pmc_attrs; +int i, nattrs;BUG_ON (!c->hotpluggable);
@@ -256,30 +295,34 @@ static void unregister_cpu_online(unsignsysdev_remove_file (s, &attr_smt_snooze_delay);/* PMC stuff */ +switch (cur_cpu_spec->pmc_type) { +case PPC_PMC_IBM : + attrs = ibm_common_attrs; + nattrs =sizeof (ibm_common_attrs) /sizeof (struct sysdev_attribute ); + pmc_attrs = ibm_pmc_attrs; +break ; +case PPC_PMC_PA6T : +/* PA Semi starts counting at PMC0 */ + attrs = pa6t_attrs; + nattrs =sizeof (pa6t_attrs) /sizeof (struct sysdev_attribute ); + pmc_attrs =NULL ; +break ; +default : + attrs =NULL ; + nattrs =0 ; + pmc_attrs =NULL ; + } -sysdev_remove_file (s, &attr_mmcr0); -sysdev_remove_file (s, &attr_mmcr1); +for (i =0 ; i < nattrs; i++) +sysdev_remove_file (s, &attrs[i]); + +if (pmc_attrs) +for (i =0 ; i < cur_cpu_spec->num_pmcs; i++) +sysdev_remove_file (s, &pmc_attrs[i]);if (cpu_has_feature (CPU_FTR_MMCRA ))sysdev_remove_file (s, &attr_mmcra); -if (cur_cpu_spec->num_pmcs >=1 ) -sysdev_remove_file (s, &attr_pmc1); -if (cur_cpu_spec->num_pmcs >=2 ) -sysdev_remove_file (s, &attr_pmc2); -if (cur_cpu_spec->num_pmcs >=3 ) -sysdev_remove_file (s, &attr_pmc3); -if (cur_cpu_spec->num_pmcs >=4 ) -sysdev_remove_file (s, &attr_pmc4); -if (cur_cpu_spec->num_pmcs >=5 ) -sysdev_remove_file (s, &attr_pmc5); -if (cur_cpu_spec->num_pmcs >=6 ) -sysdev_remove_file (s, &attr_pmc6); -if (cur_cpu_spec->num_pmcs >=7 ) -sysdev_remove_file (s, &attr_pmc7); -if (cur_cpu_spec->num_pmcs >=8 ) -sysdev_remove_file (s, &attr_pmc8); -if (cpu_has_feature (CPU_FTR_PURR ))sysdev_remove_file (s, &attr_purr);
include/asm-powerpc/reg.h +7 -0
@@ -462,6 +462,13 @@#define SPRN_SIAR 780#define SPRN_SDAR 781 +#define PA6T_SPRN_PMC0 787 +#define PA6T_SPRN_PMC1 788 +#define PA6T_SPRN_PMC2 789 +#define PA6T_SPRN_PMC3 790 +#define PA6T_SPRN_PMC4 791 +#define PA6T_SPRN_PMC5 792 +#else /* 32-bit */ #define SPRN_MMCR0 952/* Monitor Mode Control Register 0 */ #define MMCR0_FC 0x80000000UL/* freeze counters */
arch/powerpc/kernel/pmc.c +3 -1
@@ -17,6 +17,7 @@#include <linux/module.h> #include <asm/processor.h> +#include <asm/cputable.h> #include <asm/pmc.h> #ifndef MMCR0_PMA0
@@ -28,7 +29,8 @@ static void dummy_perf(struct pt_regs *r#if defined(CONFIG_FSL_BOOKE ) && !defined(CONFIG_E200 )mtpmr (PMRN_PMGC0 ,mfpmr (PMRN_PMGC0 ) & ~PMGC0_PMIE );#elif defined(CONFIG_PPC64 ) || defined(CONFIG_6xx) -mtspr (SPRN_MMCR0 ,mfspr (SPRN_MMCR0 ) & ~(MMCR0_PMXE |MMCR0_PMA0 )); +if (cur_cpu_spec->pmc_type ==PPC_PMC_IBM ) +mtspr (SPRN_MMCR0 ,mfspr (SPRN_MMCR0 ) & ~(MMCR0_PMXE |MMCR0_PMA0 ));#else mtspr (SPRN_MMCR0 ,mfspr (SPRN_MMCR0 ) & ~MMCR0_PMXE );#endif