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Tagged add/sub implementation

PATCH New Aurelien Jarno 1 participant 1 message Mar 23, 2007

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Aurelien Jarno

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PATCH 1/1 Tagged add/sub implementation

Hi all,

The patch below adds support for taddcc, taddcctv, tsubcc and tsubcctv that were treated as illegal instructions. With them, the SPARC V8 instruction set is now fully implemented.

Bye,
Aurelien

Index: target-sparc/cpu.h
===================================================================
RCS file: /sources/qemu/qemu/target-sparc/cpu.h,v
retrieving revision 1.27

cpu.h +2 -0
diff -u -r1.27 target-sparc/cpu.h
@@ -37,6 +37,7 @@
 #define TT_WIN_UNF  0x06 
 #define TT_FP_EXCP  0x08
 #define TT_DFAULT   0x09
+#define TT_TOVF     0x0a
 #define TT_EXTINT   0x10
 #define TT_DIV_ZERO 0x2a
 #define TT_TRAP     0x80

@@ -47,6 +48,7 @@
 #define TT_PRIV_INSN 0x11
 #define TT_NFPU_INSN 0x20
 #define TT_FP_EXCP  0x21
+#define TT_TOVF     0x23
 #define TT_CLRWIN   0x24
 #define TT_DIV_ZERO 0x28
 #define TT_DFAULT   0x30

Index: target-sparc/op.c
===================================================================
RCS file: /sources/qemu/qemu/target-sparc/op.c,v
retrieving revision 1.25

op.c +180 -0

192 lines not on this page · raw message

Index: target-sparc/translate.c
===================================================================
RCS file: /sources/qemu/qemu/target-sparc/translate.c,v retrieving revision 1.35

translate.c +12 -2
diff -u -r1.35 target-sparc/translate.c
@@ -27,7 +27,6 @@
    Optimize synthetic instructions
    Optional alignment check
    128-bit float
-   Tagged add/sub
 */
 
 #include <stdarg.h>

@@ -1833,10 +1832,21 @@
                 } else {
                     switch (xop) {
 		    case 0x20: /* taddcc */
+			gen_op_tadd_T1_T0_cc();
+		        gen_movl_T0_reg(rd);
+			break;
 		    case 0x21: /* tsubcc */
+			gen_op_tsub_T1_T0_cc();
+		        gen_movl_T0_reg(rd);
+			break;
 		    case 0x22: /* taddcctv */
+			gen_op_tadd_T1_T0_ccTV();
+		        gen_movl_T0_reg(rd);
+			break;
 		    case 0x23: /* tsubcctv */
-			goto illegal_insn;
+			gen_op_tsub_T1_T0_ccTV();
+		        gen_movl_T0_reg(rd);
+			break;
                     case 0x24: /* mulscc */
                         gen_op_mulscc_T1_T0();
                         gen_movl_T0_reg(rd);
Signature · 4 lines
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   [email protected]         | [email protected]
   `-    people.debian.org/~aurel32 | www.aurel32.net