Add memory, CPU, UART, I2C and SPR POST tests for PPC440.
PATCH 1/1 Add memory, CPU, UART, I2C and SPR POST tests for PPC440.
Add memory, CPU, UART, I2C and SPR POST tests for PPC440.
--
board/amcc/sequoia/sequoia.c +10 -0
@@ -586,3 +586,13 @@ int is_pci_host(struct pci_controller *hose) return (1); }#endif /* defined(CONFIG_PCI) */ +#if defined(CONFIG_POST ) +/* +* Returns 1 if keys pressed to start the power-on long-running tests +* Called from board_init_f(). +*/ +int post_hotkeys_pressed (void ) +{ +return 0 ;/* No hotkeys supported */ +} +#endif /* CONFIG_POST */
cpu/ppc4xx/cpu_init.c +2 -0
@@ -321,6 +321,8 @@ cpu_init_f (void) val =mfspr (tcr);#if defined(CONFIG_440EP ) || defined(CONFIG_440GR ) val |=0xb8000000 ;/* generate system reset after 1.34 seconds */ +#elif defined(CONFIG_440EPX ) + val |=0xb0000000 ;/* generate system reset after 1.34 seconds */ #else val |=0xf0000000 ;/* generate system reset after 2.684 seconds */ #endif
include/configs/sequoia.h +14 -1
@@ -57,6 +58,7 @@#define CFG_MONITOR_BASE TEXT_BASE#define CFG_NAND_ADDR 0xd0000000/* NAND Flash */ #define CFG_OCM_BASE 0xe0010000/* ocm */ +#define CFG_OCM_DATA_ADDR CFG_OCM_BASE#define CFG_PCI_BASE 0xe0000000/* Internal PCI regs */ #define CFG_PCI_MEMBASE 0x80000000/* mapped pci memory */ #define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
@@ -81,7 +83,7 @@#define CFG_INIT_RAM_END (4 << 10)#define CFG_GBL_DATA_SIZE 256/* num bytes initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR/*----------------------------------------------------------------------- * Serial Port
@@ -321,6 +323,18 @@ CFG_CMD_SDRAM | \ CMD_USB) +/* POST support */ +#define CONFIG_POST (CFG_POST_MEMORY | \ + CFG_POST_CPU | \ + CFG_POST_UART | \ + CFG_POST_I2C | \ + CFG_POST_SPR) + +#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4) +#define CONFIG_LOGBUFFER + +#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ +#define CONFIG_SUPPORT_VFAT /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
include/post.h +1 -0
@@ -91,6 +91,7 @@ extern int post_hotkeys_pressed(void);#define CFG_POST_SYSMON 0x00000800#define CFG_POST_DSP 0x00001000#define CFG_POST_CODEC 0x00002000 +#define CFG_POST_FPU 0x00004000#endif /* CONFIG_POST */
include/ppc440.h +26 -24
62 lines not on this page · raw message
post/lib_ppc/asm.S +12 -0
@@ -34,6 +34,7 @@ /* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */ .global cpu_post_exec_02 cpu_post_exec_02: + isync mflr r0 stwu r0, -4(r1)
@@ -56,6 +57,7 @@ cpu_post_exec_02: /* void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3, ulong op4); */ .global cpu_post_exec_04 cpu_post_exec_04: + isync mflr r0 stwu r0, -4(r1)
@@ -80,6 +82,7 @@ cpu_post_exec_04: /* void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); */ .global cpu_post_exec_12 cpu_post_exec_12: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -100,6 +103,7 @@ cpu_post_exec_12: /* void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); */ .global cpu_post_exec_11 cpu_post_exec_11: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -119,6 +123,7 @@ cpu_post_exec_11: /* void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); */ .global cpu_post_exec_21 cpu_post_exec_21: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -148,6 +153,7 @@ cpu_post_exec_21: ulong op2); */ .global cpu_post_exec_22 cpu_post_exec_22: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -177,6 +183,7 @@ cpu_post_exec_22: /* void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3); */ .global cpu_post_exec_12w cpu_post_exec_12w: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -198,6 +205,7 @@ cpu_post_exec_12w: /* void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2); */ .global cpu_post_exec_11w cpu_post_exec_11w: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -218,6 +226,7 @@ cpu_post_exec_11w: /* void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3); */ .global cpu_post_exec_22w cpu_post_exec_22w: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -241,6 +250,7 @@ cpu_post_exec_22w: /* void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2); */ .global cpu_post_exec_21w cpu_post_exec_21w: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -263,6 +273,7 @@ cpu_post_exec_21w: /* void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3); */ .global cpu_post_exec_21x cpu_post_exec_21x: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
@@ -286,6 +297,7 @@ cpu_post_exec_21x: ulong cr); */ .global cpu_post_exec_31 cpu_post_exec_31: + isync mflr r0 stwu r0, -4(r1) stwu r4, -4(r1)
post/lib_ppc/b.c +4 -4
@@ -49,7 +49,7 @@ extern void cpu_post_exec_31 (ulong *code, ulong *ctr, ulong *lr, ulong *jump, ulong cr);static int cpu_post_test_bc (ulong cmd,ulong bo,ulong bi, -int pjump,int dec,int link,ulong pctr,ulong cr) +int pjump,int decr,int link,ulong pctr,ulong cr) {int ret =0 ;ulong lr =0 ;
@@ -77,7 +77,7 @@ static int cpu_post_test_bc (ulong cmd, ulong bo, ulong bi, ret = pjump == jump ?0 :-1 ;if (ret ==0 ) { -if (dec) +if (decr) ret = pctr == ctr +1 ?0 :-1 ;else ret = pctr == ctr ?0 :-1 ;
@@ -163,7 +163,7 @@ int cpu_post_test_b (void) {for (ctr =1 ; ctr <=2 && ret ==0 ; ctr++) { -int dec = cd <2 ; +int decr = cd <2 ;int cr = cond ?0x80000000 :0x00000000 ;int jumpc = cc >=2 || (cc == 0 && !cond) ||
@@ -174,7 +174,7 @@ int cpu_post_test_b (void)int jump = jumpc && jumpd; ret =cpu_post_test_bc (link ?OP_BCL :OP_BC , - (cc <<3 ) + (cd <<1 ),0 , jump, dec, link, + (cc <<3 ) + (cd <<1 ),0 , jump, decr, link, ctr, cr);if (ret !=0 )
post/post.c +1 -1
@@ -428,7 +428,7 @@ void post_reloc (void)unsigned long post_time_ms (unsigned long base) {#ifdef CONFIG_PPC -return (unsigned long )get_ticks () / (get_tbclk () /CFG_HZ ) - base; +return (unsigned long )(get_ticks () / (get_tbclk () /CFG_HZ )) - base;#else #warning "Not implemented yet"return 0 ;/* Not implemented yet */
post/tests.c +14 -0
@@ -37,6 +37,7 @@ extern int i2c_post_test (int flags);extern int rtc_post_test (int flags);extern int memory_post_test (int flags);extern int cpu_post_test (int flags); +extern int fpu_post_test (int flags);extern int uart_post_test (int flags);extern int ether_post_test (int flags);extern int spi_post_test (int flags);
@@ -126,6 +127,19 @@ struct post_test post_list[] = CFG_POST_CPU },#endif +#if CONFIG_POST &CFG_POST_FPU + { +"FPU test" , +"fpu" , +"This test verifies the arithmetic logic unit of" +" FPU." , +POST_RAM |POST_ALWAYS , + &fpu_post_test, +NULL , +NULL , +CFG_POST_FPU + }, +#endif #if CONFIG_POST & CFG_POST_UART { "UART test",
PATCH 1/1 Add memory, CPU, UART, I2C and SPR POST tests for PPC440.
Hi Igor,
Quoted 5 lines · Wolfgang Denk
Add memory, CPU, UART, I2C and SPR POST tests for PPC440.
Signed-off-by Igor Lisitsin <[email protected]>Acked-by Wolfgang Denk <[email protected]>
After adding your patch I get this error upon compiling U-Boot for Sequoia:
stefan at ubuntu:~/git/u-boot/u-boot-ppc4xx$ make -s post/libpost.a(tests.o):(.data.rel+0x70): undefined reference to uart_post_test' post/libpost.a(tests.o):(.data.rel+0x90): undefined reference to spr_post_test'
Could you please fix this issue and resubmit?
Thanks.
Best regards,
Stefan
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