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skge and sky2 patches

PATCH New Stephen Hemminger 1 participant 5 messages Apr 7, 2007

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Stephen Hemminger

author
#0 lore raw

cover skge and sky2 patches

These match the recent patches submitted for 2.6.21

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author
#1 lore raw

PATCH 1/4 skge: turn carrier off when down

Driver needs to turn off carrier when down, otherwise it can confuse bonding and bridging and looks like carrier is on immediately when it is brought back up.

Signed-off-by Stephen Hemminger <[email protected]>
drivers/net/skge.c +1 -0
@@ -2462,6 +2462,7 @@
 		printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
 
 	netif_stop_queue(dev);
+	netif_carrier_off(dev);
 	if (hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC)
 		cancel_rearming_delayed_work(&skge->link_thread);

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author
#3 lore raw

PATCH 3/4 sky2: turn on clocks when doing resume

In reply to Stephen Hemminger

Some of these chips are disabled until clock is enabled. This fixes:

     http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=404107
Signed-off-by Stephen Hemminger <[email protected]>
drivers/net/sky2.c +7 -0
@@ -2437,6 +2437,10 @@
 		return -EOPNOTSUPP;
 	}
 
+	/* Make sure and enable all clocks */
+	if (hw->chip_id == CHIP_ID_YUKON_EC_U)
+		sky2_pci_write32(hw, PCI_DEV_REG3, 0);
+
 	hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
 
 	/* This rev is really old, and requires untested workarounds */

@@ -3610,6 +3614,9 @@
 
 	pci_restore_state(pdev);
 	pci_enable_wake(pdev, PCI_D0, 0);
+
+	if (hw->chip_id == CHIP_ID_YUKON_EC_U)
+		sky2_pci_write32(hw, PCI_DEV_REG3, 0);
 	sky2_set_power_state(hw, PCI_D0);
 
 	err = sky2_reset(hw);

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author
#4 lore raw

PATCH 4/4 sky2: phy workarounds for Yukon EC-U A1

In reply to Stephen Hemminger

The workaround Yukon EC-U wasn't comparing with correct version and wasn't doing correct setup. Without it, 88e8056 throws all sorts of errors.

Signed-off-by Stephen Hemminger <[email protected]>
drivers/net/sky2.c +3 -3
@@ -524,9 +524,9 @@
 		ledover &= ~PHY_M_LED_MO_RX;
 	}
 
-	if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == CHIP_REV_YU_EC_A1) {
+	if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
+	    hw->chip_rev == CHIP_REV_YU_EC_U_A1) {
 		/* apply fixes in PHY AFE */
-		pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
 		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
 
 		/* increase differential signal amplitude in 10BASE-T */

@@ -538,7 +538,7 @@
 		gm_phy_write(hw, port, 0x17, 0x2002);
 
 		/* set page register to 0 */
-		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
+		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
 	} else {
 		gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);

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