RFC: Assorted arch/powerpc mm related cleanups

PATCH In review David Gibson 1 participant 9 messages May 10, 2007 – May 11, 2007

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David Gibson

author

2007-05-10 06:04 UTC #0 lore raw

cover RFC: Assorted arch/powerpc mm related cleanups

Here is a series of patches I'm working on which follow on from my recent patches splitting up mmu.h and pgtable.h. These are a bunch of cleanups to the arch/powerpc mm headers and (in some cases) code.

They haven't been tested beyond compiling for a small number of configs yet, and I wouldn't be expecting to merge them into mainline until 2.6.23, but for anyone who's interested, here they are.

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David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

David Gibson

author

2007-05-10 06:05 UTC #1 lore raw

PATCH 1/7 Remove fixup_bigphys_addr() for arch/powerpc

There are no actual implementations of fixup_bigphys_addr() in arch/powerpc, and with a 64-bit aware ioremap() and so forth, it should no longer be necessary. This patch removes the last dregs of fixup_bigphys_addr() from arch/powerpc.

Signed-off-by David Gibson <[email protected]>

---

 include/asm-powerpc/mmu-44x.h       |    2 --
 include/asm-powerpc/pgtable-ppc32.h |   15 ---------------
 2 files changed, 17 deletions(-)

include/asm-powerpc/mmu-44x.h +0 -2

Index: working-2.6/include/asm-powerpc/mmu-44x.h
===================================================================
@@ -55,8 +55,6 @@
 
 typedef unsigned long long phys_addr_t;
 
-extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
-
 typedef struct {
 	unsigned long id;
 	unsigned long vdso_base;

include/asm-powerpc/pgtable-ppc32.h +0 ~~-15~~

Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
@@ -782,23 +782,8 @@ extern void kernel_set_cachemode (unsign
 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
 #define kern_addr_valid(addr)	(1)
 
-#ifdef CONFIG_PHYS_64BIT
-extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
-			unsigned long paddr, unsigned long size, pgprot_t prot);
-
-static inline int io_remap_pfn_range(struct vm_area_struct *vma,
-					unsigned long vaddr,
-					unsigned long pfn,
-					unsigned long size,
-					pgprot_t prot)
-{
-	phys_addr_t paddr64 = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
-	return remap_pfn_range(vma, vaddr, paddr64 >> PAGE_SHIFT, size, prot);
-}
-#else
 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
 		remap_pfn_range(vma, vaddr, pfn, size, prot)
-#endif
 
 /*
  * No page table caches to initialise

David Gibson

author

2007-05-10 06:05 UTC #2 lore raw

PATCH 2/7 Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU

In reply to David Gibson

arch/powerpc still relies on asm-ppc/mmu.h for most 32-bit MMU types. This patch is another step towards fixing this. It takes the portions of asm-ppc/mmu.h related to the "classic" 32-bit hash page table MMU which are still relevant in arch/powerpc and puts them in a new asm-powerpc/mmu-hash32.h, included when appropriate from asm-powerpc/mmu.h.

Signed-off-by David Gibson <[email protected]>

---

 include/asm-powerpc/mmu-hash32.h |   91 +++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/mmu.h        |    3 +
 2 files changed, 94 insertions(+)

include/asm-powerpc/mmu-hash32.h new file +91 -0

Index: working-2.6/include/asm-powerpc/mmu-hash32.h
===================================================================
@@ -0,0 +1,91 @@
+#ifndef _ASM_POWERPC_MMU_HASH32_H_
+#define _ASM_POWERPC_MMU_HASH32_H_
+/*
+ * 32-bit hash table MMU support
+ */
+
+/*
+ * BATs
+ */
+
+/* Block size masks */
+#define BL_128K	0x000
+#define BL_256K 0x001
+#define BL_512K 0x003
+#define BL_1M   0x007
+#define BL_2M   0x00F
+#define BL_4M   0x01F
+#define BL_8M   0x03F
+#define BL_16M  0x07F
+#define BL_32M  0x0FF
+#define BL_64M  0x1FF
+#define BL_128M 0x3FF
+#define BL_256M 0x7FF
+
+/* BAT Access Protection */
+#define BPP_XX	0x00		/* No access */
+#define BPP_RX	0x01		/* Read only */
+#define BPP_RW	0x02		/* Read/write */
+
+#ifndef __ASSEMBLY__
+typedef struct _BAT {
+	struct {
+		unsigned long bepi:15;	/* Effective page index (virtual address) */
+		unsigned long :4;	/* Unused */
+		unsigned long bl:11;	/* Block size mask */
+		unsigned long vs:1;	/* Supervisor valid */
+		unsigned long vp:1;	/* User valid */
+	} batu; 		/* Upper register */
+	struct {
+		unsigned long brpn:15;	/* Real page index (physical address) */
+		unsigned long :10;	/* Unused */
+		unsigned long w:1;	/* Write-thru cache */
+		unsigned long i:1;	/* Cache inhibit */
+		unsigned long m:1;	/* Memory coherence */
+		unsigned long g:1;	/* Guarded (MBZ in IBAT) */
+		unsigned long :1;	/* Unused */
+		unsigned long pp:2;	/* Page access protections */
+	} batl;			/* Lower register */
+} BAT;
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * Hash table
+ */
+
+/* Values for PP (assumes Ks=0, Kp=1) */
+#define PP_RWXX	0	/* Supervisor read/write, User none */
+#define PP_RWRX 1	/* Supervisor read/write, User read */
+#define PP_RWRW 2	/* Supervisor read/write, User read/write */
+#define PP_RXRX 3	/* Supervisor read,       User read */
+
+#ifndef __ASSEMBLY__
+
+/* Hardware Page Table Entry */
+typedef struct _PTE {
+	unsigned long v:1;	/* Entry is valid */
+	unsigned long vsid:24;	/* Virtual segment identifier */
+	unsigned long h:1;	/* Hash algorithm indicator */
+	unsigned long api:6;	/* Abbreviated page index */
+	unsigned long rpn:20;	/* Real (physical) page number */
+	unsigned long    :3;	/* Unused */
+	unsigned long r:1;	/* Referenced */
+	unsigned long c:1;	/* Changed */
+	unsigned long w:1;	/* Write-thru cache mode */
+	unsigned long i:1;	/* Cache inhibited */
+	unsigned long m:1;	/* Memory coherence */
+	unsigned long g:1;	/* Guarded */
+	unsigned long  :1;	/* Unused */
+	unsigned long pp:2;	/* Page protection */
+} PTE;
+
+typedef struct {
+	unsigned long id;
+	unsigned long vdso_base;
+} mm_context_t;
+
+typedef unsigned long phys_addr_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_POWERPC_MMU_HASH32_H_ */

include/asm-powerpc/mmu.h +3 -0

Index: working-2.6/include/asm-powerpc/mmu.h
===================================================================
@@ -5,6 +5,9 @@
 #ifdef CONFIG_PPC64
 /* 64-bit classic hash table MMU */
 #  include <asm/mmu-hash64.h>
+#elif defined(CONFIG_PPC_STD_MMU)
+/* 32-bit classic hash table MMU */
+#  include <asm/mmu-hash32.h>
 #elif defined(CONFIG_44x)
 /* 44x-style software loaded TLB */
 #  include <asm/mmu-44x.h>

David Gibson

author

2007-05-10 06:05 UTC #3 lore raw

PATCH 3/7 Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpc

In reply to David Gibson

These old-fashioned IO mapping functions no longer have any callers in code which remains relevant on arch/powerpc. Therefore, this patch removes them from arch/powerpc.

Signed-off-by David Gibson <[email protected]>

---

 arch/powerpc/mm/pgtable_32.c        |  118 ------------------------------------
 include/asm-powerpc/io.h            |    7 --
 include/asm-powerpc/pgtable-ppc32.h |    2 
 3 files changed, 127 deletions(-)

arch/powerpc/mm/pgtable_32.c +0 ~~-118~~

Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
@@ -303,48 +303,6 @@ void __init mapin_ram(void)
 /* is x a power of 4? */
 #define is_power_of_4(x)	is_power_of_2(x) && (ffs(x) & 1)
 
-/*
- * Set up a mapping for a block of I/O.
- * virt, phys, size must all be page-aligned.
- * This should only be called before ioremap is called.
- */
-void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
-			     unsigned int size, int flags)
-{
-	int i;
-
-	if (virt > KERNELBASE && virt < ioremap_bot)
-		ioremap_bot = ioremap_base = virt;
-
-#ifdef HAVE_BATS
-	/*
-	 * Use a BAT for this if possible...
-	 */
-	if (io_bat_index < 2 && is_power_of_2(size)
-	    && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
-		setbat(io_bat_index, virt, phys, size, flags);
-		++io_bat_index;
-		return;
-	}
-#endif /* HAVE_BATS */
-
-#ifdef HAVE_TLBCAM
-	/*
-	 * Use a CAM for this if possible...
-	 */
-	if (tlbcam_index < num_tlbcam_entries && is_power_of_4(size)
-	    && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
-		settlbcam(tlbcam_index, virt, phys, size, flags, 0);
-		++tlbcam_index;
-		return;
-	}
-#endif /* HAVE_TLBCAM */
-
-	/* No BATs available, put it in the page tables. */
-	for (i = 0; i < size; i += PAGE_SIZE)
-		map_page(virt + i, phys + i, flags);
-}
-
 /* Scan the real Linux page tables and return a PTE pointer for
  * a virtual address in a context.
  * Returns true (1) if PTE was found, zero otherwise.  The pointer to

@@ -379,82 +337,6 @@ get_pteptr(struct mm_struct *mm, unsigne
         return(retval);
 }
 
-/* Find physical address for this virtual address.  Normally used by
- * I/O functions, but anyone can call it.
- */
-unsigned long iopa(unsigned long addr)
-{
-	unsigned long pa;
-
-	/* I don't know why this won't work on PMacs or CHRP.  It
-	 * appears there is some bug, or there is some implicit
-	 * mapping done not properly represented by BATs or in page
-	 * tables.......I am actively working on resolving this, but
-	 * can't hold up other stuff.  -- Dan
-	 */
-	pte_t *pte;
-	struct mm_struct *mm;
-
-	/* Check the BATs */
-	pa = v_mapped_by_bats(addr);
-	if (pa)
-		return pa;
-
-	/* Allow mapping of user addresses (within the thread)
-	 * for DMA if necessary.
-	 */
-	if (addr < TASK_SIZE)
-		mm = current->mm;
-	else
-		mm = &init_mm;
-
-	pa = 0;
-	if (get_pteptr(mm, addr, &pte, NULL)) {
-		pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK);
-		pte_unmap(pte);
-	}
-
-	return(pa);
-}
-
-/* This is will find the virtual address for a physical one....
- * Swiped from APUS, could be dangerous :-).
- * This is only a placeholder until I really find a way to make this
- * work.  -- Dan
- */
-unsigned long
-mm_ptov (unsigned long paddr)
-{
-	unsigned long ret;
-#if 0
-	if (paddr < 16*1024*1024)
-		ret = ZTWO_VADDR(paddr);
-	else {
-		int i;
-
-		for (i = 0; i < kmap_chunk_count;){
-			unsigned long phys = kmap_chunks[i++];
-			unsigned long size = kmap_chunks[i++];
-			unsigned long virt = kmap_chunks[i++];
-			if (paddr >= phys
-			    && paddr < (phys + size)){
-				ret = virt + paddr - phys;
-				goto exit;
-			}
-		}
-	
-		ret = (unsigned long) __va(paddr);
-	}
-exit:
-#ifdef DEBUGPV
-	printk ("PTOV(%lx)=%lx\n", paddr, ret);
-#endif
-#else
-	ret = (unsigned long)paddr + KERNELBASE;
-#endif
-	return ret;
-}
-
 #ifdef CONFIG_DEBUG_PAGEALLOC
 
 static int __change_page_attr(struct page *page, pgprot_t prot)

include/asm-powerpc/io.h +0 -7

Index: working-2.6/include/asm-powerpc/io.h
===================================================================
@@ -636,13 +636,6 @@ extern int __iounmap_explicit(volatile v
 
 extern void __iomem * reserve_phb_iospace(unsigned long size);
 
-/* Those are more 32 bits only functions */
-extern unsigned long iopa(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
-extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
-			     unsigned int size, int flags);
-
-
 /*
  * When CONFIG_PPC_INDIRECT_IO is set, we use the generic iomap implementation
  * which needs some additional definitions here. They basically allow PIO

include/asm-powerpc/pgtable-ppc32.h +0 -2

Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
@@ -756,8 +756,6 @@ extern void paging_init(void);
 extern void cache_clear(__u32 addr, int length);
 extern void cache_push(__u32 addr, int length);
 extern int mm_end_of_chunk (unsigned long addr, int len);
-extern unsigned long iopa(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
 
 /* Values for nocacheflag and cmode */
 /* These are not used by the APUS kernel_map, but prevents

David Gibson

author

2007-05-10 06:05 UTC #4 lore raw

PATCH 4/7 Remove the dregs of APUS support from arch/powerpc

In reply to David Gibson

APUS (the Amiga Power-Up System) is not supported under arch/powerpc and it's unlikely it ever will be. Therefore, this patch removes the fragments of APUS support code from arch/powerpc which have been copied from arch/ppc.

A few APUS references are left in asm-powerpc in .h files which are still used from arch/ppc.

Signed-off-by David Gibson <[email protected]>

---

 arch/powerpc/Kconfig                |    4 -
 arch/powerpc/kernel/head_32.S       |  122 ---------------------------------
 arch/powerpc/kernel/irq.c           |    1 
 arch/powerpc/mm/44x_mmu.c           |    1 
 arch/powerpc/mm/4xx_mmu.c           |    1 
 arch/powerpc/mm/fsl_booke_mmu.c     |    1 
 arch/powerpc/mm/init_32.c           |    1 
 arch/powerpc/mm/init_64.c           |    1 
 arch/powerpc/mm/mem.c               |    1 
 arch/powerpc/mm/mmu_context_32.c    |    1 
 arch/powerpc/mm/mmu_decl.h          |    1 
 arch/powerpc/mm/pgtable_32.c        |    1 
 arch/powerpc/mm/pgtable_64.c        |    1 
 arch/powerpc/mm/ppc_mmu_32.c        |    1 
 arch/powerpc/mm/tlb_32.c            |    1 
 arch/powerpc/mm/tlb_64.c            |    1 
 arch/powerpc/platforms/Kconfig      |    7 -
 arch/powerpc/platforms/apus/Kconfig |  130 ------------------------------------
 include/asm-powerpc/pgtable-ppc32.h |   26 -------
 19 files changed, 5 insertions(+), 298 deletions(-)

include/asm-powerpc/pgtable-ppc32.h +0 ~~-26~~

Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
@@ -751,32 +751,6 @@ extern void paging_init(void);
 #define pte_to_pgoff(pte)	(pte_val(pte) >> 3)
 #define pgoff_to_pte(off)	((pte_t) { ((off) << 3) | _PAGE_FILE })
 
-/* CONFIG_APUS */
-/* For virtual address to physical address conversion */
-extern void cache_clear(__u32 addr, int length);
-extern void cache_push(__u32 addr, int length);
-extern int mm_end_of_chunk (unsigned long addr, int len);
-
-/* Values for nocacheflag and cmode */
-/* These are not used by the APUS kernel_map, but prevents
-   compilation errors. */
-#define	KERNELMAP_FULL_CACHING		0
-#define	KERNELMAP_NOCACHE_SER		1
-#define	KERNELMAP_NOCACHE_NONSER	2
-#define	KERNELMAP_NO_COPYBACK		3
-
-/*
- * Map some physical address range into the kernel address space.
- */
-extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
-				int nocacheflag, unsigned long *memavailp );
-
-/*
- * Set cache mode of (kernel space) address range.
- */
-extern void kernel_set_cachemode (unsigned long address, unsigned long size,
-                                 unsigned int cmode);
-
 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
 #define kern_addr_valid(addr)	(1)

arch/powerpc/Kconfig +2 -2

Index: working-2.6/arch/powerpc/Kconfig
===================================================================
@@ -682,9 +682,9 @@ config PCI
 	bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
 		|| PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
 		|| MPC7448HPC2 || PPC_PS3 || PPC_HOLLY
-	default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx \
+	default y if !40x && !CPM2 && !8xx && !PPC_83xx \
 		&& !PPC_85xx && !PPC_86xx
-	default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
+	default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
 	default PCI_QSPAN if !4xx && !CPM2 && 8xx
 	select ARCH_SUPPORTS_MSI
 	help

arch/powerpc/kernel/head_32.S +3 ~~-119~~

195 lines not on this page · raw message

arch/powerpc/kernel/irq.c +0 -1

Index: working-2.6/arch/powerpc/kernel/irq.c
===================================================================
@@ -7,7 +7,6 @@
  *    Copyright (C) 1996-2001 Cort Dougan
  *  Adapted for Power Macintosh by Paul Mackerras
  *    Copyright (C) 1996 Paul Mackerras ([email protected])
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License

arch/powerpc/mm/44x_mmu.c +0 -1

Index: working-2.6/arch/powerpc/mm/44x_mmu.c
===================================================================
@@ -12,7 +12,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/4xx_mmu.c +0 -1

Index: working-2.6/arch/powerpc/mm/4xx_mmu.c
===================================================================
@@ -9,7 +9,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/fsl_booke_mmu.c +0 -1

Index: working-2.6/arch/powerpc/mm/fsl_booke_mmu.c
===================================================================
@@ -14,7 +14,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/init_32.c +0 -1

Index: working-2.6/arch/powerpc/mm/init_32.c
===================================================================
@@ -5,7 +5,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *  PPC44x/36-bit changes by Matt Porter ([email protected])
  *
  *  Derived from "arch/i386/mm/init.c"

arch/powerpc/mm/init_64.c +0 -1

Index: working-2.6/arch/powerpc/mm/init_64.c
===================================================================
@@ -5,7 +5,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/mem.c +0 -1

Index: working-2.6/arch/powerpc/mm/mem.c
===================================================================
@@ -5,7 +5,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *  PPC44x/36-bit changes by Matt Porter ([email protected])
  *
  *  Derived from "arch/i386/mm/init.c"

arch/powerpc/mm/mmu_context_32.c +0 -1

Index: working-2.6/arch/powerpc/mm/mmu_context_32.c
===================================================================
@@ -11,7 +11,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/mmu_decl.h +0 -1

Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
@@ -8,7 +8,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/pgtable_64.c +0 -1

Index: working-2.6/arch/powerpc/mm/pgtable_64.c
===================================================================
@@ -7,7 +7,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/ppc_mmu_32.c +0 -1

Index: working-2.6/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
@@ -11,7 +11,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/tlb_32.c +0 -1

Index: working-2.6/arch/powerpc/mm/tlb_32.c
===================================================================
@@ -11,7 +11,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/mm/tlb_64.c +0 -1

Index: working-2.6/arch/powerpc/mm/tlb_64.c
===================================================================
@@ -8,7 +8,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

arch/powerpc/platforms/Kconfig +0 -7

Index: working-2.6/arch/powerpc/platforms/Kconfig
===================================================================
@@ -16,13 +16,6 @@ config EMBEDDED6xx
 	bool "Embedded 6xx/7xx/7xxx-based board"
 	depends on PPC32 && (BROKEN||BROKEN_ON_SMP)
 
-config APUS
-	bool "Amiga-APUS"
-	depends on PPC32 && BROKEN
-	help
-	  Select APUS if configuring for a PowerUP Amiga.
-	  More information is available at:
-	  <http://linux-apus.sourceforge.net/>.
 endchoice
 
 source "arch/powerpc/platforms/pseries/Kconfig"

arch/powerpc/platforms/apus/Kconfig deleted +0 ~~-130~~

130 lines not on this page · raw message

arch/powerpc/mm/pgtable_32.c +0 -1

Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
@@ -8,7 +8,6 @@
  *  Modifications by Paul Mackerras (PowerMac) ([email protected])
  *  and Cort Dougan (PReP) ([email protected])
  *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov ([email protected]).
  *
  *  Derived from "arch/i386/mm/init.c"
  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds

David Gibson

author

2007-05-10 06:05 UTC #5 lore raw

PATCH 5/7 Remove a couple of unused definitions from pgtable_32.c

In reply to David Gibson

In arch/powerpc/mm/pgtable_32.c, the varialbe io_bat_index and the macro is_power_of_4() no longer have any users. This patch removes them.

Signed-off-by David Gibson <[email protected]>

---

 arch/powerpc/mm/pgtable_32.c |    4 ----
 1 file changed, 4 deletions(-)

arch/powerpc/mm/pgtable_32.c +0 -4

Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
@@ -36,7 +36,6 @@
 unsigned long ioremap_base;
 unsigned long ioremap_bot;
 EXPORT_SYMBOL(ioremap_bot);	/* aka VMALLOC_END */
-int io_bat_index;
 
 #if defined(CONFIG_6xx) || defined(CONFIG_POWER3)
 #define HAVE_BATS	1

@@ -299,9 +298,6 @@ void __init mapin_ram(void)
 	}
 }
 
-/* is x a power of 4? */
-#define is_power_of_4(x)	is_power_of_2(x) && (ffs(x) & 1)
-
 /* Scan the real Linux page tables and return a PTE pointer for
  * a virtual address in a context.
  * Returns true (1) if PTE was found, zero otherwise.  The pointer to

David Gibson

author

2007-05-10 06:05 UTC #6 lore raw

PATCH 6/7 Start factoring pgtable-ppc32.h and pgtable-ppc64.h

In reply to David Gibson

This patch factors some things defined in both pgtable-ppc32.h and pgtable-ppc64.h into the common part of asm-powerpc/pgtable.h. These are all things which have essentially identical definitions, and which by their nature are very unlikely ever to need different definitions in the two cases.

Signed-off-by David Gibson <[email protected]>

---

 include/asm-powerpc/pgtable-ppc32.h |   18 ------------------
 include/asm-powerpc/pgtable-ppc64.h |   25 -------------------------
 include/asm-powerpc/pgtable.h       |   21 +++++++++++++++++++++
 3 files changed, 21 insertions(+), 43 deletions(-)

include/asm-powerpc/pgtable-ppc32.h +0 ~~-18~~

Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
@@ -488,14 +488,6 @@ extern unsigned long bad_call_to_PMD_PAG
 #define pfn_pte(pfn, prot)	__pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\
 					pgprot_val(prot))
 #define mk_pte(page, prot)	pfn_pte(page_to_pfn(page), prot)
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[1024];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-
 #endif /* __ASSEMBLY__ */
 
 #define pte_none(pte)		((pte_val(pte) & ~_PTE_NONE_MASK) == 0)

@@ -730,10 +722,6 @@ extern pgprot_t phys_mem_access_prot(str
 #define pte_unmap(pte)		kunmap_atomic(pte, KM_PTE0)
 #define pte_unmap_nested(pte)	kunmap_atomic(pte, KM_PTE1)
 
-extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
-
-extern void paging_init(void);
-
 /*
  * Encode and decode a swap entry.
  * Note that the bits we use in a PTE for representing a swap entry

@@ -751,12 +739,6 @@ extern void paging_init(void);
 #define pte_to_pgoff(pte)	(pte_val(pte) >> 3)
 #define pgoff_to_pte(off)	((pte_t) { ((off) << 3) | _PAGE_FILE })
 
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
-#define kern_addr_valid(addr)	(1)
-
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
-		remap_pfn_range(vma, vaddr, pfn, size, prot)
-
 /*
  * No page table caches to initialise
  */

include/asm-powerpc/pgtable-ppc64.h +0 ~~-25~~

Index: working-2.6/include/asm-powerpc/pgtable-ppc64.h
===================================================================
@@ -134,16 +134,6 @@ struct mm_struct;
 #define __S110	PAGE_SHARED_X
 #define __S111	PAGE_SHARED_X
 
-#ifndef __ASSEMBLY__
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-#endif /* __ASSEMBLY__ */
-
 #ifdef CONFIG_HUGETLB_PAGE
 
 #define HAVE_ARCH_UNMAPPED_AREA

@@ -438,10 +428,6 @@ extern pgprot_t phys_mem_access_prot(str
 #define pgd_ERROR(e) \
 	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
 
-extern pgd_t swapper_pg_dir[];
-
-extern void paging_init(void);
-
 /* Encode and de-code a swap entry */
 #define __swp_type(entry)	(((entry).val >> 1) & 0x3f)
 #define __swp_offset(entry)	((entry).val >> 8)

@@ -452,17 +438,6 @@ extern void paging_init(void);
 #define pgoff_to_pte(off)	((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
 #define PTE_FILE_MAX_BITS	(BITS_PER_LONG - PTE_RPN_SHIFT)
 
-/*
- * kern_addr_valid is intended to indicate whether an address is a valid
- * kernel address.  Most 32-bit archs define it as always true (like this)
- * but most 64-bit archs actually perform a test.  What should we do here?
- * The only use is in fs/ncpfs/dir.c
- */
-#define kern_addr_valid(addr)	(1)
-
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
-		remap_pfn_range(vma, vaddr, pfn, size, prot)
-
 void pgtable_cache_init(void);
 
 /*

include/asm-powerpc/pgtable.h +21 -0

Index: working-2.6/include/asm-powerpc/pgtable.h
===================================================================
@@ -9,6 +9,27 @@
 #endif
 
 #ifndef __ASSEMBLY__
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+extern unsigned long empty_zero_page[];
+#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+
+extern pgd_t swapper_pg_dir[];
+
+extern void paging_init(void);
+
+/*
+ * kern_addr_valid is intended to indicate whether an address is a valid
+ * kernel address.  Most 32-bit archs define it as always true (like this)
+ * but most 64-bit archs actually perform a test.  What should we do here?
+ */
+#define kern_addr_valid(addr)	(1)
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
+		remap_pfn_range(vma, vaddr, pfn, size, prot)
+
 #include <asm-generic/pgtable.h>
 #endif /* __ASSEMBLY__ */

David Gibson

author

2007-05-10 06:05 UTC #7 lore raw

PATCH 7/7 Kill typedef-ed structs for hash PTEs and BATs

In reply to David Gibson

Using typedefs to rename structure types if frowned on by CodingStyle. However, we do so for the hash PTE structure on both ppc32 (where it's called "PTE") and ppc64 (where it's called "hpte_t"). On ppc32 we also have such a typedef for the BATs ("BAT").

This patch removes this unhelpful use of typedefs, in the process bringing ppc32 and ppc64 closer together, by using the name "struct hash_pte" in both cases.

Signed-off-by David Gibson <[email protected]>

---

 arch/powerpc/mm/hash_native_64.c  |   22 +++++++++++-----------
 arch/powerpc/mm/hash_utils_64.c   |    2 +-
 arch/powerpc/mm/mmu_decl.h        |    4 ++--
 arch/powerpc/mm/ppc_mmu_32.c      |    6 +++---
 arch/powerpc/platforms/ps3/htab.c |   14 +++++++-------
 include/asm-powerpc/mmu-hash32.h  |    8 ++++----
 include/asm-powerpc/mmu-hash64.h  |    6 +++---
 7 files changed, 31 insertions(+), 31 deletions(-)

include/asm-powerpc/mmu-hash32.h +4 -4

Index: working-2.6/include/asm-powerpc/mmu-hash32.h
===================================================================
@@ -28,7 +28,7 @@
 #define BPP_RW	0x02		/* Read/write */
 
 #ifndef __ASSEMBLY__
-typedef struct _BAT {
+struct ppc_bat {
 	struct {
 		unsigned long bepi:15;	/* Effective page index (virtual address) */
 		unsigned long :4;	/* Unused */

@@ -46,7 +46,7 @@ typedef struct _BAT {
 		unsigned long :1;	/* Unused */
 		unsigned long pp:2;	/* Page access protections */
 	} batl;			/* Lower register */
-} BAT;
+};
 #endif /* !__ASSEMBLY__ */
 
 /*

@@ -62,7 +62,7 @@ typedef struct _BAT {
 #ifndef __ASSEMBLY__
 
 /* Hardware Page Table Entry */
-typedef struct _PTE {
+struct hash_pte {
 	unsigned long v:1;	/* Entry is valid */
 	unsigned long vsid:24;	/* Virtual segment identifier */
 	unsigned long h:1;	/* Hash algorithm indicator */

@@ -77,7 +77,7 @@ typedef struct _PTE {
 	unsigned long g:1;	/* Guarded */
 	unsigned long  :1;	/* Unused */
 	unsigned long pp:2;	/* Page protection */
-} PTE;
+};
 
 typedef struct {
 	unsigned long id;

arch/powerpc/mm/ppc_mmu_32.c +3 -3

Index: working-2.6/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
@@ -34,12 +34,12 @@
 
 #include "mmu_decl.h"
 
-PTE *Hash, *Hash_end;
+struct hash_pte *Hash, *Hash_end;
 unsigned long Hash_size, Hash_mask;
 unsigned long _SDR1;
 
 union ubat {			/* BAT register values to be loaded */
-	BAT	bat;
+	struct ppc_bat bat;
 	u32	word[2];
 } BATS[8][2];			/* 8 pairs of IBAT, DBAT */

@@ -244,7 +244,7 @@ void __init MMU_init_hw(void)
 	cacheable_memzero(Hash, Hash_size);
 	_SDR1 = __pa(Hash) | SDR1_LOW_BITS;
 
-	Hash_end = (PTE *) ((unsigned long)Hash + Hash_size);
+	Hash_end = (struct hash_pte *) ((unsigned long)Hash + Hash_size);
 
 	printk("Total memory = %ldMB; using %ldkB for hash table (at %p)\n",
 	       total_memory >> 20, Hash_size >> 10, Hash);

arch/powerpc/mm/mmu_decl.h +2 -2

Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
@@ -39,8 +39,8 @@ extern int __map_without_bats;
 extern unsigned long ioremap_base;
 extern unsigned int rtas_data, rtas_size;
 
-struct _PTE;
-extern struct _PTE *Hash, *Hash_end;
+struct hash_pte;
+extern struct hash_pte *Hash, *Hash_end;
 extern unsigned long Hash_size, Hash_mask;
 
 extern unsigned int num_tlbcam_entries;

include/asm-powerpc/mmu-hash64.h +3 -3

Index: working-2.6/include/asm-powerpc/mmu-hash64.h
===================================================================
@@ -102,12 +102,12 @@ extern char initial_stab[];
 
 #ifndef __ASSEMBLY__
 
-typedef struct {
+struct hash_pte {
 	unsigned long v;
 	unsigned long r;
-} hpte_t;
+};
 
-extern hpte_t *htab_address;
+extern struct hash_pte *htab_address;
 extern unsigned long htab_size_bytes;
 extern unsigned long htab_hash_mask;

arch/powerpc/mm/hash_native_64.c +11 ~~-11~~

Index: working-2.6/arch/powerpc/mm/hash_native_64.c
===================================================================
@@ -104,7 +104,7 @@ static inline void tlbie(unsigned long v
 		spin_unlock(&native_tlbie_lock);
 }
 
-static inline void native_lock_hpte(hpte_t *hptep)
+static inline void native_lock_hpte(struct hash_pte *hptep)
 {
 	unsigned long *word = &hptep->v;

@@ -116,7 +116,7 @@ static inline void native_lock_hpte(hpte
 	}
 }
 
-static inline void native_unlock_hpte(hpte_t *hptep)
+static inline void native_unlock_hpte(struct hash_pte *hptep)
 {
 	unsigned long *word = &hptep->v;

@@ -128,7 +128,7 @@ static long native_hpte_insert(unsigned 
 			unsigned long pa, unsigned long rflags,
 			unsigned long vflags, int psize)
 {
-	hpte_t *hptep = htab_address + hpte_group;
+	struct hash_pte *hptep = htab_address + hpte_group;
 	unsigned long hpte_v, hpte_r;
 	int i;

@@ -177,7 +177,7 @@ static long native_hpte_insert(unsigned 
 
 static long native_hpte_remove(unsigned long hpte_group)
 {
-	hpte_t *hptep;
+	struct hash_pte *hptep;
 	int i;
 	int slot_offset;
 	unsigned long hpte_v;

@@ -217,7 +217,7 @@ static long native_hpte_remove(unsigned 
 static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
 				 unsigned long va, int psize, int local)
 {
-	hpte_t *hptep = htab_address + slot;
+	struct hash_pte *hptep = htab_address + slot;
 	unsigned long hpte_v, want_v;
 	int ret = 0;

@@ -251,7 +251,7 @@ static long native_hpte_updatepp(unsigne
 
 static long native_hpte_find(unsigned long va, int psize)
 {
-	hpte_t *hptep;
+	struct hash_pte *hptep;
 	unsigned long hash;
 	unsigned long i, j;
 	long slot;

@@ -294,7 +294,7 @@ static void native_hpte_updateboltedpp(u
 {
 	unsigned long vsid, va;
 	long slot;
-	hpte_t *hptep;
+	struct hash_pte *hptep;
 
 	vsid = get_kernel_vsid(ea);
 	va = (vsid << 28) | (ea & 0x0fffffff);

@@ -315,7 +315,7 @@ static void native_hpte_updateboltedpp(u
 static void native_hpte_invalidate(unsigned long slot, unsigned long va,
 				   int psize, int local)
 {
-	hpte_t *hptep = htab_address + slot;
+	struct hash_pte *hptep = htab_address + slot;
 	unsigned long hpte_v;
 	unsigned long want_v;
 	unsigned long flags;

@@ -345,7 +345,7 @@ static void native_hpte_invalidate(unsig
 #define LP_BITS		8
 #define LP_MASK(i)	((0xFF >> (i)) << LP_SHIFT)
 
-static void hpte_decode(hpte_t *hpte, unsigned long slot,
+static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
 			int *psize, unsigned long *va)
 {
 	unsigned long hpte_r = hpte->r;

@@ -418,7 +418,7 @@ static void hpte_decode(hpte_t *hpte, un
 static void native_hpte_clear(void)
 {
 	unsigned long slot, slots, flags;
-	hpte_t *hptep = htab_address;
+	struct hash_pte *hptep = htab_address;
 	unsigned long hpte_v, va;
 	unsigned long pteg_count;
 	int psize;

@@ -465,7 +465,7 @@ static void native_hpte_clear(void)
 static void native_flush_hash_range(unsigned long number, int local)
 {
 	unsigned long va, hash, index, hidx, shift, slot;
-	hpte_t *hptep;
+	struct hash_pte *hptep;
 	unsigned long hpte_v;
 	unsigned long want_v;
 	unsigned long flags;

arch/powerpc/mm/hash_utils_64.c +1 -1

Index: working-2.6/arch/powerpc/mm/hash_utils_64.c
===================================================================
@@ -87,7 +87,7 @@ extern unsigned long dart_tablebase;
 static unsigned long _SDR1;
 struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 
-hpte_t *htab_address;
+struct hash_pte *htab_address;
 unsigned long htab_size_bytes;
 unsigned long htab_hash_mask;
 int mmu_linear_psize = MMU_PAGE_4K;

arch/powerpc/platforms/ps3/htab.c +7 -7

Index: working-2.6/arch/powerpc/platforms/ps3/htab.c
===================================================================
@@ -34,7 +34,7 @@
 #define DBG(fmt...) do{if(0)printk(fmt);}while(0)
 #endif
 
-static hpte_t *htab;
+static struct hash_pte *htab;
 static unsigned long htab_addr;
 static unsigned char *bolttab;
 static unsigned char *inusetab;

@@ -44,8 +44,8 @@ static DEFINE_SPINLOCK(ps3_bolttab_lock)
 #define debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g) \
 	_debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g, __func__, __LINE__)
 static void _debug_dump_hpte(unsigned long pa, unsigned long va,
-	unsigned long group, unsigned long bitmap, hpte_t lhpte, int psize,
-	unsigned long slot, const char* func, int line)
+	unsigned long group, unsigned long bitmap, struct hash_pte lhpte,
+	int psize, unsigned long slot, const char* func, int line)
 {
 	DBG("%s:%d: pa     = %lxh\n", func, line, pa);
 	DBG("%s:%d: lpar   = %lxh\n", func, line,

@@ -63,7 +63,7 @@ static long ps3_hpte_insert(unsigned lon
 	unsigned long pa, unsigned long rflags, unsigned long vflags, int psize)
 {
 	unsigned long slot;
-	hpte_t lhpte;
+	struct hash_pte lhpte;
 	int secondary = 0;
 	unsigned long result;
 	unsigned long bitmap;

@@ -255,7 +255,7 @@ void __init ps3_hpte_init(unsigned long 
 
 	ppc64_pft_size = __ilog2(htab_size);
 
-	bitmap_size = htab_size / sizeof(hpte_t) / 8;
+	bitmap_size = htab_size / sizeof(struct hash_pte) / 8;
 
 	bolttab = __va(lmb_alloc(bitmap_size, 1));
 	inusetab = __va(lmb_alloc(bitmap_size, 1));

@@ -273,8 +273,8 @@ void __init ps3_map_htab(void)
 
 	result = lv1_map_htab(0, &htab_addr);
 
-	htab = (hpte_t *)__ioremap(htab_addr, htab_size,
-				   pgprot_val(PAGE_READONLY_X));
+	htab = (struct hash_pte *)__ioremap(htab_addr, htab_size,
+					    pgprot_val(PAGE_READONLY_X));
 
 	DBG("%s:%d: lpar %016lxh, virt %016lxh\n", __func__, __LINE__,
 		htab_addr, (unsigned long)htab);

David Gibson

author

2007-05-11 07:12 UTC #8 lore raw

Re: [PATCH 7/7] Kill typedef-ed structs for hash PTEs and BATs

Quoted 8 lines · David Gibson

Using typedefs to rename structure types if frowned on by CodingStyle. However, we do so for the hash PTE structure on both ppc32 (where it's called "PTE") and ppc64 (where it's called "hpte_t"). On ppc32 we also have such a typedef for the BATs ("BAT").
This patch removes this unhelpful use of typedefs, in the process bringing ppc32 and ppc64 closer together, by using the name "struct hash_pte" in both cases.

Oops. Forgot to fix up the iSeries code for this change, breaking compile. Revised patch below.

Kill typedef-ed structs for hash PTEs and BATs

This patch removes this unhelpful use of typedefs, in the process bringing ppc32 and ppc64 closer together, by using the name "struct hash_pte" in both cases.

Signed-off-by David Gibson <[email protected]>

include/asm-powerpc/mmu-hash32.h +4 -4

Index: working-2.6/include/asm-powerpc/mmu-hash32.h
===================================================================
@@ -28,7 +28,7 @@
 #define BPP_RW	0x02		/* Read/write */
 
 #ifndef __ASSEMBLY__
-typedef struct _BAT {
+struct ppc_bat {
 	struct {
 		unsigned long bepi:15;	/* Effective page index (virtual address) */
 		unsigned long :4;	/* Unused */

@@ -46,7 +46,7 @@ typedef struct _BAT {
 		unsigned long :1;	/* Unused */
 		unsigned long pp:2;	/* Page access protections */
 	} batl;			/* Lower register */
-} BAT;
+};
 #endif /* !__ASSEMBLY__ */
 
 /*

@@ -62,7 +62,7 @@ typedef struct _BAT {
 #ifndef __ASSEMBLY__
 
 /* Hardware Page Table Entry */
-typedef struct _PTE {
+struct hash_pte {
 	unsigned long v:1;	/* Entry is valid */
 	unsigned long vsid:24;	/* Virtual segment identifier */
 	unsigned long h:1;	/* Hash algorithm indicator */

@@ -77,7 +77,7 @@ typedef struct _PTE {
 	unsigned long g:1;	/* Guarded */
 	unsigned long  :1;	/* Unused */
 	unsigned long pp:2;	/* Page protection */
-} PTE;
+};
 
 typedef struct {
 	unsigned long id;

arch/powerpc/mm/ppc_mmu_32.c +3 -3

Index: working-2.6/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
@@ -34,12 +34,12 @@
 
 #include "mmu_decl.h"
 
-PTE *Hash, *Hash_end;
+struct hash_pte *Hash, *Hash_end;
 unsigned long Hash_size, Hash_mask;
 unsigned long _SDR1;
 
 union ubat {			/* BAT register values to be loaded */
-	BAT	bat;
+	struct ppc_bat bat;
 	u32	word[2];
 } BATS[8][2];			/* 8 pairs of IBAT, DBAT */

@@ -244,7 +244,7 @@ void __init MMU_init_hw(void)
 	cacheable_memzero(Hash, Hash_size);
 	_SDR1 = __pa(Hash) | SDR1_LOW_BITS;
 
-	Hash_end = (PTE *) ((unsigned long)Hash + Hash_size);
+	Hash_end = (struct hash_pte *) ((unsigned long)Hash + Hash_size);
 
 	printk("Total memory = %ldMB; using %ldkB for hash table (at %p)\n",
 	       total_memory >> 20, Hash_size >> 10, Hash);

arch/powerpc/mm/mmu_decl.h +2 -2

Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
@@ -39,8 +39,8 @@ extern int __map_without_bats;
 extern unsigned long ioremap_base;
 extern unsigned int rtas_data, rtas_size;
 
-struct _PTE;
-extern struct _PTE *Hash, *Hash_end;
+struct hash_pte;
+extern struct hash_pte *Hash, *Hash_end;
 extern unsigned long Hash_size, Hash_mask;
 
 extern unsigned int num_tlbcam_entries;

include/asm-powerpc/mmu-hash64.h +3 -3

Index: working-2.6/include/asm-powerpc/mmu-hash64.h
===================================================================
@@ -103,12 +103,12 @@ extern char initial_stab[];
 
 #ifndef __ASSEMBLY__
 
-typedef struct {
+struct hash_pte {
 	unsigned long v;
 	unsigned long r;
-} hpte_t;
+};
 
-extern hpte_t *htab_address;
+extern struct hash_pte *htab_address;
 extern unsigned long htab_size_bytes;
 extern unsigned long htab_hash_mask;

arch/powerpc/mm/hash_native_64.c +11 ~~-11~~

Index: working-2.6/arch/powerpc/mm/hash_native_64.c
===================================================================
@@ -104,7 +104,7 @@ static inline void tlbie(unsigned long v
 		spin_unlock(&native_tlbie_lock);
 }
 
-static inline void native_lock_hpte(hpte_t *hptep)
+static inline void native_lock_hpte(struct hash_pte *hptep)
 {
 	unsigned long *word = &hptep->v;

@@ -116,7 +116,7 @@ static inline void native_lock_hpte(hpte
 	}
 }
 
-static inline void native_unlock_hpte(hpte_t *hptep)
+static inline void native_unlock_hpte(struct hash_pte *hptep)
 {
 	unsigned long *word = &hptep->v;

@@ -128,7 +128,7 @@ static long native_hpte_insert(unsigned 
 			unsigned long pa, unsigned long rflags,
 			unsigned long vflags, int psize)
 {
-	hpte_t *hptep = htab_address + hpte_group;
+	struct hash_pte *hptep = htab_address + hpte_group;
 	unsigned long hpte_v, hpte_r;
 	int i;

@@ -177,7 +177,7 @@ static long native_hpte_insert(unsigned 
 
 static long native_hpte_remove(unsigned long hpte_group)
 {
-	hpte_t *hptep;
+	struct hash_pte *hptep;
 	int i;
 	int slot_offset;
 	unsigned long hpte_v;

@@ -217,7 +217,7 @@ static long native_hpte_remove(unsigned 
 static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
 				 unsigned long va, int psize, int local)
 {
-	hpte_t *hptep = htab_address + slot;
+	struct hash_pte *hptep = htab_address + slot;
 	unsigned long hpte_v, want_v;
 	int ret = 0;

@@ -251,7 +251,7 @@ static long native_hpte_updatepp(unsigne
 
 static long native_hpte_find(unsigned long va, int psize)
 {
-	hpte_t *hptep;
+	struct hash_pte *hptep;
 	unsigned long hash;
 	unsigned long i, j;
 	long slot;

@@ -294,7 +294,7 @@ static void native_hpte_updateboltedpp(u
 {
 	unsigned long vsid, va;
 	long slot;
-	hpte_t *hptep;
+	struct hash_pte *hptep;
 
 	vsid = get_kernel_vsid(ea);
 	va = (vsid << 28) | (ea & 0x0fffffff);

@@ -315,7 +315,7 @@ static void native_hpte_updateboltedpp(u
 static void native_hpte_invalidate(unsigned long slot, unsigned long va,
 				   int psize, int local)
 {
-	hpte_t *hptep = htab_address + slot;
+	struct hash_pte *hptep = htab_address + slot;
 	unsigned long hpte_v;
 	unsigned long want_v;
 	unsigned long flags;

@@ -345,7 +345,7 @@ static void native_hpte_invalidate(unsig
 #define LP_BITS		8
 #define LP_MASK(i)	((0xFF >> (i)) << LP_SHIFT)
 
-static void hpte_decode(hpte_t *hpte, unsigned long slot,
+static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
 			int *psize, unsigned long *va)
 {
 	unsigned long hpte_r = hpte->r;

@@ -415,7 +415,7 @@ static void hpte_decode(hpte_t *hpte, un
 static void native_hpte_clear(void)
 {
 	unsigned long slot, slots, flags;
-	hpte_t *hptep = htab_address;
+	struct hash_pte *hptep = htab_address;
 	unsigned long hpte_v, va;
 	unsigned long pteg_count;
 	int psize;

@@ -462,7 +462,7 @@ static void native_hpte_clear(void)
 static void native_flush_hash_range(unsigned long number, int local)
 {
 	unsigned long va, hash, index, hidx, shift, slot;
-	hpte_t *hptep;
+	struct hash_pte *hptep;
 	unsigned long hpte_v;
 	unsigned long want_v;
 	unsigned long flags;

arch/powerpc/mm/hash_utils_64.c +1 -1

Index: working-2.6/arch/powerpc/mm/hash_utils_64.c
===================================================================
@@ -87,7 +87,7 @@ extern unsigned long dart_tablebase;
 static unsigned long _SDR1;
 struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 
-hpte_t *htab_address;
+struct hash_pte *htab_address;
 unsigned long htab_size_bytes;
 unsigned long htab_hash_mask;
 int mmu_linear_psize = MMU_PAGE_4K;

arch/powerpc/platforms/ps3/htab.c +7 -7

Index: working-2.6/arch/powerpc/platforms/ps3/htab.c
===================================================================
@@ -34,7 +34,7 @@
 #define DBG(fmt...) do{if(0)printk(fmt);}while(0)
 #endif
 
-static hpte_t *htab;
+static struct hash_pte *htab;
 static unsigned long htab_addr;
 static unsigned char *bolttab;
 static unsigned char *inusetab;

@@ -44,8 +44,8 @@ static DEFINE_SPINLOCK(ps3_bolttab_lock)
 #define debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g) \
 	_debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g, __func__, __LINE__)
 static void _debug_dump_hpte(unsigned long pa, unsigned long va,
-	unsigned long group, unsigned long bitmap, hpte_t lhpte, int psize,
-	unsigned long slot, const char* func, int line)
+	unsigned long group, unsigned long bitmap, struct hash_pte lhpte,
+	int psize, unsigned long slot, const char* func, int line)
 {
 	DBG("%s:%d: pa     = %lxh\n", func, line, pa);
 	DBG("%s:%d: lpar   = %lxh\n", func, line,

@@ -63,7 +63,7 @@ static long ps3_hpte_insert(unsigned lon
 	unsigned long pa, unsigned long rflags, unsigned long vflags, int psize)
 {
 	unsigned long slot;
-	hpte_t lhpte;
+	struct hash_pte lhpte;
 	int secondary = 0;
 	unsigned long result;
 	unsigned long bitmap;

@@ -255,7 +255,7 @@ void __init ps3_hpte_init(unsigned long 
 
 	ppc64_pft_size = __ilog2(htab_size);
 
-	bitmap_size = htab_size / sizeof(hpte_t) / 8;
+	bitmap_size = htab_size / sizeof(struct hash_pte) / 8;
 
 	bolttab = __va(lmb_alloc(bitmap_size, 1));
 	inusetab = __va(lmb_alloc(bitmap_size, 1));

@@ -273,8 +273,8 @@ void __init ps3_map_htab(void)
 
 	result = lv1_map_htab(0, &htab_addr);
 
-	htab = (hpte_t *)__ioremap(htab_addr, htab_size,
-				   pgprot_val(PAGE_READONLY_X));
+	htab = (struct hash_pte *)__ioremap(htab_addr, htab_size,
+					    pgprot_val(PAGE_READONLY_X));
 
 	DBG("%s:%d: lpar %016lxh, virt %016lxh\n", __func__, __LINE__,
 		htab_addr, (unsigned long)htab);

arch/powerpc/platforms/iseries/call_hpt.h +5 -4

Index: working-2.6/arch/powerpc/platforms/iseries/call_hpt.h
===================================================================
@@ -76,24 +76,25 @@ static inline u64 HvCallHpt_invalidateSe
 	return compressedStatus;
 }
 
-static inline u64 HvCallHpt_findValid(hpte_t *hpte, u64 vpn)
+static inline u64 HvCallHpt_findValid(struct hash_pte *hpte, u64 vpn)
 {
 	return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
 }
 
-static inline u64 HvCallHpt_findNextValid(hpte_t *hpte, u32 hpteIndex,
+static inline u64 HvCallHpt_findNextValid(struct hash_pte *hpte, u32 hpteIndex,
 		u8 bitson, u8 bitsoff)
 {
 	return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
 			bitson, bitsoff);
 }
 
-static inline void HvCallHpt_get(hpte_t *hpte, u32 hpteIndex)
+static inline void HvCallHpt_get(struct hash_pte *hpte, u32 hpteIndex)
 {
 	HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
 }
 
-static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, hpte_t *hpte)
+static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit,
+					 struct hash_pte *hpte)
 {
 	HvCall4(HvCallHptAddValidate, hpteIndex, hBit, hpte->v, hpte->r);
 }

arch/powerpc/platforms/iseries/htab.c +4 -4

Index: working-2.6/arch/powerpc/platforms/iseries/htab.c
===================================================================
@@ -44,7 +44,7 @@ long iSeries_hpte_insert(unsigned long h
 			 unsigned long vflags, int psize)
 {
 	long slot;
-	hpte_t lhpte;
+	struct hash_pte lhpte;
 	int secondary = 0;
 
 	BUG_ON(psize != MMU_PAGE_4K);

@@ -99,7 +99,7 @@ long iSeries_hpte_insert(unsigned long h
 
 static unsigned long iSeries_hpte_getword0(unsigned long slot)
 {
-	hpte_t hpte;
+	struct hash_pte hpte;
 
 	HvCallHpt_get(&hpte, slot);
 	return hpte.v;

@@ -144,7 +144,7 @@ static long iSeries_hpte_remove(unsigned
 static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
 				  unsigned long va, int psize, int local)
 {
-	hpte_t hpte;
+	struct hash_pte hpte;
 	unsigned long want_v;
 
 	iSeries_hlock(slot);

@@ -176,7 +176,7 @@ static long iSeries_hpte_updatepp(unsign
  */
 static long iSeries_hpte_find(unsigned long vpn)
 {
-	hpte_t hpte;
+	struct hash_pte hpte;
 	long slot;
 
 	/*

Signature · 4 lines

David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson